diff options
| -rw-r--r-- | include/lib/extensions/amu.h | 91 | ||||
| -rw-r--r-- | include/lib/extensions/amu_private.h | 66 | ||||
| -rw-r--r-- | lib/extensions/amu/aarch32/amu.c | 26 | ||||
| -rw-r--r-- | lib/extensions/amu/aarch64/amu.c | 34 |
4 files changed, 82 insertions, 135 deletions
diff --git a/include/lib/extensions/amu.h b/include/lib/extensions/amu.h index 768e72c25..692d1adaf 100644 --- a/include/lib/extensions/amu.h +++ b/include/lib/extensions/amu.h @@ -8,103 +8,12 @@ #define AMU_H #include <stdbool.h> -#include <stdint.h> - -#include <lib/cassert.h> -#include <lib/utils_def.h> - #include <context.h> -#include <platform_def.h> - -/* All group 0 counters */ -#define AMU_GROUP0_COUNTERS_MASK U(0xf) -#define AMU_GROUP0_NR_COUNTERS U(4) - -#define AMU_GROUP1_COUNTERS_MASK U(0) - -/* Calculate number of group 1 counters */ -#if (AMU_GROUP1_COUNTERS_MASK & (1 << 15)) -#define AMU_GROUP1_NR_COUNTERS 16U -#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 14)) -#define AMU_GROUP1_NR_COUNTERS 15U -#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 13)) -#define AMU_GROUP1_NR_COUNTERS 14U -#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 12)) -#define AMU_GROUP1_NR_COUNTERS 13U -#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 11)) -#define AMU_GROUP1_NR_COUNTERS 12U -#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 10)) -#define AMU_GROUP1_NR_COUNTERS 11U -#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 9)) -#define AMU_GROUP1_NR_COUNTERS 10U -#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 8)) -#define AMU_GROUP1_NR_COUNTERS 9U -#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 7)) -#define AMU_GROUP1_NR_COUNTERS 8U -#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 6)) -#define AMU_GROUP1_NR_COUNTERS 7U -#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 5)) -#define AMU_GROUP1_NR_COUNTERS 6U -#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 4)) -#define AMU_GROUP1_NR_COUNTERS 5U -#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 3)) -#define AMU_GROUP1_NR_COUNTERS 4U -#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 2)) -#define AMU_GROUP1_NR_COUNTERS 3U -#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 1)) -#define AMU_GROUP1_NR_COUNTERS 2U -#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 0)) -#define AMU_GROUP1_NR_COUNTERS 1U -#else -#define AMU_GROUP1_NR_COUNTERS 0U -#endif - -CASSERT(AMU_GROUP1_COUNTERS_MASK <= 0xffff, invalid_amu_group1_counters_mask); - -struct amu_ctx { - uint64_t group0_cnts[AMU_GROUP0_NR_COUNTERS]; -#if __aarch64__ - /* Architected event counter 1 does not have an offset register. */ - uint64_t group0_voffsets[AMU_GROUP0_NR_COUNTERS-1]; -#endif - -#if AMU_GROUP1_NR_COUNTERS - uint64_t group1_cnts[AMU_GROUP1_NR_COUNTERS]; -#if __aarch64__ - uint64_t group1_voffsets[AMU_GROUP1_NR_COUNTERS]; -#endif -#endif -}; -unsigned int amu_get_version(void); #if __aarch64__ void amu_enable(bool el2_unused, cpu_context_t *ctx); #else void amu_enable(bool el2_unused); #endif -/* Group 0 configuration helpers */ -uint64_t amu_group0_cnt_read(unsigned int idx); -void amu_group0_cnt_write(unsigned int idx, uint64_t val); - -#if __aarch64__ -uint64_t amu_group0_voffset_read(unsigned int idx); -void amu_group0_voffset_write(unsigned int idx, uint64_t val); -#endif - -#if AMU_GROUP1_NR_COUNTERS -bool amu_group1_supported(void); - -/* Group 1 configuration helpers */ -uint64_t amu_group1_cnt_read(unsigned int idx); -void amu_group1_cnt_write(unsigned int idx, uint64_t val); -void amu_group1_set_evtype(unsigned int idx, unsigned int val); - -#if __aarch64__ -uint64_t amu_group1_voffset_read(unsigned int idx); -void amu_group1_voffset_write(unsigned int idx, uint64_t val); -#endif - -#endif - #endif /* AMU_H */ diff --git a/include/lib/extensions/amu_private.h b/include/lib/extensions/amu_private.h index 3b4b47ca3..9fe16441e 100644 --- a/include/lib/extensions/amu_private.h +++ b/include/lib/extensions/amu_private.h @@ -9,6 +9,72 @@ #include <stdint.h> +#include <lib/cassert.h> +#include <lib/extensions/amu.h> +#include <lib/utils_def.h> + +#include <platform_def.h> + +/* All group 0 counters */ +#define AMU_GROUP0_COUNTERS_MASK U(0xf) +#define AMU_GROUP0_NR_COUNTERS U(4) + +#define AMU_GROUP1_COUNTERS_MASK U(0) + +/* Calculate number of group 1 counters */ +#if (AMU_GROUP1_COUNTERS_MASK & (1 << 15)) +#define AMU_GROUP1_NR_COUNTERS 16U +#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 14)) +#define AMU_GROUP1_NR_COUNTERS 15U +#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 13)) +#define AMU_GROUP1_NR_COUNTERS 14U +#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 12)) +#define AMU_GROUP1_NR_COUNTERS 13U +#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 11)) +#define AMU_GROUP1_NR_COUNTERS 12U +#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 10)) +#define AMU_GROUP1_NR_COUNTERS 11U +#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 9)) +#define AMU_GROUP1_NR_COUNTERS 10U +#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 8)) +#define AMU_GROUP1_NR_COUNTERS 9U +#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 7)) +#define AMU_GROUP1_NR_COUNTERS 8U +#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 6)) +#define AMU_GROUP1_NR_COUNTERS 7U +#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 5)) +#define AMU_GROUP1_NR_COUNTERS 6U +#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 4)) +#define AMU_GROUP1_NR_COUNTERS 5U +#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 3)) +#define AMU_GROUP1_NR_COUNTERS 4U +#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 2)) +#define AMU_GROUP1_NR_COUNTERS 3U +#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 1)) +#define AMU_GROUP1_NR_COUNTERS 2U +#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 0)) +#define AMU_GROUP1_NR_COUNTERS 1U +#else +#define AMU_GROUP1_NR_COUNTERS 0U +#endif + +CASSERT(AMU_GROUP1_COUNTERS_MASK <= 0xffff, invalid_amu_group1_counters_mask); + +struct amu_ctx { + uint64_t group0_cnts[AMU_GROUP0_NR_COUNTERS]; +#if __aarch64__ + /* Architected event counter 1 does not have an offset register. */ + uint64_t group0_voffsets[AMU_GROUP0_NR_COUNTERS-1]; +#endif + +#if AMU_GROUP1_NR_COUNTERS + uint64_t group1_cnts[AMU_GROUP1_NR_COUNTERS]; +#if __aarch64__ + uint64_t group1_voffsets[AMU_GROUP1_NR_COUNTERS]; +#endif +#endif +}; + uint64_t amu_group0_cnt_read_internal(unsigned int idx); void amu_group0_cnt_write_internal(unsigned int idx, uint64_t val); diff --git a/lib/extensions/amu/aarch32/amu.c b/lib/extensions/amu/aarch32/amu.c index ed56dddc9..8896e5c69 100644 --- a/lib/extensions/amu/aarch32/amu.c +++ b/lib/extensions/amu/aarch32/amu.c @@ -25,7 +25,7 @@ static struct amu_ctx amu_ctxs[PLATFORM_CORE_COUNT]; * ID_PFR0_AMU_V1P1: FEAT_AMUv1p1 supported (introduced in ARM v8.6) * ID_PFR0_AMU_NOT_SUPPORTED: not supported */ -unsigned int amu_get_version(void) +static unsigned int amu_get_version(void) { return (unsigned int)(read_id_pfr0() >> ID_PFR0_AMU_SHIFT) & ID_PFR0_AMU_MASK; @@ -33,7 +33,7 @@ unsigned int amu_get_version(void) #if AMU_GROUP1_NR_COUNTERS /* Check if group 1 counters is implemented */ -bool amu_group1_supported(void) +static bool amu_group1_supported(void) { uint32_t features = read_amcfgr() >> AMCFGR_NCG_SHIFT; @@ -113,7 +113,7 @@ void amu_enable(bool el2_unused) } /* Read the group 0 counter identified by the given `idx`. */ -uint64_t amu_group0_cnt_read(unsigned int idx) +static uint64_t amu_group0_cnt_read(unsigned int idx) { assert(amu_get_version() != ID_PFR0_AMU_NOT_SUPPORTED); assert(idx < AMU_GROUP0_NR_COUNTERS); @@ -122,7 +122,7 @@ uint64_t amu_group0_cnt_read(unsigned int idx) } /* Write the group 0 counter identified by the given `idx` with `val` */ -void amu_group0_cnt_write(unsigned int idx, uint64_t val) +static void amu_group0_cnt_write(unsigned int idx, uint64_t val) { assert(amu_get_version() != ID_PFR0_AMU_NOT_SUPPORTED); assert(idx < AMU_GROUP0_NR_COUNTERS); @@ -133,7 +133,7 @@ void amu_group0_cnt_write(unsigned int idx, uint64_t val) #if AMU_GROUP1_NR_COUNTERS /* Read the group 1 counter identified by the given `idx` */ -uint64_t amu_group1_cnt_read(unsigned int idx) +static uint64_t amu_group1_cnt_read(unsigned int idx) { assert(amu_get_version() != ID_PFR0_AMU_NOT_SUPPORTED); assert(amu_group1_supported()); @@ -143,7 +143,7 @@ uint64_t amu_group1_cnt_read(unsigned int idx) } /* Write the group 1 counter identified by the given `idx` with `val` */ -void amu_group1_cnt_write(unsigned int idx, uint64_t val) +static void amu_group1_cnt_write(unsigned int idx, uint64_t val) { assert(amu_get_version() != ID_PFR0_AMU_NOT_SUPPORTED); assert(amu_group1_supported()); @@ -152,20 +152,6 @@ void amu_group1_cnt_write(unsigned int idx, uint64_t val) amu_group1_cnt_write_internal(idx, val); isb(); } - -/* - * Program the event type register for the given `idx` with - * the event number `val` - */ -void amu_group1_set_evtype(unsigned int idx, unsigned int val) -{ - assert(amu_get_version() != ID_PFR0_AMU_NOT_SUPPORTED); - assert(amu_group1_supported()); - assert(idx < AMU_GROUP1_NR_COUNTERS); - - amu_group1_set_evtype_internal(idx, val); - isb(); -} #endif /* AMU_GROUP1_NR_COUNTERS */ static void *amu_context_save(const void *arg) diff --git a/lib/extensions/amu/aarch64/amu.c b/lib/extensions/amu/aarch64/amu.c index 295c0d569..97eb1e366 100644 --- a/lib/extensions/amu/aarch64/amu.c +++ b/lib/extensions/amu/aarch64/amu.c @@ -26,7 +26,7 @@ static struct amu_ctx amu_ctxs[PLATFORM_CORE_COUNT]; * ID_AA64PFR0_AMU_V1P1: FEAT_AMUv1p1 supported (introduced in ARM v8.6) * ID_AA64PFR0_AMU_NOT_SUPPORTED: not supported */ -unsigned int amu_get_version(void) +static unsigned int amu_get_version(void) { return (unsigned int)(read_id_aa64pfr0_el1() >> ID_AA64PFR0_AMU_SHIFT) & ID_AA64PFR0_AMU_MASK; @@ -34,7 +34,7 @@ unsigned int amu_get_version(void) #if AMU_GROUP1_NR_COUNTERS /* Check if group 1 counters is implemented */ -bool amu_group1_supported(void) +static bool amu_group1_supported(void) { uint64_t features = read_amcfgr_el0() >> AMCFGR_EL0_NCG_SHIFT; @@ -130,7 +130,7 @@ void amu_enable(bool el2_unused, cpu_context_t *ctx) } /* Read the group 0 counter identified by the given `idx`. */ -uint64_t amu_group0_cnt_read(unsigned int idx) +static uint64_t amu_group0_cnt_read(unsigned int idx) { assert(amu_get_version() != ID_AA64PFR0_AMU_NOT_SUPPORTED); assert(idx < AMU_GROUP0_NR_COUNTERS); @@ -139,7 +139,7 @@ uint64_t amu_group0_cnt_read(unsigned int idx) } /* Write the group 0 counter identified by the given `idx` with `val` */ -void amu_group0_cnt_write(unsigned int idx, uint64_t val) +static void amu_group0_cnt_write(unsigned int idx, uint64_t val) { assert(amu_get_version() != ID_AA64PFR0_AMU_NOT_SUPPORTED); assert(idx < AMU_GROUP0_NR_COUNTERS); @@ -154,7 +154,7 @@ void amu_group0_cnt_write(unsigned int idx, uint64_t val) * * Using this function requires FEAT_AMUv1p1 support. */ -uint64_t amu_group0_voffset_read(unsigned int idx) +static uint64_t amu_group0_voffset_read(unsigned int idx) { assert(amu_get_version() >= ID_AA64PFR0_AMU_V1P1); assert(idx < AMU_GROUP0_NR_COUNTERS); @@ -169,7 +169,7 @@ uint64_t amu_group0_voffset_read(unsigned int idx) * * Using this function requires FEAT_AMUv1p1 support. */ -void amu_group0_voffset_write(unsigned int idx, uint64_t val) +static void amu_group0_voffset_write(unsigned int idx, uint64_t val) { assert(amu_get_version() >= ID_AA64PFR0_AMU_V1P1); assert(idx < AMU_GROUP0_NR_COUNTERS); @@ -181,7 +181,7 @@ void amu_group0_voffset_write(unsigned int idx, uint64_t val) #if AMU_GROUP1_NR_COUNTERS /* Read the group 1 counter identified by the given `idx` */ -uint64_t amu_group1_cnt_read(unsigned int idx) +static uint64_t amu_group1_cnt_read(unsigned int idx) { assert(amu_get_version() != ID_AA64PFR0_AMU_NOT_SUPPORTED); assert(amu_group1_supported()); @@ -191,7 +191,7 @@ uint64_t amu_group1_cnt_read(unsigned int idx) } /* Write the group 1 counter identified by the given `idx` with `val` */ -void amu_group1_cnt_write(unsigned int idx, uint64_t val) +static void amu_group1_cnt_write(unsigned int idx, uint64_t val) { assert(amu_get_version() != ID_AA64PFR0_AMU_NOT_SUPPORTED); assert(amu_group1_supported()); @@ -206,7 +206,7 @@ void amu_group1_cnt_write(unsigned int idx, uint64_t val) * * Using this function requires FEAT_AMUv1p1 support. */ -uint64_t amu_group1_voffset_read(unsigned int idx) +static uint64_t amu_group1_voffset_read(unsigned int idx) { assert(amu_get_version() >= ID_AA64PFR0_AMU_V1P1); assert(amu_group1_supported()); @@ -222,7 +222,7 @@ uint64_t amu_group1_voffset_read(unsigned int idx) * * Using this function requires FEAT_AMUv1p1 support. */ -void amu_group1_voffset_write(unsigned int idx, uint64_t val) +static void amu_group1_voffset_write(unsigned int idx, uint64_t val) { assert(amu_get_version() >= ID_AA64PFR0_AMU_V1P1); assert(amu_group1_supported()); @@ -233,20 +233,6 @@ void amu_group1_voffset_write(unsigned int idx, uint64_t val) amu_group1_voffset_write_internal(idx, val); isb(); } - -/* - * Program the event type register for the given `idx` with - * the event number `val` - */ -void amu_group1_set_evtype(unsigned int idx, unsigned int val) -{ - assert(amu_get_version() != ID_AA64PFR0_AMU_NOT_SUPPORTED); - assert(amu_group1_supported()); - assert(idx < AMU_GROUP1_NR_COUNTERS); - - amu_group1_set_evtype_internal(idx, val); - isb(); -} #endif /* AMU_GROUP1_NR_COUNTERS */ static void *amu_context_save(const void *arg) |