diff options
Diffstat (limited to 'bl1')
-rw-r--r-- | bl1/aarch64/bl1_entrypoint.S | 2 | ||||
-rw-r--r-- | bl1/bl1.ld.S | 4 |
2 files changed, 6 insertions, 0 deletions
diff --git a/bl1/aarch64/bl1_entrypoint.S b/bl1/aarch64/bl1_entrypoint.S index 82330c11e..cfc629219 100644 --- a/bl1/aarch64/bl1_entrypoint.S +++ b/bl1/aarch64/bl1_entrypoint.S @@ -131,9 +131,11 @@ func bl1_entrypoint ldr x1, =__BSS_SIZE__ bl zeromem16 +#if USE_COHERENT_MEM ldr x0, =__COHERENT_RAM_START__ ldr x1, =__COHERENT_RAM_UNALIGNED_SIZE__ bl zeromem16 +#endif ldr x0, =__DATA_RAM_START__ ldr x1, =__DATA_ROM_START__ diff --git a/bl1/bl1.ld.S b/bl1/bl1.ld.S index 007149b50..d682384a6 100644 --- a/bl1/bl1.ld.S +++ b/bl1/bl1.ld.S @@ -107,6 +107,7 @@ SECTIONS *(xlat_table) } >RAM +#if USE_COHERENT_MEM /* * The base address of the coherent memory section must be page-aligned (4K) * to guarantee that the coherent data are stored on their own pages and @@ -125,6 +126,7 @@ SECTIONS . = NEXT(4096); __COHERENT_RAM_END__ = .; } >RAM +#endif __BL1_RAM_START__ = ADDR(.data); __BL1_RAM_END__ = .; @@ -140,8 +142,10 @@ SECTIONS __BSS_SIZE__ = SIZEOF(.bss); +#if USE_COHERENT_MEM __COHERENT_RAM_UNALIGNED_SIZE__ = __COHERENT_RAM_END_UNALIGNED__ - __COHERENT_RAM_START__; +#endif ASSERT(. <= BL1_RW_LIMIT, "BL1's RW section has exceeded its limit.") } |