diff options
Diffstat (limited to 'docs/plat/arm/fvp/index.rst')
| -rw-r--r-- | docs/plat/arm/fvp/index.rst | 39 |
1 files changed, 19 insertions, 20 deletions
diff --git a/docs/plat/arm/fvp/index.rst b/docs/plat/arm/fvp/index.rst index d41982fb1..2aaf195a5 100644 --- a/docs/plat/arm/fvp/index.rst +++ b/docs/plat/arm/fvp/index.rst @@ -12,51 +12,50 @@ Arm FVPs without shifted affinities, and that do not support threaded CPU cores (64-bit host machine only). .. note:: - The FVP models used are Version 11.15 Build 14, unless otherwise stated. + The FVP models used are Version 11.16 Build 16, unless otherwise stated. -- ``FVP_Base_AEMvA`` -- ``FVP_Base_AEMv8A-AEMv8A`` +- ``Foundation_Platform`` - ``FVP_Base_AEMv8A-AEMv8A-AEMv8A-AEMv8A-CCN502`` -- ``FVP_Base_RevC-2xAEMvA`` -- ``FVP_Base_Cortex-A32x4`` (Version 11.12 build 38) +- ``FVP_Base_AEMv8A-AEMv8A`` (For certain configurations also uses 11.14/21) +- ``FVP_Base_AEMv8A-GIC600AE`` +- ``FVP_Base_AEMvA`` (For certain configurations also uses 0.0/6684) +- ``FVP_Base_Cortex-A32x4`` (Version 11.12/38) - ``FVP_Base_Cortex-A35x4`` - ``FVP_Base_Cortex-A53x4`` -- ``FVP_Base_Cortex-A55x4+Cortex-A75x4`` - ``FVP_Base_Cortex-A55x4`` +- ``FVP_Base_Cortex-A55x4+Cortex-A75x4`` - ``FVP_Base_Cortex-A57x1-A53x1`` - ``FVP_Base_Cortex-A57x2-A53x4`` - ``FVP_Base_Cortex-A57x4-A53x4`` - ``FVP_Base_Cortex-A57x4`` -- ``FVP_Base_Cortex-A65x4`` - ``FVP_Base_Cortex-A65AEx8`` +- ``FVP_Base_Cortex-A65x4`` +- ``FVP_Base_Cortex-A710x4`` - ``FVP_Base_Cortex-A72x4-A53x4`` - ``FVP_Base_Cortex-A72x4`` - ``FVP_Base_Cortex-A73x4-A53x4`` - ``FVP_Base_Cortex-A73x4`` - ``FVP_Base_Cortex-A75x4`` -- ``FVP_Base_Cortex-A76x4`` - ``FVP_Base_Cortex-A76AEx4`` - ``FVP_Base_Cortex-A76AEx8`` +- ``FVP_Base_Cortex-A76x4`` - ``FVP_Base_Cortex-A77x4`` - ``FVP_Base_Cortex-A78x4`` -- ``FVP_Base_Cortex-A710x4`` -- ``FVP_Morello`` (Version 0.10 build 542) - ``FVP_Base_Neoverse-E1x1`` - ``FVP_Base_Neoverse-E1x2`` - ``FVP_Base_Neoverse-E1x4`` - ``FVP_Base_Neoverse-N1x4`` - ``FVP_Base_Neoverse-N2x4`` (Version 11.12 build 38) - ``FVP_Base_Neoverse-V1x4`` -- ``FVP_CSS_SGI-575`` (Version 11.10 build 36) -- ``FVP_CSS_SGM-775`` -- ``FVP_RD_E1_edge`` (Version 11.9 build 41) -- ``FVP_RD_N1_edge`` (Version 11.10 build 36) -- ``FVP_RD_N1_edge_dual`` (Version 11.10 build 36) -- ``FVP_RD_Daniel`` (Version 11.13 build 10) -- ``FVP_RD_N2`` (Version 11.13 build 10) -- ``FVP_TC0`` (Version 0.0 build 6509) -- ``FVP_Base_AEMv8A-GIC600AE`` (Version 0.0 build 6415) -- ``Foundation_Platform`` +- ``FVP_Base_RevC-2xAEMvA`` (For certain configurations also uses 0.0/6557) +- ``FVP_CSS_SGI-575`` (Version 11.15/26) +- ``FVP_Morello`` (Version 0.11/19) +- ``FVP_RD_E1_edge`` (Version 11.15/26) +- ``FVP_RD_N1_edge_dual`` (Version 11.15/26) +- ``FVP_RD_N1_edge`` (Version 11.15/26) +- ``FVP_RD_V1`` (Version 11.15/26) +- ``FVP_TC0`` +- ``FVP_TC1`` The latest version of the AArch32 build of TF-A has been tested on the following Arm FVPs without shifted affinities, and that do not support threaded |