diff options
Diffstat (limited to 'plat')
-rw-r--r-- | plat/st/common/include/stm32mp_common.h | 4 | ||||
-rw-r--r-- | plat/st/common/include/stm32mp_shres_helpers.h | 74 | ||||
-rw-r--r-- | plat/st/stm32mp1/bl2_plat_setup.c | 4 | ||||
-rw-r--r-- | plat/st/stm32mp1/stm32mp1_context.c | 14 | ||||
-rw-r--r-- | plat/st/stm32mp1/stm32mp1_def.h | 1 | ||||
-rw-r--r-- | plat/st/stm32mp1/stm32mp1_pm.c | 14 | ||||
-rw-r--r-- | plat/st/stm32mp1/stm32mp1_security.c | 10 |
7 files changed, 84 insertions, 37 deletions
diff --git a/plat/st/common/include/stm32mp_common.h b/plat/st/common/include/stm32mp_common.h index fa0b63031..4bbc4dba5 100644 --- a/plat/st/common/include/stm32mp_common.h +++ b/plat/st/common/include/stm32mp_common.h @@ -50,8 +50,8 @@ uint32_t stm32_get_gpio_bank_offset(unsigned int bank); * @id: Target clock ID, ID used in clock DT bindings */ bool stm32mp_clk_is_enabled(unsigned long id); -int stm32mp_clk_enable(unsigned long id); -int stm32mp_clk_disable(unsigned long id); +void stm32mp_clk_enable(unsigned long id); +void stm32mp_clk_disable(unsigned long id); unsigned long stm32mp_clk_get_rate(unsigned long id); /* Initialise the IO layer and register platform IO devices */ diff --git a/plat/st/common/include/stm32mp_shres_helpers.h b/plat/st/common/include/stm32mp_shres_helpers.h new file mode 100644 index 000000000..8b786cc04 --- /dev/null +++ b/plat/st/common/include/stm32mp_shres_helpers.h @@ -0,0 +1,74 @@ +/* + * Copyright (C) 2018-2019, STMicroelectronics - All Rights Reserved + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef STM32MP_SHRES_HELPERS_H +#define STM32MP_SHRES_HELPERS_H + +#include <stdint.h> + +#include <common/debug.h> + +/* + * Shared reference counter: increments by 2 on secure increment + * request, decrements by 2 on secure decrement request. Bit #0 + * is set to 1 on non-secure increment request and reset to 0 on + * non-secure decrement request. The counter initializes to + * either 0, 1 or 2 upon their expect default state. + * Counters saturates once above UINT_MAX / 2. + */ +#define SHREFCNT_NONSECURE_FLAG 0x1UL +#define SHREFCNT_SECURE_STEP 0x2UL +#define SHREFCNT_MAX (UINT32_MAX / 2) + +/* Return 1 if refcnt increments from 0, else return 0 */ +static inline int stm32mp_incr_shrefcnt(unsigned int *refcnt, bool secure) +{ + int rc = !*refcnt; + + if (secure) { + *refcnt += SHREFCNT_SECURE_STEP; + if (*refcnt >= SHREFCNT_MAX) { + panic(); + } + } else { + *refcnt |= SHREFCNT_NONSECURE_FLAG; + } + + return rc; +} + +/* Return 1 if refcnt decrements to 0, else return 0 */ +static inline int stm32mp_decr_shrefcnt(unsigned int *refcnt, bool secure) +{ + int rc = 0; + + if (secure) { + if (*refcnt < SHREFCNT_MAX) { + if (*refcnt < SHREFCNT_SECURE_STEP) { + panic(); + } + *refcnt -= SHREFCNT_SECURE_STEP; + rc = !*refcnt; + } + } else { + rc = (*refcnt == SHREFCNT_NONSECURE_FLAG) ? 1 : 0; + *refcnt &= ~SHREFCNT_NONSECURE_FLAG; + } + + return rc; +} + +static inline int stm32mp_incr_refcnt(unsigned int *refcnt) +{ + return stm32mp_incr_shrefcnt(refcnt, true); +} + +static inline int stm32mp_decr_refcnt(unsigned int *refcnt) +{ + return stm32mp_decr_shrefcnt(refcnt, true); +} + +#endif /* STM32MP_SHRES_HELPERS_H */ diff --git a/plat/st/stm32mp1/bl2_plat_setup.c b/plat/st/stm32mp1/bl2_plat_setup.c index 5ab20845c..c7bc39f4e 100644 --- a/plat/st/stm32mp1/bl2_plat_setup.c +++ b/plat/st/stm32mp1/bl2_plat_setup.c @@ -225,9 +225,7 @@ void bl2_el3_plat_arch_setup(void) goto skip_console_init; } - if (stm32mp_clk_enable((unsigned long)dt_uart_info.clock) != 0) { - goto skip_console_init; - } + stm32mp_clk_enable((unsigned long)dt_uart_info.clock); stm32mp_reset_assert((uint32_t)dt_uart_info.reset); udelay(2); diff --git a/plat/st/stm32mp1/stm32mp1_context.c b/plat/st/stm32mp1/stm32mp1_context.c index c402c2039..cf8a91eb4 100644 --- a/plat/st/stm32mp1/stm32mp1_context.c +++ b/plat/st/stm32mp1/stm32mp1_context.c @@ -20,26 +20,16 @@ int stm32_save_boot_interface(uint32_t interface, uint32_t instance) { - uint32_t tamp_clk_off = 0; uint32_t bkpr_itf_idx = tamp_bkpr(TAMP_BOOT_ITF_BACKUP_REG_ID); - if (!stm32mp_clk_is_enabled(RTCAPB)) { - tamp_clk_off = 1; - if (stm32mp_clk_enable(RTCAPB) != 0) { - return -EINVAL; - } - } + stm32mp_clk_enable(RTCAPB); mmio_clrsetbits_32(bkpr_itf_idx, TAMP_BOOT_ITF_MASK, ((interface << 4) | (instance & 0xFU)) << TAMP_BOOT_ITF_SHIFT); - if (tamp_clk_off != 0U) { - if (stm32mp_clk_disable(RTCAPB) != 0) { - return -EINVAL; - } - } + stm32mp_clk_disable(RTCAPB); return 0; } diff --git a/plat/st/stm32mp1/stm32mp1_def.h b/plat/st/stm32mp1/stm32mp1_def.h index 8d7cea327..f0dc575e2 100644 --- a/plat/st/stm32mp1/stm32mp1_def.h +++ b/plat/st/stm32mp1/stm32mp1_def.h @@ -20,6 +20,7 @@ #include <boot_api.h> #include <stm32mp_common.h> #include <stm32mp_dt.h> +#include <stm32mp_shres_helpers.h> #include <stm32mp1_private.h> #endif diff --git a/plat/st/stm32mp1/stm32mp1_pm.c b/plat/st/stm32mp1/stm32mp1_pm.c index 3262607a5..cf9fa8e69 100644 --- a/plat/st/stm32mp1/stm32mp1_pm.c +++ b/plat/st/stm32mp1/stm32mp1_pm.c @@ -59,7 +59,6 @@ static void stm32_cpu_standby(plat_local_state_t cpu_state) static int stm32_pwr_domain_on(u_register_t mpidr) { unsigned long current_cpu_mpidr = read_mpidr_el1(); - uint32_t tamp_clk_off = 0; uint32_t bkpr_core1_addr = tamp_bkpr(BOOT_API_CORE1_BRANCH_ADDRESS_TAMP_BCK_REG_IDX); uint32_t bkpr_core1_magic = @@ -75,12 +74,7 @@ static int stm32_pwr_domain_on(u_register_t mpidr) return PSCI_E_INVALID_ADDRESS; } - if (!stm32mp_clk_is_enabled(RTCAPB)) { - tamp_clk_off = 1; - if (stm32mp_clk_enable(RTCAPB) != 0) { - panic(); - } - } + stm32mp_clk_enable(RTCAPB); cntfrq_core0 = read_cntfrq_el0(); @@ -90,11 +84,7 @@ static int stm32_pwr_domain_on(u_register_t mpidr) /* Write magic number in backup register */ mmio_write_32(bkpr_core1_magic, BOOT_API_A7_CORE1_MAGIC_NUMBER); - if (tamp_clk_off != 0U) { - if (stm32mp_clk_disable(RTCAPB) != 0) { - panic(); - } - } + stm32mp_clk_disable(RTCAPB); /* Generate an IT to core 1 */ gicv2_raise_sgi(ARM_IRQ_SEC_SGI_0, STM32MP_SECONDARY_CPU); diff --git a/plat/st/stm32mp1/stm32mp1_security.c b/plat/st/stm32mp1/stm32mp1_security.c index baa3916d0..ebf1587a6 100644 --- a/plat/st/stm32mp1/stm32mp1_security.c +++ b/plat/st/stm32mp1/stm32mp1_security.c @@ -61,14 +61,8 @@ static void init_tzc400(void) ******************************************************************************/ static void early_init_tzc400(void) { - if (stm32mp_clk_enable(TZC1) != 0) { - ERROR("Cannot enable TZC1 clock\n"); - panic(); - } - if (stm32mp_clk_enable(TZC2) != 0) { - ERROR("Cannot enable TZC2 clock\n"); - panic(); - } + stm32mp_clk_enable(TZC1); + stm32mp_clk_enable(TZC2); tzc400_init(STM32MP1_TZC_BASE); |