From 35c75377a0642a75a0b8d0b309ae231da15bc470 Mon Sep 17 00:00:00 2001 From: johpow01 Date: Thu, 10 Sep 2020 13:39:26 -0500 Subject: Workaround for Cortex A77 erratum 1925769 Cortex A77 erratum 1925769 is a Cat B erratum, present in older revisions of the Cortex A77 processor core. The workaround is to set bit 8 in the ECTLR_EL1 register, there is a small performance cost (<0.5%) for setting this bit. SDEN can be found here: https://documentation-service.arm.com/static/5f7c35d0d3be967f7be46d33 Signed-off-by: John Powell Change-Id: I9cf0e0b5dc1e3e32e24279d2632c759cc7bd7ce9 --- include/lib/cpus/aarch64/cortex_a77.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/lib') diff --git a/include/lib/cpus/aarch64/cortex_a77.h b/include/lib/cpus/aarch64/cortex_a77.h index 41aced8d2..ed84c0f4a 100644 --- a/include/lib/cpus/aarch64/cortex_a77.h +++ b/include/lib/cpus/aarch64/cortex_a77.h @@ -16,6 +16,7 @@ * CPU Extended Control register specific definitions. ******************************************************************************/ #define CORTEX_A77_CPUECTLR_EL1 S3_0_C15_C1_4 +#define CORTEX_A77_CPUECTLR_EL1_BIT_8 (ULL(1) << 8) #define CORTEX_A77_CPUECTLR_EL1_BIT_53 (ULL(1) << 53) /******************************************************************************* -- cgit v1.2.3