From 213afde907a375f4f28ac1843b633ca83887f174 Mon Sep 17 00:00:00 2001 From: Bipin Ravi Date: Wed, 31 Mar 2021 16:45:40 -0500 Subject: errata: workaround for Cortex-A710 erratum 2055002 Cortex-A710 erratum 2055002 is a Cat B erratum that applies to revisions r1p0 & r2p0 and is still open. The workaround is to set CPUACTLR_EL1[46] to force L2 tag ECC inline correction mode. This workaround works on revision r1p0 & r2p0. SDEN can be found here: https://developer.arm.com/documentation/SDEN1775101/latest Signed-off-by: Bipin Ravi Change-Id: I67be1dce53c4651167d8cee33c116e73b9dafe81 --- lib/cpus/aarch64/cortex_a710.S | 38 +++++++++++++++++++++++++++++++++++--- lib/cpus/cpu-ops.mk | 8 ++++++++ 2 files changed, 43 insertions(+), 3 deletions(-) (limited to 'lib/cpus') diff --git a/lib/cpus/aarch64/cortex_a710.S b/lib/cpus/aarch64/cortex_a710.S index 469b430a9..ac2517c21 100644 --- a/lib/cpus/aarch64/cortex_a710.S +++ b/lib/cpus/aarch64/cortex_a710.S @@ -107,6 +107,32 @@ func check_errata_2081180 b cpu_rev_var_ls endfunc check_errata_2081180 +/* --------------------------------------------------------------------- + * Errata Workaround for Cortex-A710 Erratum 2055002. + * This applies to revision r1p0, r2p0 of Cortex-A710 and is still open. + * Inputs: + * x0: variant[4:7] and revision[0:3] of current cpu. + * Shall clobber: x0-x17 + * --------------------------------------------------------------------- + */ +func errata_a710_2055002_wa + /* Compare x0 against revision r2p0 */ + mov x17, x30 + bl check_errata_2055002 + cbz x0, 1f + mrs x1, CORTEX_A710_CPUACTLR_EL1 + orr x1, x1, CORTEX_A710_CPUACTLR_EL1_BIT_46 + msr CORTEX_A710_CPUACTLR_EL1, x1 +1: + ret x17 +endfunc errata_a710_2055002_wa + +func check_errata_2055002 + /* Applies to r1p0, r2p0 */ + mov x1, #0x20 + b cpu_rev_var_ls +endfunc check_errata_2055002 + /* ---------------------------------------------------- * HW will do the cache maintenance while powering down * ---------------------------------------------------- @@ -123,10 +149,10 @@ func cortex_a710_core_pwr_dwn ret endfunc cortex_a710_core_pwr_dwn +#if REPORT_ERRATA /* - * Errata printing function for Cortex A710. Must follow AAPCS. + * Errata printing function for Cortex-A710. Must follow AAPCS. */ -#if REPORT_ERRATA func cortex_a710_errata_report stp x8, x30, [sp, #-16]! @@ -139,6 +165,7 @@ func cortex_a710_errata_report */ report_errata ERRATA_A710_1987031, cortex_a710, 1987031 report_errata ERRATA_A710_2081180, cortex_a710, 2081180 + report_errata ERRATA_A710_2055002, cortex_a710, 2055002 ldp x8, x30, [sp], #16 ret @@ -164,8 +191,13 @@ func cortex_a710_reset_func bl errata_a710_2081180_wa #endif +#if ERRATA_A710_2055002 + mov x0, x18 + bl errata_a710_2055002_wa +#endif + isb - ret x19 + ret x19 endfunc cortex_a710_reset_func /* --------------------------------------------- diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk index f93aecdd9..fe66fbb9e 100644 --- a/lib/cpus/cpu-ops.mk +++ b/lib/cpus/cpu-ops.mk @@ -429,6 +429,10 @@ ERRATA_N2_2067956 ?=0 # to revision r0p0 of the Neoverse N2 cpu and is still open. ERRATA_N2_2025414 ?=0 +# Flag to apply erratum 2055002 workaround during reset. This erratum applies +# to revision r1p0, r2p0 of the Cortex-A710 cpu and is still open. +ERRATA_A710_2055002 ?=0 + # Flag to apply DSU erratum 798953. This erratum applies to DSUs revision r0p0. # Applying the workaround results in higher DSU power consumption on idle. ERRATA_DSU_798953 ?=0 @@ -790,6 +794,10 @@ $(eval $(call add_define,ERRATA_N2_2067956)) $(eval $(call assert_boolean,ERRATA_N2_2025414)) $(eval $(call add_define,ERRATA_N2_2025414)) +# Process ERRATA_A710_2055002 flag +$(eval $(call assert_boolean,ERRATA_A710_2055002)) +$(eval $(call add_define,ERRATA_A710_2055002)) + # Process ERRATA_DSU_798953 flag $(eval $(call assert_boolean,ERRATA_DSU_798953)) $(eval $(call add_define,ERRATA_DSU_798953)) -- cgit v1.2.3 From afc2ed63f9c83a3b7408d804cbe22f02d34d075d Mon Sep 17 00:00:00 2001 From: Bipin Ravi Date: Wed, 31 Mar 2021 18:45:55 -0500 Subject: errata: workaround for Cortex-A710 erratum 2017096 Cortex-A710 erratum 2017096 is a Cat B erratum that applies to revisions r0p0, r1p0 & r2p0 and is still open. The workaround is to set CPUECLTR_EL1[8] to 1 which disables store issue prefetching. SDEN can be found here: https://developer.arm.com/documentation/SDEN1775101/latest Signed-off-by: Bipin Ravi Change-Id: If5f61ec30dbc2fab7f2c68663996057086e374e3 --- lib/cpus/aarch64/cortex_a710.S | 32 ++++++++++++++++++++++++++++++++ lib/cpus/cpu-ops.mk | 8 ++++++++ 2 files changed, 40 insertions(+) (limited to 'lib/cpus') diff --git a/lib/cpus/aarch64/cortex_a710.S b/lib/cpus/aarch64/cortex_a710.S index ac2517c21..75b7647bd 100644 --- a/lib/cpus/aarch64/cortex_a710.S +++ b/lib/cpus/aarch64/cortex_a710.S @@ -133,6 +133,33 @@ func check_errata_2055002 b cpu_rev_var_ls endfunc check_errata_2055002 +/* ------------------------------------------------------------- + * Errata Workaround for Cortex-A710 Erratum 2017096. + * This applies to revisions r0p0, r1p0 and r2p0 of Cortex-A710. + * Inputs: + * x0: variant[4:7] and revision[0:3] of current cpu. + * Shall clobber: x0-x17 + * ------------------------------------------------------------- + */ +func errata_a710_2017096_wa + /* Compare x0 against revision r0p0 to r2p0 */ + mov x17, x30 + bl check_errata_2017096 + cbz x0, 1f + mrs x1, CORTEX_A710_CPUECTLR_EL1 + orr x1, x1, CORTEX_A710_CPUECTLR_EL1_PFSTIDIS_BIT + msr CORTEX_A710_CPUECTLR_EL1, x1 + +1: + ret x17 +endfunc errata_a710_2017096_wa + +func check_errata_2017096 + /* Applies to r0p0, r1p0, r2p0 */ + mov x1, #0x20 + b cpu_rev_var_ls +endfunc check_errata_2017096 + /* ---------------------------------------------------- * HW will do the cache maintenance while powering down * ---------------------------------------------------- @@ -166,6 +193,7 @@ func cortex_a710_errata_report report_errata ERRATA_A710_1987031, cortex_a710, 1987031 report_errata ERRATA_A710_2081180, cortex_a710, 2081180 report_errata ERRATA_A710_2055002, cortex_a710, 2055002 + report_errata ERRATA_A710_2017096, cortex_a710, 2017096 ldp x8, x30, [sp], #16 ret @@ -196,6 +224,10 @@ func cortex_a710_reset_func bl errata_a710_2055002_wa #endif +#if ERRATA_A710_2017096 + mov x0, x18 + bl errata_a710_2017096_wa +#endif isb ret x19 endfunc cortex_a710_reset_func diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk index fe66fbb9e..a6305268a 100644 --- a/lib/cpus/cpu-ops.mk +++ b/lib/cpus/cpu-ops.mk @@ -433,6 +433,10 @@ ERRATA_N2_2025414 ?=0 # to revision r1p0, r2p0 of the Cortex-A710 cpu and is still open. ERRATA_A710_2055002 ?=0 +# Flag to apply erratum 2017096 workaround during reset. This erratum applies +# to revision r0p0, r1p0 and r2p0 of the Cortex-A710 cpu and is still open. +ERRATA_A710_2017096 ?=0 + # Flag to apply DSU erratum 798953. This erratum applies to DSUs revision r0p0. # Applying the workaround results in higher DSU power consumption on idle. ERRATA_DSU_798953 ?=0 @@ -798,6 +802,10 @@ $(eval $(call add_define,ERRATA_N2_2025414)) $(eval $(call assert_boolean,ERRATA_A710_2055002)) $(eval $(call add_define,ERRATA_A710_2055002)) +# Process ERRATA_A710_2017096 flag +$(eval $(call assert_boolean,ERRATA_A710_2017096)) +$(eval $(call add_define,ERRATA_A710_2017096)) + # Process ERRATA_DSU_798953 flag $(eval $(call assert_boolean,ERRATA_DSU_798953)) $(eval $(call add_define,ERRATA_DSU_798953)) -- cgit v1.2.3 From 7cfae93227be77f137265e8de4f1331e5d7beb3a Mon Sep 17 00:00:00 2001 From: Bipin Ravi Date: Mon, 30 Aug 2021 13:02:51 -0500 Subject: errata: workaround for Neoverse N2 erratum 2189731 Neoverse N2 erratum 2189731 is a Cat B erratum that applies to revision r0p0 and is still open. The workaround is to set CPUACTLR5_EL1[44] to 1 which will cause the CPP instruction to invalidate the hardware prefetcher state trained from any EL. SDEN can be found here: https://developer.arm.com/documentation/SDEN1982442/latest Signed-off-by: Bipin Ravi Change-Id: Iddc6a59adf9fa3cab560c46f2133e1f5a8b3ad03 --- lib/cpus/aarch64/neoverse_n2.S | 33 +++++++++++++++++++++++++++++++++ lib/cpus/cpu-ops.mk | 8 ++++++++ 2 files changed, 41 insertions(+) (limited to 'lib/cpus') diff --git a/lib/cpus/aarch64/neoverse_n2.S b/lib/cpus/aarch64/neoverse_n2.S index a745ca5d6..0df40766e 100644 --- a/lib/cpus/aarch64/neoverse_n2.S +++ b/lib/cpus/aarch64/neoverse_n2.S @@ -114,6 +114,33 @@ func check_errata_2025414 b cpu_rev_var_ls endfunc check_errata_2025414 +/* --------------------------------------------------------------- + * Errata Workaround for Neoverse N2 Erratum 2189731. + * This applies to revision r0p0 of Neoverse N2 and is still open. + * Inputs: + * x0: variant[4:7] and revision[0:3] of current cpu. + * Shall clobber: x0-x17 + * --------------------------------------------------------------- + */ +func errata_n2_2189731_wa + /* Compare x0 against revision r0p0 */ + mov x17, x30 + bl check_errata_2189731 + cbz x0, 1f + mrs x1, NEOVERSE_N2_CPUACTLR5_EL1 + orr x1, x1, NEOVERSE_N2_CPUACTLR5_EL1_BIT_44 + msr NEOVERSE_N2_CPUACTLR5_EL1, x1 + +1: + ret x17 +endfunc errata_n2_2189731_wa + +func check_errata_2189731 + /* Applies to r0p0 */ + mov x1, #0x00 + b cpu_rev_var_ls +endfunc check_errata_2189731 + /* ------------------------------------------- * The CPU Ops reset function for Neoverse N2. * ------------------------------------------- @@ -144,6 +171,11 @@ func neoverse_n2_reset_func bl errata_n2_2025414_wa #endif +#if ERRATA_N2_2189731 + mov x0, x18 + bl errata_n2_2189731_wa +#endif + #if ENABLE_AMU /* Make sure accesses from EL0/EL1 and EL2 are not trapped to EL3 */ mrs x0, cptr_el3 @@ -207,6 +239,7 @@ func neoverse_n2_errata_report report_errata ERRATA_N2_2002655, neoverse_n2, 2002655 report_errata ERRATA_N2_2067956, neoverse_n2, 2067956 report_errata ERRATA_N2_2025414, neoverse_n2, 2025414 + report_errata ERRATA_N2_2189731, neoverse_n2, 2189731 ldp x8, x30, [sp], #16 ret diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk index a6305268a..e0fc1f7c7 100644 --- a/lib/cpus/cpu-ops.mk +++ b/lib/cpus/cpu-ops.mk @@ -429,6 +429,10 @@ ERRATA_N2_2067956 ?=0 # to revision r0p0 of the Neoverse N2 cpu and is still open. ERRATA_N2_2025414 ?=0 +# Flag to apply erratum 2189731 workaround during reset. This erratum applies +# to revision r0p0 of the Neoverse N2 cpu and is still open. +ERRATA_N2_2189731 ?=0 + # Flag to apply erratum 2055002 workaround during reset. This erratum applies # to revision r1p0, r2p0 of the Cortex-A710 cpu and is still open. ERRATA_A710_2055002 ?=0 @@ -798,6 +802,10 @@ $(eval $(call add_define,ERRATA_N2_2067956)) $(eval $(call assert_boolean,ERRATA_N2_2025414)) $(eval $(call add_define,ERRATA_N2_2025414)) +# Process ERRATA_N2_2189731 flag +$(eval $(call assert_boolean,ERRATA_N2_2189731)) +$(eval $(call add_define,ERRATA_N2_2189731)) + # Process ERRATA_A710_2055002 flag $(eval $(call assert_boolean,ERRATA_A710_2055002)) $(eval $(call add_define,ERRATA_A710_2055002)) -- cgit v1.2.3 From 1cafb08debe7cb99968b38a070d25fee0cc9316d Mon Sep 17 00:00:00 2001 From: Bipin Ravi Date: Wed, 1 Sep 2021 01:36:43 -0500 Subject: errata: workaround for Neoverse N2 erratum 2138956 Neoverse N2 erratum 2138956 is a Cat B erratum that applies to revision r0p0 and is still open. This erratum can be avoided by inserting a sequence of 16 DMB ST instructions prior to WFI or WFE. SDEN can be found here: https://developer.arm.com/documentation/SDEN1982442/latest Signed-off-by: Bipin Ravi Change-Id: I1aac87b3075992f875451e4767b21857f596d0b2 --- lib/cpus/aarch64/neoverse_n2.S | 49 ++++++++++++++++++++++++++++++++++++++++++ lib/cpus/cpu-ops.mk | 8 +++++++ 2 files changed, 57 insertions(+) (limited to 'lib/cpus') diff --git a/lib/cpus/aarch64/neoverse_n2.S b/lib/cpus/aarch64/neoverse_n2.S index 0df40766e..9e7bbf7e6 100644 --- a/lib/cpus/aarch64/neoverse_n2.S +++ b/lib/cpus/aarch64/neoverse_n2.S @@ -141,6 +141,48 @@ func check_errata_2189731 b cpu_rev_var_ls endfunc check_errata_2189731 +/* -------------------------------------------------- + * Errata Workaround for Neoverse N2 Erratum 2138956. + * This applies to revision r0p0 of Neoverse N2. it is still open. + * Inputs: + * x0: variant[4:7] and revision[0:3] of current cpu. + * Shall clobber: x0-x17 + * -------------------------------------------------- + */ +func errata_n2_2138956_wa + /* Check revision. */ + mov x17, x30 + bl check_errata_2138956 + cbz x0, 1f + + /* Apply instruction patching sequence */ + ldr x0,=0x3 + msr S3_6_c15_c8_0,x0 + ldr x0,=0xF3A08002 + msr S3_6_c15_c8_2,x0 + ldr x0,=0xFFF0F7FE + msr S3_6_c15_c8_3,x0 + ldr x0,=0x10002001003FF + msr S3_6_c15_c8_1,x0 + ldr x0,=0x4 + msr S3_6_c15_c8_0,x0 + ldr x0,=0xBF200000 + msr S3_6_c15_c8_2,x0 + ldr x0,=0xFFEF0000 + msr S3_6_c15_c8_3,x0 + ldr x0,=0x10002001003F3 + msr S3_6_c15_c8_1,x0 + isb +1: + ret x17 +endfunc errata_n2_2138956_wa + +func check_errata_2138956 + /* Applies to r0p0 */ + mov x1, #0x00 + b cpu_rev_var_ls +endfunc check_errata_2138956 + /* ------------------------------------------- * The CPU Ops reset function for Neoverse N2. * ------------------------------------------- @@ -176,6 +218,12 @@ func neoverse_n2_reset_func bl errata_n2_2189731_wa #endif + +#if ERRATA_N2_2138956 + mov x0, x18 + bl errata_n2_2138956_wa +#endif + #if ENABLE_AMU /* Make sure accesses from EL0/EL1 and EL2 are not trapped to EL3 */ mrs x0, cptr_el3 @@ -240,6 +288,7 @@ func neoverse_n2_errata_report report_errata ERRATA_N2_2067956, neoverse_n2, 2067956 report_errata ERRATA_N2_2025414, neoverse_n2, 2025414 report_errata ERRATA_N2_2189731, neoverse_n2, 2189731 + report_errata ERRATA_N2_2138956, neoverse_n2, 2138956 ldp x8, x30, [sp], #16 ret diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk index e0fc1f7c7..584682edf 100644 --- a/lib/cpus/cpu-ops.mk +++ b/lib/cpus/cpu-ops.mk @@ -433,6 +433,10 @@ ERRATA_N2_2025414 ?=0 # to revision r0p0 of the Neoverse N2 cpu and is still open. ERRATA_N2_2189731 ?=0 +# Flag to apply erratum 2138956 workaround during reset. This erratum applies +# to revision r0p0 of the Neoverse N2 cpu and is still open. +ERRATA_N2_2138956 ?=0 + # Flag to apply erratum 2055002 workaround during reset. This erratum applies # to revision r1p0, r2p0 of the Cortex-A710 cpu and is still open. ERRATA_A710_2055002 ?=0 @@ -806,6 +810,10 @@ $(eval $(call add_define,ERRATA_N2_2025414)) $(eval $(call assert_boolean,ERRATA_N2_2189731)) $(eval $(call add_define,ERRATA_N2_2189731)) +# Process ERRATA_N2_2138956 flag +$(eval $(call assert_boolean,ERRATA_N2_2138956)) +$(eval $(call add_define,ERRATA_N2_2138956)) + # Process ERRATA_A710_2055002 flag $(eval $(call assert_boolean,ERRATA_A710_2055002)) $(eval $(call add_define,ERRATA_A710_2055002)) -- cgit v1.2.3