From 402b3cf8766fe2cb4ae462f7ee7761d08a1ba56c Mon Sep 17 00:00:00 2001 From: Julius Werner Date: Tue, 9 Jul 2019 14:02:43 -0700 Subject: Switch AARCH32/AARCH64 to __aarch64__ NOTE: AARCH32/AARCH64 macros are now deprecated in favor of __aarch64__. All common C compilers pre-define the same macros to signal which architecture the code is being compiled for: __arm__ for AArch32 (or earlier versions) and __aarch64__ for AArch64. There's no need for TF-A to define its own custom macros for this. In order to unify code with the export headers (which use __aarch64__ to avoid another dependency), let's deprecate the AARCH32 and AARCH64 macros and switch the code base over to the pre-defined standard macro. (Since it is somewhat unintuitive that __arm__ only means AArch32, let's standardize on only using __aarch64__.) Change-Id: Ic77de4b052297d77f38fc95f95f65a8ee70cf200 Signed-off-by: Julius Werner --- lib/xlat_tables_v2/xlat_tables_context.c | 34 ++++++++++++++++---------------- lib/xlat_tables_v2/xlat_tables_utils.c | 2 +- 2 files changed, 18 insertions(+), 18 deletions(-) (limited to 'lib/xlat_tables_v2') diff --git a/lib/xlat_tables_v2/xlat_tables_context.c b/lib/xlat_tables_v2/xlat_tables_context.c index bf3ae1e7d..f4b64b33f 100644 --- a/lib/xlat_tables_v2/xlat_tables_context.c +++ b/lib/xlat_tables_v2/xlat_tables_context.c @@ -136,48 +136,48 @@ int xlat_change_mem_attributes(uintptr_t base_va, size_t size, uint32_t attr) #define MAX_PHYS_ADDR tf_xlat_ctx.max_pa #endif -#ifdef AARCH32 +#ifdef __aarch64__ -void enable_mmu_svc_mon(unsigned int flags) +void enable_mmu_el1(unsigned int flags) { setup_mmu_cfg((uint64_t *)&mmu_cfg_params, flags, tf_xlat_ctx.base_table, MAX_PHYS_ADDR, tf_xlat_ctx.va_max_address, EL1_EL0_REGIME); - enable_mmu_direct_svc_mon(flags); + enable_mmu_direct_el1(flags); } -void enable_mmu_hyp(unsigned int flags) +void enable_mmu_el2(unsigned int flags) { setup_mmu_cfg((uint64_t *)&mmu_cfg_params, flags, tf_xlat_ctx.base_table, MAX_PHYS_ADDR, tf_xlat_ctx.va_max_address, EL2_REGIME); - enable_mmu_direct_hyp(flags); + enable_mmu_direct_el2(flags); } -#else - -void enable_mmu_el1(unsigned int flags) +void enable_mmu_el3(unsigned int flags) { setup_mmu_cfg((uint64_t *)&mmu_cfg_params, flags, tf_xlat_ctx.base_table, MAX_PHYS_ADDR, - tf_xlat_ctx.va_max_address, EL1_EL0_REGIME); - enable_mmu_direct_el1(flags); + tf_xlat_ctx.va_max_address, EL3_REGIME); + enable_mmu_direct_el3(flags); } -void enable_mmu_el2(unsigned int flags) +#else /* !__aarch64__ */ + +void enable_mmu_svc_mon(unsigned int flags) { setup_mmu_cfg((uint64_t *)&mmu_cfg_params, flags, tf_xlat_ctx.base_table, MAX_PHYS_ADDR, - tf_xlat_ctx.va_max_address, EL2_REGIME); - enable_mmu_direct_el2(flags); + tf_xlat_ctx.va_max_address, EL1_EL0_REGIME); + enable_mmu_direct_svc_mon(flags); } -void enable_mmu_el3(unsigned int flags) +void enable_mmu_hyp(unsigned int flags) { setup_mmu_cfg((uint64_t *)&mmu_cfg_params, flags, tf_xlat_ctx.base_table, MAX_PHYS_ADDR, - tf_xlat_ctx.va_max_address, EL3_REGIME); - enable_mmu_direct_el3(flags); + tf_xlat_ctx.va_max_address, EL2_REGIME); + enable_mmu_direct_hyp(flags); } -#endif /* AARCH32 */ +#endif /* __aarch64__ */ diff --git a/lib/xlat_tables_v2/xlat_tables_utils.c b/lib/xlat_tables_v2/xlat_tables_utils.c index 761d00c3d..232142e84 100644 --- a/lib/xlat_tables_v2/xlat_tables_utils.c +++ b/lib/xlat_tables_v2/xlat_tables_utils.c @@ -97,7 +97,7 @@ static void xlat_desc_print(const xlat_ctx_t *ctx, uint64_t desc) printf(((LOWER_ATTRS(NS) & desc) != 0ULL) ? "-NS" : "-S"); -#ifdef AARCH64 +#ifdef __aarch64__ /* Check Guarded Page bit */ if ((desc & GP) != 0ULL) { printf("-GP"); -- cgit v1.2.3