From 1a691455d9cb714a5dce80a2646567d5636a7779 Mon Sep 17 00:00:00 2001 From: johpow01 Date: Fri, 30 Apr 2021 18:08:52 -0500 Subject: errata: workaround for Cortex A78 errata 1821534 Cortex A78 erratum 1821534 is a Cat B erratum present in r0p0 and r1p0 of the A78 processor core, it is fixed in r1p1. SDEN can be found here: https://documentation-service.arm.com/static/603e3733492bde1625aa8780 Signed-off-by: John Powell Change-Id: I71057c4b9625cd9edc1a06946b453cf16ae5ea2c --- lib/cpus/aarch64/cortex_a78.S | 68 ++++++++++++++++++++++++++++++++----------- lib/cpus/cpu-ops.mk | 8 +++++ 2 files changed, 59 insertions(+), 17 deletions(-) (limited to 'lib') diff --git a/lib/cpus/aarch64/cortex_a78.S b/lib/cpus/aarch64/cortex_a78.S index f61726b46..8c5a45a7b 100644 --- a/lib/cpus/aarch64/cortex_a78.S +++ b/lib/cpus/aarch64/cortex_a78.S @@ -44,13 +44,13 @@ func check_errata_1688305 b cpu_rev_var_ls endfunc check_errata_1688305 - /* -------------------------------------------------- - * Errata Workaround for Cortex A78 Errata #1941498. - * This applies to revisions r0p0, r1p0, and r1p1. - * x0: variant[4:7] and revision[0:3] of current cpu. - * Shall clobber: x0-x17 - * -------------------------------------------------- - */ +/* -------------------------------------------------- + * Errata Workaround for Cortex A78 Errata #1941498. + * This applies to revisions r0p0, r1p0, and r1p1. + * x0: variant[4:7] and revision[0:3] of current cpu. + * Shall clobber: x0-x17 + * -------------------------------------------------- + */ func errata_a78_1941498_wa /* Compare x0 against revision <= r1p1 */ mov x17, x30 @@ -72,16 +72,16 @@ func check_errata_1941498 b cpu_rev_var_ls endfunc check_errata_1941498 - /* -------------------------------------------------- - * Errata Workaround for A78 Erratum 1951500. - * This applies to revisions r1p0 and r1p1 of A78. - * The issue also exists in r0p0 but there is no fix - * in that revision. - * Inputs: - * x0: variant[4:7] and revision[0:3] of current cpu. - * Shall clobber: x0-x17 - * -------------------------------------------------- - */ +/* -------------------------------------------------- + * Errata Workaround for A78 Erratum 1951500. + * This applies to revisions r1p0 and r1p1 of A78. + * The issue also exists in r0p0 but there is no fix + * in that revision. + * Inputs: + * x0: variant[4:7] and revision[0:3] of current cpu. + * Shall clobber: x0-x17 + * -------------------------------------------------- + */ func errata_a78_1951500_wa /* Compare x0 against revisions r1p0 - r1p1 */ mov x17, x30 @@ -126,6 +126,34 @@ func check_errata_1951500 b cpu_rev_var_range endfunc check_errata_1951500 +/* -------------------------------------------------- + * Errata Workaround for Cortex A78 Errata #1821534. + * This applies to revisions r0p0 and r1p0. + * x0: variant[4:7] and revision[0:3] of current cpu. + * Shall clobber: x0-x17 + * -------------------------------------------------- + */ +func errata_a78_1821534_wa + /* Check revision. */ + mov x17, x30 + bl check_errata_1821534 + cbz x0, 1f + + /* Set bit 2 in ACTLR2_EL1 */ + mrs x1, CORTEX_A78_ACTLR2_EL1 + orr x1, x1, #CORTEX_A78_ACTLR2_EL1_BIT_2 + msr CORTEX_A78_ACTLR2_EL1, x1 + isb +1: + ret x17 +endfunc errata_a78_1821534_wa + +func check_errata_1821534 + /* Applies to r0p0 and r1p0 */ + mov x1, #0x10 + b cpu_rev_var_ls +endfunc check_errata_1821534 + /* ------------------------------------------------- * The CPU Ops reset function for Cortex-A78 * ------------------------------------------------- @@ -150,6 +178,11 @@ func cortex_a78_reset_func bl errata_a78_1951500_wa #endif +#if ERRATA_A78_1821534 + mov x0, x18 + bl errata_a78_1821534_wa +#endif + #if ENABLE_AMU /* Make sure accesses from EL0/EL1 and EL2 are not trapped to EL3 */ mrs x0, actlr_el3 @@ -207,6 +240,7 @@ func cortex_a78_errata_report report_errata ERRATA_A78_1688305, cortex_a78, 1688305 report_errata ERRATA_A78_1941498, cortex_a78, 1941498 report_errata ERRATA_A78_1951500, cortex_a78, 1951500 + report_errata ERRATA_A78_1821534, cortex_a78, 1821534 ldp x8, x30, [sp], #16 ret diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk index fb3334676..541a2a2cf 100644 --- a/lib/cpus/cpu-ops.mk +++ b/lib/cpus/cpu-ops.mk @@ -307,6 +307,10 @@ ERRATA_A78_1941498 ?=0 # well but there is no workaround for that revision. ERRATA_A78_1951500 ?=0 +# Flag to apply erratum 1821534 workaround during reset. This erratum applies +# to revisions r0p0 and r1p0 of the A78 cpu. +ERRATA_A78_1821534 ?=0 + # Flag to apply T32 CLREX workaround during reset. This erratum applies # only to r0p0 and r1p0 of the Neoverse N1 cpu. ERRATA_N1_1043202 ?=0 @@ -605,6 +609,10 @@ $(eval $(call add_define,ERRATA_A78_1941498)) $(eval $(call assert_boolean,ERRATA_A78_1951500)) $(eval $(call add_define,ERRATA_A78_1951500)) +# Process ERRATA_A78_1821534 flag +$(eval $(call assert_boolean,ERRATA_A78_1821534)) +$(eval $(call add_define,ERRATA_A78_1821534)) + # Process ERRATA_N1_1043202 flag $(eval $(call assert_boolean,ERRATA_N1_1043202)) $(eval $(call add_define,ERRATA_N1_1043202)) -- cgit v1.2.3