diff options
author | Marat Dukhan <marat@fb.com> | 2018-07-13 21:24:51 -0700 |
---|---|---|
committer | Marat Dukhan <marat@fb.com> | 2018-07-13 21:27:31 -0700 |
commit | 31b7c01bc1bb2ed3ae7656a13d2667cc818b2ee9 (patch) | |
tree | dd68f92b7aba36973d2e64a5af0efd3918a14d89 | |
parent | 0902104a51a7bcac0cae59f48e2c1cf6eadc3335 (diff) | |
download | cpuinfo-31b7c01bc1bb2ed3ae7656a13d2667cc818b2ee9.tar.gz |
Add Oppo R15 mock test
-rw-r--r-- | CMakeLists.txt | 5 | ||||
-rw-r--r-- | jni/Android.mk | 7 | ||||
-rwxr-xr-x | scripts/android-arm64-mock.sh | 2 | ||||
-rwxr-xr-x | scripts/android-armv7-mock.sh | 2 | ||||
-rw-r--r-- | test/cpuinfo/oppo-r15.armeabi.log | 82 | ||||
-rw-r--r-- | test/cpuinfo/oppo-r15.log | 74 | ||||
-rw-r--r-- | test/mock/oppo-r15.cc | 772 | ||||
-rw-r--r-- | test/mock/oppo-r15.h | 5491 |
8 files changed, 6435 insertions, 0 deletions
diff --git a/CMakeLists.txt b/CMakeLists.txt index 1f11d30..434f0a7 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -630,6 +630,11 @@ IF(CPUINFO_SUPPORTED_PLATFORM AND CPUINFO_BUILD_MOCK_TESTS) TARGET_LINK_LIBRARIES(oppo-r9-test PRIVATE cpuinfo_mock gtest) ADD_TEST(oppo-r9-test oppo-r9-test) + ADD_EXECUTABLE(oppo-r15-test test/mock/oppo-r15.cc) + TARGET_INCLUDE_DIRECTORIES(oppo-r15-test BEFORE PRIVATE test/mock) + TARGET_LINK_LIBRARIES(oppo-r15-test PRIVATE cpuinfo_mock gtest) + ADD_TEST(oppo-r15-test oppo-r15-test) + ADD_EXECUTABLE(pixel-test test/mock/pixel.cc) TARGET_INCLUDE_DIRECTORIES(pixel-test BEFORE PRIVATE test/mock) TARGET_LINK_LIBRARIES(pixel-test PRIVATE cpuinfo_mock gtest) diff --git a/jni/Android.mk b/jni/Android.mk index a042cbb..56f60b0 100644 --- a/jni/Android.mk +++ b/jni/Android.mk @@ -682,6 +682,13 @@ LOCAL_STATIC_LIBRARIES := cpuinfo_mock gtest include $(BUILD_EXECUTABLE) include $(CLEAR_VARS) +LOCAL_MODULE := oppo-r15-test +LOCAL_SRC_FILES := $(LOCAL_PATH)/test/mock/oppo-r15.cc +LOCAL_C_INCLUDES := $(LOCAL_PATH)/test/mock +LOCAL_STATIC_LIBRARIES := cpuinfo_mock gtest +include $(BUILD_EXECUTABLE) + +include $(CLEAR_VARS) LOCAL_MODULE := pixel-test LOCAL_SRC_FILES := $(LOCAL_PATH)/test/mock/pixel.cc LOCAL_C_INCLUDES := $(LOCAL_PATH)/test/mock diff --git a/scripts/android-arm64-mock.sh b/scripts/android-arm64-mock.sh index e8a1a93..326053d 100755 --- a/scripts/android-arm64-mock.sh +++ b/scripts/android-arm64-mock.sh @@ -30,6 +30,7 @@ adb push build/android/arm64-v8a/oneplus-5-test /data/local/tmp/oneplus-5-test adb push build/android/arm64-v8a/oneplus-5t-test /data/local/tmp/oneplus-5t-test adb push build/android/arm64-v8a/oppo-a37-test /data/local/tmp/oppo-a37-test adb push build/android/arm64-v8a/oppo-r9-test /data/local/tmp/oppo-r9-test +adb push build/android/arm64-v8a/oppo-r15-test /data/local/tmp/oppo-r15-test adb push build/android/arm64-v8a/pixel-c-test /data/local/tmp/pixel-c-test adb push build/android/arm64-v8a/pixel-xl-test /data/local/tmp/pixel-xl-test adb push build/android/arm64-v8a/pixel-test /data/local/tmp/pixel-test @@ -67,6 +68,7 @@ adb shell "/data/local/tmp/oneplus-5-test --gtest_color=yes" adb shell "/data/local/tmp/oneplus-5t-test --gtest_color=yes" adb shell "/data/local/tmp/oppo-a37-test --gtest_color=yes" adb shell "/data/local/tmp/oppo-r9-test --gtest_color=yes" +adb shell "/data/local/tmp/oppo-r15-test --gtest_color=yes" adb shell "/data/local/tmp/pixel-c-test --gtest_color=yes" adb shell "/data/local/tmp/pixel-xl-test --gtest_color=yes" adb shell "/data/local/tmp/pixel-test --gtest_color=yes" diff --git a/scripts/android-armv7-mock.sh b/scripts/android-armv7-mock.sh index fdf1b16..9fa47a7 100755 --- a/scripts/android-armv7-mock.sh +++ b/scripts/android-armv7-mock.sh @@ -62,6 +62,7 @@ adb push build/android/armeabi-v7a/oneplus-5-test /data/local/tmp/oneplus-5-test adb push build/android/armeabi-v7a/oneplus-5t-test /data/local/tmp/oneplus-5t-test adb push build/android/armeabi-v7a/oppo-a37-test /data/local/tmp/oppo-a37-test adb push build/android/armeabi-v7a/oppo-r9-test /data/local/tmp/oppo-r9-test +adb push build/android/armeabi-v7a/oppo-r15-test /data/local/tmp/oppo-r15-test adb push build/android/armeabi-v7a/padcod-10.1-test /data/local/tmp/padcod-10.1-test adb push build/android/armeabi-v7a/pixel-c-test /data/local/tmp/pixel-c-test adb push build/android/armeabi-v7a/pixel-xl-test /data/local/tmp/pixel-xl-test @@ -134,6 +135,7 @@ adb shell "/data/local/tmp/oneplus-5-test --gtest_color=yes" adb shell "/data/local/tmp/oneplus-5t-test --gtest_color=yes" adb shell "/data/local/tmp/oppo-a37-test --gtest_color=yes" adb shell "/data/local/tmp/oppo-r9-test --gtest_color=yes" +adb shell "/data/local/tmp/oppo-r15-test --gtest_color=yes" adb shell "/data/local/tmp/padcod-10.1-test --gtest_color=yes" adb shell "/data/local/tmp/pixel-c-test --gtest_color=yes" adb shell "/data/local/tmp/pixel-xl-test --gtest_color=yes" diff --git a/test/cpuinfo/oppo-r15.armeabi.log b/test/cpuinfo/oppo-r15.armeabi.log new file mode 100644 index 0000000..916bbef --- /dev/null +++ b/test/cpuinfo/oppo-r15.armeabi.log @@ -0,0 +1,82 @@ +Processor : AArch64 Processor rev 4 (aarch64) +processor : 0 +model name : ARMv8 Processor rev 4 (v8l) +BogoMIPS : 26.00 +Features : half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt lpae evtstrm aes pmull sha1 sha2 crc32 +CPU implementer : 0x41 +CPU architecture: 8 +CPU variant : 0x0 +CPU part : 0xd03 +CPU revision : 4 + +processor : 1 +model name : ARMv8 Processor rev 4 (v8l) +BogoMIPS : 26.00 +Features : half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt lpae evtstrm aes pmull sha1 sha2 crc32 +CPU implementer : 0x41 +CPU architecture: 8 +CPU variant : 0x0 +CPU part : 0xd03 +CPU revision : 4 + +processor : 2 +model name : ARMv8 Processor rev 4 (v8l) +BogoMIPS : 26.00 +Features : half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt lpae evtstrm aes pmull sha1 sha2 crc32 +CPU implementer : 0x41 +CPU architecture: 8 +CPU variant : 0x0 +CPU part : 0xd03 +CPU revision : 4 + +processor : 3 +model name : ARMv8 Processor rev 4 (v8l) +BogoMIPS : 26.00 +Features : half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt lpae evtstrm aes pmull sha1 sha2 crc32 +CPU implementer : 0x41 +CPU architecture: 8 +CPU variant : 0x0 +CPU part : 0xd03 +CPU revision : 4 + +processor : 4 +model name : ARMv8 Processor rev 2 (v8l) +BogoMIPS : 26.00 +Features : half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt lpae evtstrm aes pmull sha1 sha2 crc32 +CPU implementer : 0x41 +CPU architecture: 8 +CPU variant : 0x0 +CPU part : 0xd09 +CPU revision : 2 + +processor : 5 +model name : ARMv8 Processor rev 2 (v8l) +BogoMIPS : 26.00 +Features : half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt lpae evtstrm aes pmull sha1 sha2 crc32 +CPU implementer : 0x41 +CPU architecture: 8 +CPU variant : 0x0 +CPU part : 0xd09 +CPU revision : 2 + +processor : 6 +model name : ARMv8 Processor rev 2 (v8l) +BogoMIPS : 26.00 +Features : half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt lpae evtstrm aes pmull sha1 sha2 crc32 +CPU implementer : 0x41 +CPU architecture: 8 +CPU variant : 0x0 +CPU part : 0xd09 +CPU revision : 2 + +processor : 7 +model name : ARMv8 Processor rev 2 (v8l) +BogoMIPS : 26.00 +Features : half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt lpae evtstrm aes pmull sha1 sha2 crc32 +CPU implementer : 0x41 +CPU architecture: 8 +CPU variant : 0x0 +CPU part : 0xd09 +CPU revision : 2 + +Hardware : MT6771V/C
\ No newline at end of file diff --git a/test/cpuinfo/oppo-r15.log b/test/cpuinfo/oppo-r15.log new file mode 100644 index 0000000..97d1142 --- /dev/null +++ b/test/cpuinfo/oppo-r15.log @@ -0,0 +1,74 @@ +Processor : AArch64 Processor rev 4 (aarch64) +processor : 0 +BogoMIPS : 26.00 +Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 +CPU implementer : 0x41 +CPU architecture: 8 +CPU variant : 0x0 +CPU part : 0xd03 +CPU revision : 4 + +processor : 1 +BogoMIPS : 26.00 +Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 +CPU implementer : 0x41 +CPU architecture: 8 +CPU variant : 0x0 +CPU part : 0xd03 +CPU revision : 4 + +processor : 2 +BogoMIPS : 26.00 +Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 +CPU implementer : 0x41 +CPU architecture: 8 +CPU variant : 0x0 +CPU part : 0xd03 +CPU revision : 4 + +processor : 3 +BogoMIPS : 26.00 +Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 +CPU implementer : 0x41 +CPU architecture: 8 +CPU variant : 0x0 +CPU part : 0xd03 +CPU revision : 4 + +processor : 4 +BogoMIPS : 26.00 +Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 +CPU implementer : 0x41 +CPU architecture: 8 +CPU variant : 0x0 +CPU part : 0xd09 +CPU revision : 2 + +processor : 5 +BogoMIPS : 26.00 +Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 +CPU implementer : 0x41 +CPU architecture: 8 +CPU variant : 0x0 +CPU part : 0xd09 +CPU revision : 2 + +processor : 6 +BogoMIPS : 26.00 +Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 +CPU implementer : 0x41 +CPU architecture: 8 +CPU variant : 0x0 +CPU part : 0xd09 +CPU revision : 2 + +processor : 7 +BogoMIPS : 26.00 +Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 +CPU implementer : 0x41 +CPU architecture: 8 +CPU variant : 0x0 +CPU part : 0xd09 +CPU revision : 2 + +Hardware : MT6771V/C diff --git a/test/mock/oppo-r15.cc b/test/mock/oppo-r15.cc new file mode 100644 index 0000000..a9a5690 --- /dev/null +++ b/test/mock/oppo-r15.cc @@ -0,0 +1,772 @@ +#include <gtest/gtest.h> + +#include <cpuinfo.h> +#include <cpuinfo-mock.h> + + +TEST(PROCESSORS, count) { + ASSERT_EQ(8, cpuinfo_get_processors_count()); +} + +TEST(PROCESSORS, non_null) { + ASSERT_TRUE(cpuinfo_get_processors()); +} + +TEST(PROCESSORS, smt_id) { + for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { + ASSERT_EQ(0, cpuinfo_get_processor(i)->smt_id); + } +} + +TEST(PROCESSORS, core) { + for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { + ASSERT_EQ(cpuinfo_get_core(i), cpuinfo_get_processor(i)->core); + } +} + +TEST(PROCESSORS, cluster) { + for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { + switch (i) { + case 0: + case 1: + case 2: + case 3: + ASSERT_EQ(cpuinfo_get_cluster(0), cpuinfo_get_processor(i)->cluster); + break; + case 4: + case 5: + case 6: + case 7: + ASSERT_EQ(cpuinfo_get_cluster(1), cpuinfo_get_processor(i)->cluster); + break; + } + } +} + +TEST(PROCESSORS, package) { + for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { + ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_processor(i)->package); + } +} + +TEST(PROCESSORS, DISABLED_linux_id) { + for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { + switch (i) { + case 0: + case 1: + case 2: + case 3: + ASSERT_EQ(i + 4, cpuinfo_get_processor(i)->linux_id); + break; + case 4: + case 5: + case 6: + case 7: + ASSERT_EQ(i - 4, cpuinfo_get_processor(i)->linux_id); + break; + } + } +} + +TEST(PROCESSORS, l1i) { + for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { + ASSERT_EQ(cpuinfo_get_l1i_cache(i), cpuinfo_get_processor(i)->cache.l1i); + } +} + +TEST(PROCESSORS, l1d) { + for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { + ASSERT_EQ(cpuinfo_get_l1d_cache(i), cpuinfo_get_processor(i)->cache.l1d); + } +} + +TEST(PROCESSORS, l2) { + for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { + switch (i) { + case 0: + case 1: + case 2: + case 3: + ASSERT_EQ(cpuinfo_get_l2_cache(0), cpuinfo_get_processor(i)->cache.l2); + break; + case 4: + case 5: + case 6: + case 7: + ASSERT_EQ(cpuinfo_get_l2_cache(1), cpuinfo_get_processor(i)->cache.l2); + break; + } + } +} + +TEST(PROCESSORS, l3) { + for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { + ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l3); + } +} + +TEST(PROCESSORS, l4) { + for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { + ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l4); + } +} + +TEST(CORES, count) { + ASSERT_EQ(8, cpuinfo_get_cores_count()); +} + +TEST(CORES, non_null) { + ASSERT_TRUE(cpuinfo_get_cores()); +} + +TEST(CORES, processor_start) { + for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { + ASSERT_EQ(i, cpuinfo_get_core(i)->processor_start); + } +} + +TEST(CORES, processor_count) { + for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { + ASSERT_EQ(1, cpuinfo_get_core(i)->processor_count); + } +} + +TEST(CORES, core_id) { + for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { + ASSERT_EQ(i, cpuinfo_get_core(i)->core_id); + } +} + +TEST(CORES, cluster) { + for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { + switch (i) { + case 0: + case 1: + case 2: + case 3: + ASSERT_EQ(cpuinfo_get_cluster(0), cpuinfo_get_core(i)->cluster); + break; + case 4: + case 5: + case 6: + case 7: + ASSERT_EQ(cpuinfo_get_cluster(1), cpuinfo_get_core(i)->cluster); + break; + } + } +} + +TEST(CORES, package) { + for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { + ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_core(i)->package); + } +} + +TEST(CORES, vendor) { + for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { + ASSERT_EQ(cpuinfo_vendor_arm, cpuinfo_get_core(i)->vendor); + } +} + +TEST(CORES, uarch) { + for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { + switch (i) { + case 0: + case 1: + case 2: + case 3: + ASSERT_EQ(cpuinfo_uarch_cortex_a73, cpuinfo_get_core(i)->uarch); + break; + case 4: + case 5: + case 6: + case 7: + ASSERT_EQ(cpuinfo_uarch_cortex_a53, cpuinfo_get_core(i)->uarch); + break; + } + } +} + +TEST(CORES, midr) { + for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { + switch (i) { + case 0: + case 1: + case 2: + case 3: + ASSERT_EQ(UINT32_C(0x410FD092), cpuinfo_get_core(i)->midr); + break; + case 4: + case 5: + case 6: + case 7: + ASSERT_EQ(UINT32_C(0x410FD034), cpuinfo_get_core(i)->midr); + break; + } + } +} + +TEST(CORES, DISABLED_frequency) { + for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { + ASSERT_EQ(UINT64_C(1989000000), cpuinfo_get_core(i)->frequency); + } +} + +TEST(CLUSTERS, count) { + ASSERT_EQ(2, cpuinfo_get_clusters_count()); +} + +TEST(CLUSTERS, non_null) { + ASSERT_TRUE(cpuinfo_get_clusters()); +} + +TEST(CLUSTERS, processor_start) { + for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { + switch (i) { + case 0: + ASSERT_EQ(0, cpuinfo_get_cluster(i)->processor_start); + break; + case 1: + ASSERT_EQ(4, cpuinfo_get_cluster(i)->processor_start); + break; + } + } +} + +TEST(CLUSTERS, processor_count) { + for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { + ASSERT_EQ(4, cpuinfo_get_cluster(i)->processor_count); + } +} + +TEST(CLUSTERS, core_start) { + for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { + switch (i) { + case 0: + ASSERT_EQ(0, cpuinfo_get_cluster(i)->core_start); + break; + case 1: + ASSERT_EQ(4, cpuinfo_get_cluster(i)->core_start); + break; + } + } +} + +TEST(CLUSTERS, core_count) { + for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { + ASSERT_EQ(4, cpuinfo_get_cluster(i)->core_count); + } +} + +TEST(CLUSTERS, cluster_id) { + for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { + ASSERT_EQ(i, cpuinfo_get_cluster(i)->cluster_id); + } +} + +TEST(CLUSTERS, package) { + for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { + ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_cluster(i)->package); + } +} + +TEST(CLUSTERS, vendor) { + for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { + ASSERT_EQ(cpuinfo_vendor_arm, cpuinfo_get_cluster(i)->vendor); + } +} + +TEST(CLUSTERS, uarch) { + for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { + switch (i) { + case 0: + ASSERT_EQ(cpuinfo_uarch_cortex_a73, cpuinfo_get_cluster(i)->uarch); + break; + case 1: + ASSERT_EQ(cpuinfo_uarch_cortex_a53, cpuinfo_get_cluster(i)->uarch); + break; + } + } +} + +TEST(CLUSTERS, midr) { + for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { + switch (i) { + case 0: + ASSERT_EQ(UINT32_C(0x410FD092), cpuinfo_get_cluster(i)->midr); + break; + case 1: + ASSERT_EQ(UINT32_C(0x410FD034), cpuinfo_get_cluster(i)->midr); + break; + } + } +} + +TEST(CLUSTERS, DISABLED_frequency) { + for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { + ASSERT_EQ(UINT64_C(1989000000), cpuinfo_get_core(i)->frequency); + } +} + +TEST(PACKAGES, count) { + ASSERT_EQ(1, cpuinfo_get_packages_count()); +} + +TEST(PACKAGES, name) { + for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { + ASSERT_EQ("MediaTek MT6771V/C", + std::string(cpuinfo_get_package(i)->name, + strnlen(cpuinfo_get_package(i)->name, CPUINFO_PACKAGE_NAME_MAX))); + } +} + +TEST(PACKAGES, gpu_name) { + for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { + ASSERT_EQ("ARM Mali-G72", + std::string(cpuinfo_get_package(i)->gpu_name, + strnlen(cpuinfo_get_package(i)->gpu_name, CPUINFO_GPU_NAME_MAX))); + } +} + +TEST(PACKAGES, processor_start) { + for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { + ASSERT_EQ(0, cpuinfo_get_package(i)->processor_start); + } +} + +TEST(PACKAGES, processor_count) { + for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { + ASSERT_EQ(8, cpuinfo_get_package(i)->processor_count); + } +} + +TEST(PACKAGES, core_start) { + for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { + ASSERT_EQ(0, cpuinfo_get_package(i)->core_start); + } +} + +TEST(PACKAGES, core_count) { + for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { + ASSERT_EQ(8, cpuinfo_get_package(i)->core_count); + } +} + +TEST(PACKAGES, cluster_start) { + for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { + ASSERT_EQ(0, cpuinfo_get_package(i)->cluster_start); + } +} + +TEST(PACKAGES, cluster_count) { + for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { + ASSERT_EQ(2, cpuinfo_get_package(i)->cluster_count); + } +} + +TEST(ISA, thumb) { + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_thumb()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_thumb()); + #endif +} + +TEST(ISA, thumb2) { + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_thumb2()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_thumb2()); + #endif +} + +TEST(ISA, armv5e) { + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v5e()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v5e()); + #endif +} + +TEST(ISA, armv6) { + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v6()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v6()); + #endif +} + +TEST(ISA, armv6k) { + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v6k()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v6k()); + #endif +} + +TEST(ISA, armv7) { + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v7()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v7()); + #endif +} + +TEST(ISA, armv7mp) { + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v7mp()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v7mp()); + #endif +} + +TEST(ISA, idiv) { + ASSERT_TRUE(cpuinfo_has_arm_idiv()); +} + +TEST(ISA, vfpv2) { + ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); +} + +TEST(ISA, vfpv3) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); +} + +TEST(ISA, vfpv3_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); +} + +TEST(ISA, vfpv3_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16()); +} + +TEST(ISA, vfpv3_fp16_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32()); +} + +TEST(ISA, vfpv4) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4()); +} + +TEST(ISA, vfpv4_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32()); +} + +TEST(ISA, wmmx) { + ASSERT_FALSE(cpuinfo_has_arm_wmmx()); +} + +TEST(ISA, wmmx2) { + ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); +} + +TEST(ISA, neon) { + ASSERT_TRUE(cpuinfo_has_arm_neon()); +} + +TEST(ISA, neon_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fp16()); +} + +TEST(ISA, neon_fma) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fma()); +} + +TEST(ISA, atomics) { + ASSERT_FALSE(cpuinfo_has_arm_atomics()); +} + +TEST(ISA, neon_rdm) { + ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); +} + +TEST(ISA, fp16_arith) { + ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); +} + +TEST(ISA, jscvt) { + ASSERT_FALSE(cpuinfo_has_arm_jscvt()); +} + +TEST(ISA, fcma) { + ASSERT_FALSE(cpuinfo_has_arm_fcma()); +} + +TEST(ISA, aes) { + ASSERT_TRUE(cpuinfo_has_arm_aes()); +} + +TEST(ISA, sha1) { + ASSERT_TRUE(cpuinfo_has_arm_sha1()); +} + +TEST(ISA, sha2) { + ASSERT_TRUE(cpuinfo_has_arm_sha2()); +} + +TEST(ISA, pmull) { + ASSERT_TRUE(cpuinfo_has_arm_pmull()); +} + +TEST(ISA, crc32) { + ASSERT_TRUE(cpuinfo_has_arm_crc32()); +} + +TEST(L1I, count) { + ASSERT_EQ(8, cpuinfo_get_l1i_caches_count()); +} + +TEST(L1I, non_null) { + ASSERT_TRUE(cpuinfo_get_l1i_caches()); +} + +TEST(L1I, size) { + for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { + switch (i) { + case 0: + case 1: + case 2: + case 3: + ASSERT_EQ(64 * 1024, cpuinfo_get_l1i_cache(i)->size); + break; + case 4: + case 5: + case 6: + case 7: + ASSERT_EQ(16 * 1024, cpuinfo_get_l1i_cache(i)->size); + break; + } + } +} + +TEST(L1I, associativity) { + for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { + switch (i) { + case 0: + case 1: + case 2: + case 3: + ASSERT_EQ(4, cpuinfo_get_l1i_cache(i)->associativity); + break; + case 4: + case 5: + case 6: + case 7: + ASSERT_EQ(2, cpuinfo_get_l1i_cache(i)->associativity); + break; + } + } +} + +TEST(L1I, sets) { + for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { + ASSERT_EQ(cpuinfo_get_l1i_cache(i)->size, + cpuinfo_get_l1i_cache(i)->sets * cpuinfo_get_l1i_cache(i)->line_size * cpuinfo_get_l1i_cache(i)->partitions * cpuinfo_get_l1i_cache(i)->associativity); + } +} + +TEST(L1I, partitions) { + for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { + ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->partitions); + } +} + +TEST(L1I, line_size) { + for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { + ASSERT_EQ(64, cpuinfo_get_l1i_cache(i)->line_size); + } +} + +TEST(L1I, flags) { + for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { + ASSERT_EQ(0, cpuinfo_get_l1i_cache(i)->flags); + } +} + +TEST(L1I, processors) { + for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { + ASSERT_EQ(i, cpuinfo_get_l1i_cache(i)->processor_start); + ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->processor_count); + } +} + +TEST(L1D, count) { + ASSERT_EQ(8, cpuinfo_get_l1d_caches_count()); +} + +TEST(L1D, non_null) { + ASSERT_TRUE(cpuinfo_get_l1d_caches()); +} + +TEST(L1D, size) { + for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { + switch (i) { + case 0: + case 1: + case 2: + case 3: + ASSERT_EQ(64 * 1024, cpuinfo_get_l1d_cache(i)->size); + break; + case 4: + case 5: + case 6: + case 7: + ASSERT_EQ(16 * 1024, cpuinfo_get_l1d_cache(i)->size); + break; + } + } +} + +TEST(L1D, associativity) { + for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { + switch (i) { + case 0: + case 1: + case 2: + case 3: + ASSERT_EQ(16, cpuinfo_get_l1d_cache(i)->associativity); + break; + case 4: + case 5: + case 6: + case 7: + ASSERT_EQ(4, cpuinfo_get_l1d_cache(i)->associativity); + break; + } + } +} + +TEST(L1D, sets) { + for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { + ASSERT_EQ(cpuinfo_get_l1d_cache(i)->size, + cpuinfo_get_l1d_cache(i)->sets * cpuinfo_get_l1d_cache(i)->line_size * cpuinfo_get_l1d_cache(i)->partitions * cpuinfo_get_l1d_cache(i)->associativity); + } +} + +TEST(L1D, partitions) { + for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { + ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->partitions); + } +} + +TEST(L1D, line_size) { + for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { + ASSERT_EQ(64, cpuinfo_get_l1d_cache(i)->line_size); + } +} + +TEST(L1D, flags) { + for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { + ASSERT_EQ(0, cpuinfo_get_l1d_cache(i)->flags); + } +} + +TEST(L1D, processors) { + for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { + ASSERT_EQ(i, cpuinfo_get_l1d_cache(i)->processor_start); + ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->processor_count); + } +} + +TEST(L2, count) { + ASSERT_EQ(2, cpuinfo_get_l2_caches_count()); +} + +TEST(L2, non_null) { + ASSERT_TRUE(cpuinfo_get_l2_caches()); +} + +TEST(L2, size) { + for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { + switch (i) { + case 0: + ASSERT_EQ(1024 * 1024, cpuinfo_get_l2_cache(i)->size); + break; + case 1: + ASSERT_EQ(256 * 1024, cpuinfo_get_l2_cache(i)->size); + break; + } + } +} + +TEST(L2, associativity) { + for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { + ASSERT_EQ(16, cpuinfo_get_l2_cache(i)->associativity); + } +} + +TEST(L2, sets) { + for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { + ASSERT_EQ(cpuinfo_get_l2_cache(i)->size, + cpuinfo_get_l2_cache(i)->sets * cpuinfo_get_l2_cache(i)->line_size * cpuinfo_get_l2_cache(i)->partitions * cpuinfo_get_l2_cache(i)->associativity); + } +} + +TEST(L2, partitions) { + for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { + ASSERT_EQ(1, cpuinfo_get_l2_cache(i)->partitions); + } +} + +TEST(L2, line_size) { + for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { + ASSERT_EQ(64, cpuinfo_get_l2_cache(i)->line_size); + } +} + +TEST(L2, flags) { + for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { + switch (i) { + case 0: + ASSERT_EQ(CPUINFO_CACHE_INCLUSIVE, cpuinfo_get_l2_cache(i)->flags); + break; + case 1: + ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->flags); + break; + } + } +} + +TEST(L2, processors) { + for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { + switch (i) { + case 0: + ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->processor_start); + ASSERT_EQ(4, cpuinfo_get_l2_cache(i)->processor_count); + break; + case 1: + ASSERT_EQ(4, cpuinfo_get_l2_cache(i)->processor_start); + ASSERT_EQ(4, cpuinfo_get_l2_cache(i)->processor_count); + break; + } + } +} + +TEST(L3, none) { + ASSERT_EQ(0, cpuinfo_get_l3_caches_count()); + ASSERT_FALSE(cpuinfo_get_l3_caches()); +} + +TEST(L4, none) { + ASSERT_EQ(0, cpuinfo_get_l4_caches_count()); + ASSERT_FALSE(cpuinfo_get_l4_caches()); +} + +#include <oppo-r15.h> + +int main(int argc, char* argv[]) { +#if CPUINFO_ARCH_ARM + cpuinfo_set_hwcap(UINT32_C(0x0037B0D6)); + cpuinfo_set_hwcap2(UINT32_C(0x0000001F)); +#elif CPUINFO_ARCH_ARM64 + cpuinfo_set_hwcap(UINT32_C(0x000000FF)); +#endif + cpuinfo_mock_filesystem(filesystem); +#ifdef __ANDROID__ + cpuinfo_mock_android_properties(properties); + cpuinfo_mock_gl_renderer("Mali-G72"); +#endif + cpuinfo_initialize(); + ::testing::InitGoogleTest(&argc, argv); + return RUN_ALL_TESTS(); +} diff --git a/test/mock/oppo-r15.h b/test/mock/oppo-r15.h new file mode 100644 index 0000000..a1246be --- /dev/null +++ b/test/mock/oppo-r15.h @@ -0,0 +1,5491 @@ +struct cpuinfo_mock_file filesystem[] = { +#if CPUINFO_ARCH_ARM64 + { + .path = "/proc/cpuinfo", + .size = 1515, + .content = + "Processor\t: AArch64 Processor rev 4 (aarch64)\n" + "processor\t: 0\n" + "BogoMIPS\t: 26.00\n" + "Features\t: fp asimd evtstrm aes pmull sha1 sha2 crc32\n" + "CPU implementer\t: 0x41\n" + "CPU architecture: 8\n" + "CPU variant\t: 0x0\n" + "CPU part\t: 0xd03\n" + "CPU revision\t: 4\n" + "\n" + "processor\t: 1\n" + "BogoMIPS\t: 26.00\n" + "Features\t: fp asimd evtstrm aes pmull sha1 sha2 crc32\n" + "CPU implementer\t: 0x41\n" + "CPU architecture: 8\n" + "CPU variant\t: 0x0\n" + "CPU part\t: 0xd03\n" + "CPU revision\t: 4\n" + "\n" + "processor\t: 2\n" + "BogoMIPS\t: 26.00\n" + "Features\t: fp asimd evtstrm aes pmull sha1 sha2 crc32\n" + "CPU implementer\t: 0x41\n" + "CPU architecture: 8\n" + "CPU variant\t: 0x0\n" + "CPU part\t: 0xd03\n" + "CPU revision\t: 4\n" + "\n" + "processor\t: 3\n" + "BogoMIPS\t: 26.00\n" + "Features\t: fp asimd evtstrm aes pmull sha1 sha2 crc32\n" + "CPU implementer\t: 0x41\n" + "CPU architecture: 8\n" + "CPU variant\t: 0x0\n" + "CPU part\t: 0xd03\n" + "CPU revision\t: 4\n" + "\n" + "processor\t: 4\n" + "BogoMIPS\t: 26.00\n" + "Features\t: fp asimd evtstrm aes pmull sha1 sha2 crc32\n" + "CPU implementer\t: 0x41\n" + "CPU architecture: 8\n" + "CPU variant\t: 0x0\n" + "CPU part\t: 0xd09\n" + "CPU revision\t: 2\n" + "\n" + "processor\t: 5\n" + "BogoMIPS\t: 26.00\n" + "Features\t: fp asimd evtstrm aes pmull sha1 sha2 crc32\n" + "CPU implementer\t: 0x41\n" + "CPU architecture: 8\n" + "CPU variant\t: 0x0\n" + "CPU part\t: 0xd09\n" + "CPU revision\t: 2\n" + "\n" + "processor\t: 6\n" + "BogoMIPS\t: 26.00\n" + "Features\t: fp asimd evtstrm aes pmull sha1 sha2 crc32\n" + "CPU implementer\t: 0x41\n" + "CPU architecture: 8\n" + "CPU variant\t: 0x0\n" + "CPU part\t: 0xd09\n" + "CPU revision\t: 2\n" + "\n" + "processor\t: 7\n" + "BogoMIPS\t: 26.00\n" + "Features\t: fp asimd evtstrm aes pmull sha1 sha2 crc32\n" + "CPU implementer\t: 0x41\n" + "CPU architecture: 8\n" + "CPU variant\t: 0x0\n" + "CPU part\t: 0xd09\n" + "CPU revision\t: 2\n" + "\n" + "Hardware\t: MT6771V/C\n", + }, +#elif CPUINFO_ARCH_ARM + { + .path = "/proc/cpuinfo", + .size = 2306, + .content = + "Processor\t: AArch64 Processor rev 4 (aarch64)\n" + "processor\t: 0\n" + "model name\t: ARMv8 Processor rev 4 (v8l)\n" + "BogoMIPS\t: 26.00\n" + "Features\t: half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt lpae evtstrm aes pmull sha1 sha2 crc32\n" + "CPU implementer\t: 0x41\n" + "CPU architecture: 8\n" + "CPU variant\t: 0x0\n" + "CPU part\t: 0xd03\n" + "CPU revision\t: 4\n" + "\n" + "processor\t: 1\n" + "model name\t: ARMv8 Processor rev 4 (v8l)\n" + "BogoMIPS\t: 26.00\n" + "Features\t: half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt lpae evtstrm aes pmull sha1 sha2 crc32\n" + "CPU implementer\t: 0x41\n" + "CPU architecture: 8\n" + "CPU variant\t: 0x0\n" + "CPU part\t: 0xd03\n" + "CPU revision\t: 4\n" + "\n" + "processor\t: 2\n" + "model name\t: ARMv8 Processor rev 4 (v8l)\n" + "BogoMIPS\t: 26.00\n" + "Features\t: half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt lpae evtstrm aes pmull sha1 sha2 crc32\n" + "CPU implementer\t: 0x41\n" + "CPU architecture: 8\n" + "CPU variant\t: 0x0\n" + "CPU part\t: 0xd03\n" + "CPU revision\t: 4\n" + "\n" + "processor\t: 3\n" + "model name\t: ARMv8 Processor rev 4 (v8l)\n" + "BogoMIPS\t: 26.00\n" + "Features\t: half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt lpae evtstrm aes pmull sha1 sha2 crc32\n" + "CPU implementer\t: 0x41\n" + "CPU architecture: 8\n" + "CPU variant\t: 0x0\n" + "CPU part\t: 0xd03\n" + "CPU revision\t: 4\n" + "\n" + "processor\t: 4\n" + "model name\t: ARMv8 Processor rev 2 (v8l)\n" + "BogoMIPS\t: 26.00\n" + "Features\t: half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt lpae evtstrm aes pmull sha1 sha2 crc32\n" + "CPU implementer\t: 0x41\n" + "CPU architecture: 8\n" + "CPU variant\t: 0x0\n" + "CPU part\t: 0xd09\n" + "CPU revision\t: 2\n" + "\n" + "processor\t: 5\n" + "model name\t: ARMv8 Processor rev 2 (v8l)\n" + "BogoMIPS\t: 26.00\n" + "Features\t: half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt lpae evtstrm aes pmull sha1 sha2 crc32\n" + "CPU implementer\t: 0x41\n" + "CPU architecture: 8\n" + "CPU variant\t: 0x0\n" + "CPU part\t: 0xd09\n" + "CPU revision\t: 2\n" + "\n" + "processor\t: 6\n" + "model name\t: ARMv8 Processor rev 2 (v8l)\n" + "BogoMIPS\t: 26.00\n" + "Features\t: half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt lpae evtstrm aes pmull sha1 sha2 crc32\n" + "CPU implementer\t: 0x41\n" + "CPU architecture: 8\n" + "CPU variant\t: 0x0\n" + "CPU part\t: 0xd09\n" + "CPU revision\t: 2\n" + "\n" + "processor\t: 7\n" + "model name\t: ARMv8 Processor rev 2 (v8l)\n" + "BogoMIPS\t: 26.00\n" + "Features\t: half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt lpae evtstrm aes pmull sha1 sha2 crc32\n" + "CPU implementer\t: 0x41\n" + "CPU architecture: 8\n" + "CPU variant\t: 0x0\n" + "CPU part\t: 0xd09\n" + "CPU revision\t: 2\n" + "\n" + "Hardware\t: MT6771V/C", + }, +#endif + { + .path = "/sys/devices/system/cpu/isolated", + .size = 1, + .content = "\n", + }, + { + .path = "/sys/devices/system/cpu/kernel_max", + .size = 2, + .content = "7\n", + }, + { + .path = "/sys/devices/system/cpu/modalias", + .size = 66, + .content = "cpu:type:aarch64:feature:,0000,0001,0002,0003,0004,0005,0006,0007\n", + }, + { + .path = "/sys/devices/system/cpu/offline", + .size = 1, + .content = "\n", + }, + { + .path = "/sys/devices/system/cpu/online", + .size = 4, + .content = "0-7\n", + }, + { + .path = "/sys/devices/system/cpu/possible", + .size = 4, + .content = "0-7\n", + }, + { + .path = "/sys/devices/system/cpu/present", + .size = 4, + .content = "0-7\n", + }, + { + .path = "/sys/devices/system/cpu/sched_isolated", + .size = 4, + .content = "4-7\n", + }, + { + .path = "/sys/devices/system/cpu/cpuidle/current_driver", + .size = 26, + .content = "mt67xx_acao_cpuidle_set_0\n", + }, + { + .path = "/sys/devices/system/cpu/cpuidle/current_governor_ro", + .size = 9, + .content = "mtk_menu\n", + }, + { + .path = "/sys/devices/system/cpu/cputopo/cpus_per_cluster", + .size = 25, + .content = + "cluster0: f\n" + "cluster1: f0\n", + }, + { + .path = "/sys/devices/system/cpu/cputopo/glbinfo", + .size = 72, + .content = + "big/little arch: yes\n" + "nr_cups: 8\n" + "nr_clusters: 2\n" + "cluster0: f\n" + "cluster1: f0\n", + }, + { + .path = "/sys/devices/system/cpu/cputopo/is_big_little", + .size = 2, + .content = "1\n", + }, + { + .path = "/sys/devices/system/cpu/cputopo/is_multi_cluster", + .size = 2, + .content = "1\n", + }, + { + .path = "/sys/devices/system/cpu/cputopo/nr_clusters", + .size = 2, + .content = "2\n", + }, + { + .path = "/sys/devices/system/cpu/cpu0/cpuidle/driver/name", + .size = 26, + .content = "mt67xx_acao_cpuidle_set_0\n", + }, + { + .path = "/sys/devices/system/cpu/cpu0/cpufreq/affected_cpus", + .size = 8, + .content = "0 1 2 3\n", + }, + { + .path = "/sys/devices/system/cpu/cpu0/cpufreq/cpuinfo_max_freq", + .size = 8, + .content = "1989000\n", + }, + { + .path = "/sys/devices/system/cpu/cpu0/cpufreq/cpuinfo_min_freq", + .size = 7, + .content = "793000\n", + }, + { + .path = "/sys/devices/system/cpu/cpu0/cpufreq/cpuinfo_transition_latency", + .size = 5, + .content = "1000\n", + }, + { + .path = "/sys/devices/system/cpu/cpu0/cpufreq/related_cpus", + .size = 8, + .content = "0 1 2 3\n", + }, + { + .path = "/sys/devices/system/cpu/cpu0/cpufreq/scaling_available_frequencies", + .size = 127, + .content = "1989000 1924000 1846000 1781000 1716000 1677000 1625000 1586000 1508000 1417000 1326000 1248000 1131000 1014000 910000 793000 \n", + }, + { + .path = "/sys/devices/system/cpu/cpu0/cpufreq/scaling_available_governors", + .size = 64, + .content = "ondemand userspace powersave interactive performance schedplus \n", + }, + { + .path = "/sys/devices/system/cpu/cpu0/cpufreq/scaling_cur_freq", + .size = 7, + .content = "793000\n", + }, + { + .path = "/sys/devices/system/cpu/cpu0/cpufreq/scaling_driver", + .size = 11, + .content = "mt-cpufreq\n", + }, + { + .path = "/sys/devices/system/cpu/cpu0/cpufreq/scaling_min_freq", + .size = 7, + .content = "793000\n", + }, + { + .path = "/sys/devices/system/cpu/cpu0/cpufreq/sched/down_throttle_nsec", + .size = 8, + .content = "4000000\n", + }, + { + .path = "/sys/devices/system/cpu/cpu0/cpufreq/sched/up_throttle_nsec", + .size = 2, + .content = "0\n", + }, + { + .path = "/sys/devices/system/cpu/cpu0/cpufreq/stats/time_in_state", + .size = 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"/sys/devices/system/cpu/cpu4/cpufreq/stats/time_in_state", + .size = 178, + .content = + "1989000 5860\n" + "1924000 14\n" + "1846000 100\n" + "1781000 2\n" + "1716000 2\n" + "1677000 0\n" + "1625000 12\n" + "1586000 10\n" + "1508000 0\n" + "1417000 12\n" + "1326000 4\n" + "1248000 51\n" + "1131000 240\n" + "1014000 138\n" + "910000 180\n" + "793000 94210\n", + }, + { + .path = "/sys/devices/system/cpu/cpu4/cpufreq/stats/total_trans", + .size = 4, + .content = "162\n", + }, + { + .path = "/sys/devices/system/cpu/cpu4/cpufreq/stats/trans_table", + .size = 2941, + .content = + " From : To\n" + " : 1989000 1924000 1846000 1781000 1716000 1677000 1625000 1586000 1508000 1417000 1326000 1248000 1131000 1014000 910000 793000 \n" + " 1989000: 0 4 5 1 0 0 1 1 0 3 1 0 1 0 2 14 \n" + " 1924000: 4 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 \n" + " 1846000: 9 0 0 0 0 0 0 0 0 0 0 0 0 2 4 1 \n" + " 1781000: 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 \n" + " 1716000: 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 \n" + " 1677000: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 \n" + " 1625000: 2 0 0 0 0 0 0 1 0 0 0 1 0 1 0 0 \n" + " 1586000: 2 1 0 0 0 0 1 0 0 0 0 0 0 0 0 1 \n" + " 1508000: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 \n" + " 1417000: 2 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 \n" + " 1326000: 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 \n" + " 1248000: 1 1 0 0 0 0 0 1 0 1 1 0 3 0 0 2 \n" + " 1131000: 3 0 0 0 0 0 0 0 0 0 0 3 0 2 0 8 \n" + " 1014000: 2 0 2 0 0 0 0 0 0 0 0 0 5 0 1 2 \n" + " 910000: 5 0 1 0 0 0 0 0 0 0 0 1 0 2 0 7 \n" + " 793000: 3 0 8 0 0 0 1 1 0 0 0 2 6 5 9 0 \n", + }, + { + .path = "/sys/devices/system/cpu/cpu4/topology/core_id", + .size = 2, + .content = "0\n", + }, + { + .path = "/sys/devices/system/cpu/cpu4/topology/core_siblings", + .size = 3, + .content = "f0\n", + }, + { + .path = "/sys/devices/system/cpu/cpu4/topology/core_siblings_list", + .size = 4, + .content = "4-7\n", + }, + { + .path = "/sys/devices/system/cpu/cpu4/topology/physical_package_id", + .size = 2, + .content = "1\n", + }, + { + .path = "/sys/devices/system/cpu/cpu4/topology/thread_siblings", + .size = 3, + .content = "10\n", + }, + { + .path = "/sys/devices/system/cpu/cpu4/topology/thread_siblings_list", + .size = 2, + .content = "4\n", + }, + { + .path = "/sys/devices/system/cpu/cpu5/cpuidle/driver/name", + .size = 26, + .content = "mt67xx_acao_cpuidle_set_1\n", + }, + { + .path = "/sys/devices/system/cpu/cpu5/cpufreq/affected_cpus", + .size = 8, + .content = "4 5 6 7\n", + }, + { + .path = "/sys/devices/system/cpu/cpu5/cpufreq/cpuinfo_max_freq", + .size = 8, + .content = "1989000\n", + }, + { + .path = "/sys/devices/system/cpu/cpu5/cpufreq/cpuinfo_min_freq", + .size = 7, + .content = "793000\n", + }, + { + .path = "/sys/devices/system/cpu/cpu5/cpufreq/cpuinfo_transition_latency", + .size = 5, + .content = "1000\n", + }, + { + .path = "/sys/devices/system/cpu/cpu5/cpufreq/related_cpus", + .size = 8, + .content = "4 5 6 7\n", + }, + { + .path = "/sys/devices/system/cpu/cpu5/cpufreq/scaling_available_frequencies", + .size = 127, + .content = "1989000 1924000 1846000 1781000 1716000 1677000 1625000 1586000 1508000 1417000 1326000 1248000 1131000 1014000 910000 793000 \n", + }, + { + .path = "/sys/devices/system/cpu/cpu5/cpufreq/scaling_available_governors", + .size = 64, + .content = "ondemand userspace powersave interactive performance schedplus \n", + }, + { + .path = "/sys/devices/system/cpu/cpu5/cpufreq/scaling_cur_freq", + .size = 7, + .content = "793000\n", + }, + { + .path = "/sys/devices/system/cpu/cpu5/cpufreq/scaling_driver", + .size = 11, + .content = "mt-cpufreq\n", + }, + { + .path = "/sys/devices/system/cpu/cpu5/cpufreq/scaling_max_freq", + .size = 7, + .content = "793000\n", + }, + { + .path = "/sys/devices/system/cpu/cpu5/cpufreq/scaling_min_freq", + .size = 7, + .content = "793000\n", + }, + { + .path = "/sys/devices/system/cpu/cpu5/cpufreq/sched/down_throttle_nsec", + .size = 8, + .content = "4000000\n", + }, + { + .path = "/sys/devices/system/cpu/cpu5/cpufreq/sched/up_throttle_nsec", + .size = 2, + .content = "0\n", + }, + { + .path = "/sys/devices/system/cpu/cpu5/cpufreq/stats/time_in_state", + .size = 178, + .content = + "1989000 5860\n" + "1924000 14\n" + "1846000 100\n" + "1781000 2\n" + "1716000 2\n" + "1677000 0\n" + "1625000 12\n" + "1586000 10\n" + "1508000 0\n" + "1417000 12\n" + "1326000 4\n" + "1248000 51\n" + "1131000 240\n" + "1014000 138\n" + "910000 180\n" + "793000 94410\n", + }, + { + .path = "/sys/devices/system/cpu/cpu5/cpufreq/stats/total_trans", + .size = 4, + .content = "162\n", + }, + { + .path = "/sys/devices/system/cpu/cpu5/cpufreq/stats/trans_table", + .size = 2941, + .content = + " From : To\n" + " : 1989000 1924000 1846000 1781000 1716000 1677000 1625000 1586000 1508000 1417000 1326000 1248000 1131000 1014000 910000 793000 \n" + " 1989000: 0 4 5 1 0 0 1 1 0 3 1 0 1 0 2 14 \n" + " 1924000: 4 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 \n" + " 1846000: 9 0 0 0 0 0 0 0 0 0 0 0 0 2 4 1 \n" + " 1781000: 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 \n" + " 1716000: 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 \n" + " 1677000: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 \n" + " 1625000: 2 0 0 0 0 0 0 1 0 0 0 1 0 1 0 0 \n" + " 1586000: 2 1 0 0 0 0 1 0 0 0 0 0 0 0 0 1 \n" + " 1508000: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 \n" + " 1417000: 2 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 \n" + " 1326000: 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 \n" + " 1248000: 1 1 0 0 0 0 0 1 0 1 1 0 3 0 0 2 \n" + " 1131000: 3 0 0 0 0 0 0 0 0 0 0 3 0 2 0 8 \n" + " 1014000: 2 0 2 0 0 0 0 0 0 0 0 0 5 0 1 2 \n" + " 910000: 5 0 1 0 0 0 0 0 0 0 0 1 0 2 0 7 \n" + " 793000: 3 0 8 0 0 0 1 1 0 0 0 2 6 5 9 0 \n", + }, + { + .path = "/sys/devices/system/cpu/cpu5/topology/core_id", + .size = 2, + .content = "1\n", + }, + { + .path = "/sys/devices/system/cpu/cpu5/topology/core_siblings", + .size = 3, + .content = "f0\n", + }, + { + .path = "/sys/devices/system/cpu/cpu5/topology/core_siblings_list", + .size = 4, + .content = "4-7\n", + }, + { + .path = "/sys/devices/system/cpu/cpu5/topology/physical_package_id", + .size = 2, + .content = "1\n", + }, + { + .path = "/sys/devices/system/cpu/cpu5/topology/thread_siblings", + .size = 3, + .content = "20\n", + }, + { + .path = "/sys/devices/system/cpu/cpu5/topology/thread_siblings_list", + .size = 2, + .content = "5\n", + }, + { + .path = "/sys/devices/system/cpu/cpu6/cpuidle/driver/name", + .size = 26, + .content = "mt67xx_acao_cpuidle_set_1\n", + }, + { + .path = "/sys/devices/system/cpu/cpu6/cpufreq/affected_cpus", + .size = 8, + .content = "4 5 6 7\n", + }, + { + .path = "/sys/devices/system/cpu/cpu6/cpufreq/cpuinfo_max_freq", + .size = 8, + .content = "1989000\n", + }, + { + .path = "/sys/devices/system/cpu/cpu6/cpufreq/cpuinfo_min_freq", + .size = 7, + .content = "793000\n", + }, + { + .path = "/sys/devices/system/cpu/cpu6/cpufreq/cpuinfo_transition_latency", + .size = 5, + .content = "1000\n", + }, + { + .path = "/sys/devices/system/cpu/cpu6/cpufreq/related_cpus", + .size = 8, + .content = "4 5 6 7\n", + }, + { + .path = "/sys/devices/system/cpu/cpu6/cpufreq/scaling_available_frequencies", + .size = 127, + .content = "1989000 1924000 1846000 1781000 1716000 1677000 1625000 1586000 1508000 1417000 1326000 1248000 1131000 1014000 910000 793000 \n", + }, + { + .path = "/sys/devices/system/cpu/cpu6/cpufreq/scaling_available_governors", + .size = 64, + .content = "ondemand userspace powersave interactive performance schedplus \n", + }, + { + .path = "/sys/devices/system/cpu/cpu6/cpufreq/scaling_cur_freq", + .size = 7, + .content = "793000\n", + }, + { + .path = "/sys/devices/system/cpu/cpu6/cpufreq/scaling_driver", + .size = 11, + .content = "mt-cpufreq\n", + }, + { + .path = "/sys/devices/system/cpu/cpu6/cpufreq/scaling_max_freq", + .size = 7, + .content = "793000\n", + }, + { + .path = "/sys/devices/system/cpu/cpu6/cpufreq/scaling_min_freq", + .size = 7, + .content = "793000\n", + }, + { + .path = "/sys/devices/system/cpu/cpu6/cpufreq/sched/down_throttle_nsec", + .size = 8, + .content = "4000000\n", + }, + { + .path = "/sys/devices/system/cpu/cpu6/cpufreq/sched/up_throttle_nsec", + .size = 2, + .content = "0\n", + }, + { + .path = "/sys/devices/system/cpu/cpu6/cpufreq/stats/time_in_state", + .size = 178, + .content = + "1989000 5860\n" + "1924000 14\n" + "1846000 100\n" + "1781000 2\n" + "1716000 2\n" + "1677000 0\n" + "1625000 12\n" + "1586000 10\n" + "1508000 0\n" + "1417000 12\n" + "1326000 4\n" + "1248000 51\n" + "1131000 240\n" + "1014000 138\n" + "910000 180\n" + "793000 94609\n", + }, + { + .path = "/sys/devices/system/cpu/cpu6/cpufreq/stats/total_trans", + .size = 4, + .content = "162\n", + }, + { + .path = "/sys/devices/system/cpu/cpu6/cpufreq/stats/trans_table", + .size = 2941, + .content = + " From : To\n" + " : 1989000 1924000 1846000 1781000 1716000 1677000 1625000 1586000 1508000 1417000 1326000 1248000 1131000 1014000 910000 793000 \n" + " 1989000: 0 4 5 1 0 0 1 1 0 3 1 0 1 0 2 14 \n" + " 1924000: 4 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 \n" + " 1846000: 9 0 0 0 0 0 0 0 0 0 0 0 0 2 4 1 \n" + " 1781000: 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 \n" + " 1716000: 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 \n" + " 1677000: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 \n" + " 1625000: 2 0 0 0 0 0 0 1 0 0 0 1 0 1 0 0 \n" + " 1586000: 2 1 0 0 0 0 1 0 0 0 0 0 0 0 0 1 \n" + " 1508000: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 \n" + " 1417000: 2 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 \n" + " 1326000: 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 \n" + " 1248000: 1 1 0 0 0 0 0 1 0 1 1 0 3 0 0 2 \n" + " 1131000: 3 0 0 0 0 0 0 0 0 0 0 3 0 2 0 8 \n" + " 1014000: 2 0 2 0 0 0 0 0 0 0 0 0 5 0 1 2 \n" + " 910000: 5 0 1 0 0 0 0 0 0 0 0 1 0 2 0 7 \n" + " 793000: 3 0 8 0 0 0 1 1 0 0 0 2 6 5 9 0 \n", + }, + { + .path = "/sys/devices/system/cpu/cpu6/topology/core_id", + .size = 2, + .content = "2\n", + }, + { + .path = "/sys/devices/system/cpu/cpu6/topology/core_siblings", + .size = 3, + .content = "f0\n", + }, + { + .path = "/sys/devices/system/cpu/cpu6/topology/core_siblings_list", + .size = 4, + .content = "4-7\n", + }, + { + .path = "/sys/devices/system/cpu/cpu6/topology/physical_package_id", + .size = 2, + .content = "1\n", + }, + { + .path = "/sys/devices/system/cpu/cpu6/topology/thread_siblings", + .size = 3, + .content = "40\n", + }, + { + .path = "/sys/devices/system/cpu/cpu6/topology/thread_siblings_list", + .size = 2, + .content = "6\n", + }, + { + .path = "/sys/devices/system/cpu/cpu7/cpuidle/driver/name", + .size = 26, + .content = "mt67xx_acao_cpuidle_set_1\n", + }, + { + .path = "/sys/devices/system/cpu/cpu7/cpufreq/affected_cpus", + .size = 8, + .content = "4 5 6 7\n", + }, + { + .path = "/sys/devices/system/cpu/cpu7/cpufreq/cpuinfo_max_freq", + .size = 8, + .content = "1989000\n", + }, + { + .path = "/sys/devices/system/cpu/cpu7/cpufreq/cpuinfo_min_freq", + .size = 7, + .content = "793000\n", + }, + { + .path = "/sys/devices/system/cpu/cpu7/cpufreq/cpuinfo_transition_latency", + .size = 5, + .content = "1000\n", + }, + { + .path = "/sys/devices/system/cpu/cpu7/cpufreq/related_cpus", + .size = 8, + .content = "4 5 6 7\n", + }, + { + .path = "/sys/devices/system/cpu/cpu7/cpufreq/scaling_available_frequencies", + .size = 127, + .content = "1989000 1924000 1846000 1781000 1716000 1677000 1625000 1586000 1508000 1417000 1326000 1248000 1131000 1014000 910000 793000 \n", + }, + { + .path = "/sys/devices/system/cpu/cpu7/cpufreq/scaling_available_governors", + .size = 64, + .content = "ondemand userspace powersave interactive performance schedplus \n", + }, + { + .path = "/sys/devices/system/cpu/cpu7/cpufreq/scaling_cur_freq", + .size = 7, + .content = "793000\n", + }, + { + .path = "/sys/devices/system/cpu/cpu7/cpufreq/scaling_driver", + .size = 11, + .content = "mt-cpufreq\n", + }, + { + .path = "/sys/devices/system/cpu/cpu7/cpufreq/scaling_max_freq", + .size = 7, + .content = "793000\n", + }, + { + .path = "/sys/devices/system/cpu/cpu7/cpufreq/scaling_min_freq", + .size = 7, + .content = "793000\n", + }, + { + .path = "/sys/devices/system/cpu/cpu7/cpufreq/sched/down_throttle_nsec", + .size = 8, + .content = "4000000\n", + }, + { + .path = "/sys/devices/system/cpu/cpu7/cpufreq/sched/up_throttle_nsec", + .size = 2, + .content = "0\n", + }, + { + .path = "/sys/devices/system/cpu/cpu7/cpufreq/stats/time_in_state", + .size = 178, + .content = + "1989000 5860\n" + "1924000 14\n" + "1846000 100\n" + "1781000 2\n" + "1716000 2\n" + "1677000 0\n" + "1625000 12\n" + "1586000 10\n" + "1508000 0\n" + "1417000 12\n" + "1326000 4\n" + "1248000 51\n" + "1131000 240\n" + "1014000 138\n" + "910000 180\n" + "793000 94810\n", + }, + { + .path = "/sys/devices/system/cpu/cpu7/cpufreq/stats/total_trans", + .size = 4, + .content = "162\n", + }, + { + .path = "/sys/devices/system/cpu/cpu7/cpufreq/stats/trans_table", + .size = 2941, + .content = + " From : To\n" + " : 1989000 1924000 1846000 1781000 1716000 1677000 1625000 1586000 1508000 1417000 1326000 1248000 1131000 1014000 910000 793000 \n" + " 1989000: 0 4 5 1 0 0 1 1 0 3 1 0 1 0 2 14 \n" + " 1924000: 4 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 \n" + " 1846000: 9 0 0 0 0 0 0 0 0 0 0 0 0 2 4 1 \n" + " 1781000: 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 \n" + " 1716000: 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 \n" + " 1677000: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 \n" + " 1625000: 2 0 0 0 0 0 0 1 0 0 0 1 0 1 0 0 \n" + " 1586000: 2 1 0 0 0 0 1 0 0 0 0 0 0 0 0 1 \n" + " 1508000: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 \n" + " 1417000: 2 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 \n" + " 1326000: 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 \n" + " 1248000: 1 1 0 0 0 0 0 1 0 1 1 0 3 0 0 2 \n" + " 1131000: 3 0 0 0 0 0 0 0 0 0 0 3 0 2 0 8 \n" + " 1014000: 2 0 2 0 0 0 0 0 0 0 0 0 5 0 1 2 \n" + " 910000: 5 0 1 0 0 0 0 0 0 0 0 1 0 2 0 7 \n" + " 793000: 3 0 8 0 0 0 1 1 0 0 0 2 6 5 9 0 \n", + }, + { + .path = "/sys/devices/system/cpu/cpu7/topology/core_id", + .size = 2, + .content = "3\n", + }, + { + .path = "/sys/devices/system/cpu/cpu7/topology/core_siblings", + .size = 3, + .content = "f0\n", + }, + { + .path = "/sys/devices/system/cpu/cpu7/topology/core_siblings_list", + .size = 4, + .content = "4-7\n", + }, + { + .path = "/sys/devices/system/cpu/cpu7/topology/physical_package_id", + .size = 2, + .content = "1\n", + }, + { + .path = "/sys/devices/system/cpu/cpu7/topology/thread_siblings", + .size = 3, + .content = "80\n", + }, + { + .path = "/sys/devices/system/cpu/cpu7/topology/thread_siblings_list", + .size = 2, + .content = "7\n", + }, + { NULL }, +}; +#ifdef __ANDROID__ +struct cpuinfo_mock_property properties[] = { + { + .key = "af.modem_1.epof", + .value = "0", + }, + { + .key = "af.music.outputid", + .value = "3", + }, + { + .key = "af.recovery.mic_mute_on", + .value = "0", + }, + { + .key = "af.speech.shm_init", + .value = "1", + }, + { + .key = "bgw.current3gband", + .value = "0", + }, + { + .key = "bt.profiles.avrcp.multiPlayer.enable", + .value = "0", + }, + { + .key = "camera.disable_zsl_mode", + .value = "1", + }, + { + .key = "camera.mdp.cz.enable", + .value = "1", + }, + { + .key = "camera.mdp.dre.enable", + .value = "1", + }, + { + .key = "cdma.operator.sid", + .value = "0", + }, + { + .key = "cdma.prl.version0", + .value = "302", + }, + { + .key = "dalvik.vm.appimageformat", + .value = "lz4", + }, + { + .key = "dalvik.vm.dex2oat-Xms", + .value = "64m", + }, + { + .key = "dalvik.vm.dex2oat-Xmx", + .value = "512m", + }, + { + .key = "dalvik.vm.dexopt.secondary", + .value = "true", + }, + { + .key = "dalvik.vm.heapgrowthlimit", + .value = "384m", + }, + { + .key = "dalvik.vm.heapmaxfree", + .value = "16m", + }, + { + .key = "dalvik.vm.heapminfree", + .value = "4m", + }, + { + .key = "dalvik.vm.heapsize", + .value = "512m", + }, + { + .key = "dalvik.vm.heapstartsize", + .value = "16m", + }, + { + .key = "dalvik.vm.heaptargetutilization", + .value = "0.75", + }, + { + .key = "dalvik.vm.image-dex2oat-Xms", + .value = "64m", + }, + { + .key = "dalvik.vm.image-dex2oat-Xmx", + .value = "64m", + }, + { + .key = "dalvik.vm.isa.arm.features", + .value = "default", + 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"persist.log.tag.ECCNumUtils", + .value = "I", + }, + { + .key = "persist.log.tag.ECCRetryHandler", + .value = "I", + }, + { + .key = "persist.log.tag.ECCRuleHandler", + .value = "I", + }, + { + .key = "persist.log.tag.ECCSwitchPhone", + .value = "I", + }, + { + .key = "persist.log.tag.ExternalSimMgr", + .value = "I", + }, + { + .key = "persist.log.tag.GbaApp", + .value = "I", + }, + { + .key = "persist.log.tag.GbaBsfProcedure", + .value = "I", + }, + { + .key = "persist.log.tag.GbaBsfResponse", + .value = "I", + }, + { + .key = "persist.log.tag.GbaDebugParam", + .value = "I", + }, + { + .key = "persist.log.tag.GbaService", + .value = "I", + }, + { + .key = "persist.log.tag.GsmCallTkrHlpr", + .value = "I", + }, + { + .key = "persist.log.tag.GsmCdmaConn", + .value = "I", + }, + { + .key = "persist.log.tag.GsmCdmaPhone", + .value = "I", + }, + { + .key = "persist.log.tag.GsmConnection", + .value = "I", + }, + { + .key = "persist.log.tag.GsmMmiCode", + .value = "I", + }, + { + .key = "persist.log.tag.IMSRILRequest", + .value = "I", + }, + { + .key = "persist.log.tag.IMS_RILA", + .value = "I", + }, + { + .key = "persist.log.tag.IccCardProxy", + .value = "I", + }, + { + .key = "persist.log.tag.IccPhoneBookIM", + .value = "I", + }, + { + .key = "persist.log.tag.IccProvider", + .value = "I", + }, + { + .key = "persist.log.tag.ImsApp", + .value = "I", + }, + { + .key = "persist.log.tag.ImsBaseCommands", + .value = "I", + }, + { + .key = "persist.log.tag.ImsCall", + .value = "I", + }, + { + .key = "persist.log.tag.ImsCallProfile", + .value = "I", + }, + { + .key = "persist.log.tag.ImsCallSession", + .value = "I", + }, + { + .key = "persist.log.tag.ImsEcbm", + .value = "I", + }, + { + .key = "persist.log.tag.ImsEcbmProxy", + .value = "I", + }, + { + .key = "persist.log.tag.ImsManager", + .value = "I", + }, + { + .key = "persist.log.tag.ImsPhone", + .value = "I", + }, + { + .key = "persist.log.tag.ImsPhoneBase", + .value = "I", + }, + { + .key = "persist.log.tag.ImsPhoneCall", + .value = "I", + }, + { + .key = "persist.log.tag.ImsService", + .value = "I", + }, + { + .key = "persist.log.tag.ImsUt", + .value = "I", + }, + { + .key = "persist.log.tag.ImsUtService", + .value = "I", + }, + { + .key = "persist.log.tag.ImsVTProvider", + .value = "I", + }, + { + .key = "persist.log.tag.IsimFileHandler", + .value = "I", + }, + { + .key = "persist.log.tag.IsimRecords", + .value = "I", + }, + { + .key = "persist.log.tag.LIBC2K_RIL", + .value = "I", + }, + { + .key = "persist.log.tag.MGsmSMSDisp", + .value = "I", + }, + { + .key = "persist.log.tag.MSimSmsIStatus", + .value = "I", + }, + { + .key = "persist.log.tag.MSmsStorageMtr", + .value = "I", + }, + { + .key = "persist.log.tag.MSmsUsageMtr", + .value = "I", + }, + { + .key = "persist.log.tag.MTKSST", + .value = "D", + }, + { + .key = "persist.log.tag.MtkAdnRecord", + .value = "I", + }, + { + .key = "persist.log.tag.MtkConSmsFwk", + .value = "I", + }, + { + .key = "persist.log.tag.MtkCsimFH", + .value = "I", + }, + { + .key = "persist.log.tag.MtkDCT", + .value = "I", + }, + { + .key = "persist.log.tag.MtkDupSmsFilter", + .value = "I", + }, + { + .key = "persist.log.tag.MtkFactory", + .value = "I", + }, + { + .key = "persist.log.tag.MtkGsmCdmaConn", + .value = "I", + }, + { + .key = "persist.log.tag.MtkIccCardProxy", + .value = "I", + }, + { + .key = "persist.log.tag.MtkIccPHBIM", + .value = "I", + }, + { + .key = "persist.log.tag.MtkIccProvider", + .value = "I", + }, + { + .key = "persist.log.tag.MtkIccSmsIntMgr", + .value = "I", + }, + { + .key = "persist.log.tag.MtkImsManager", + .value = "I", + }, + { + .key = "persist.log.tag.MtkImsService", + .value = "I", + }, + { + .key = "persist.log.tag.MtkIsimFH", + .value = "I", + }, + { + .key = "persist.log.tag.MtkPhoneNotifr", + .value = "I", + }, + { + .key = "persist.log.tag.MtkRecordLoader", + .value = "I", + }, + { + .key = "persist.log.tag.MtkRetryManager", + .value = "I", + }, + { + .key = "persist.log.tag.MtkRuimFH", + .value = "I", + }, + { + .key = "persist.log.tag.MtkSIMFH", + .value = "I", + }, + { + .key = "persist.log.tag.MtkSIMRecords", + .value = "I", + }, + { + .key = "persist.log.tag.MtkSmsCbHeader", + .value = "I", + }, + { + .key = "persist.log.tag.MtkSmsManager", + .value = "I", + }, + { + .key = "persist.log.tag.MtkSmsMessage", + .value = "I", + }, + { + .key = "persist.log.tag.MtkSpnOverride", + .value = "I", + }, + { + .key = "persist.log.tag.MtkSubCtrl", + .value = "I", + }, + { + .key = "persist.log.tag.MtkUiccCard", + .value = "I", + }, + { + .key = "persist.log.tag.MtkUiccCardApp", + .value = "I", + }, + { + .key = "persist.log.tag.MtkUiccCtrl", + .value = "I", + }, + { + .key = "persist.log.tag.MtkUsimFH", + .value = "I", + }, + { + .key = "persist.log.tag.Mtk_RIL_ImsSms", + .value = "I", + }, + { + .key = "persist.log.tag.NetAgentService", + .value = "I", + }, + { + .key = "persist.log.tag.NetLnkEventHdlr", + .value = "I", + }, + { + .key = "persist.log.tag.NetworkPolicy", + .value = "I", + }, + { + .key = "persist.log.tag.NetworkStats", + .value = "I", + }, + { + .key = "persist.log.tag.OperatorUtils", + .value = "I", + }, + { + .key = "persist.log.tag.Phone", + .value = "I", + }, + { + .key = "persist.log.tag.PhoneFactory", + .value = "I", + }, + { + .key = "persist.log.tag.ProxyController", + .value = "I", + }, + { + .key = "persist.log.tag.RFX", + .value = "I", + }, + { + .key = "persist.log.tag.RIL", + .value = "I", + }, + { + .key = "persist.log.tag.RIL-CC", + .value = "I", + }, + { + .key = "persist.log.tag.RIL-DATA", + .value = "I", + }, + { + .key = "persist.log.tag.RIL-Fusion", + .value = "I", + }, + { + .key = "persist.log.tag.RIL-OEM", + .value = "I", + }, + { + .key = "persist.log.tag.RIL-PHB", + .value = "I", + }, + { + .key = "persist.log.tag.RIL-RP", + .value = "I", + }, + { + .key = "persist.log.tag.RIL-SIM", + .value = "I", + }, + { + .key = "persist.log.tag.RIL-SMS", + .value = "I", + }, + { + .key = "persist.log.tag.RIL-SS", + .value = "I", + }, + { + .key = "persist.log.tag.RILC", + .value = "I", + }, + { + .key = "persist.log.tag.RILC-MTK", + .value = "I", + }, + { + .key = "persist.log.tag.RILC-RP", + .value = "I", + }, + { + .key = "persist.log.tag.RILD", + .value = "I", + }, + { + .key = "persist.log.tag.RILMD2-SS", + .value = "I", + }, + { + .key = "persist.log.tag.RILMUXD", + .value = "I", + }, + { + .key = "persist.log.tag.RIL_Mux", + .value = "I", + }, + { + .key = "persist.log.tag.RIL_UIM_SOCKET", + .value = "I", + }, + { + .key = "persist.log.tag.RP_DAC", + .value = "I", + }, + { + .key = "persist.log.tag.RP_IMS", + .value = "I", + }, + { + .key = "persist.log.tag.RTC_DAC", + .value = "I", + }, + { + .key = "persist.log.tag.RadioManager", + .value = "I", + }, + { + .key = "persist.log.tag.RetryManager", + .value = "I", + }, + { + .key = "persist.log.tag.RfxAction", + .value = "I", + }, + { + .key = "persist.log.tag.RfxChannelMgr", + .value = "I", + }, + { + .key = "persist.log.tag.RfxCloneMgr", + .value = "I", + }, + { + .key = "persist.log.tag.RfxContFactory", + .value = "I", + }, + { + .key = "persist.log.tag.RfxController", + .value = "I", + }, + { + .key = "persist.log.tag.RfxDT", + .value = "I", + }, + { + .key = "persist.log.tag.RfxDebugInfo", + .value = "I", + }, + { + .key = "persist.log.tag.RfxDefDestUtils", + .value = "I", + }, + { + .key = "persist.log.tag.RfxDisThread", + .value = "I", + }, + { + .key = "persist.log.tag.RfxFragEnc", + .value = "I", + }, + { + .key = "persist.log.tag.RfxHandlerMgr", + .value = "I", + }, + { + .key = "persist.log.tag.RfxIdToMsgId", + .value = "I", + }, + { + .key = "persist.log.tag.RfxIdToStr", + .value = "I", + }, + { + .key = "persist.log.tag.RfxMainThread", + .value = "I", + }, + { + .key = "persist.log.tag.RfxMclDisThread", + .value = "I", + }, + { + .key = "persist.log.tag.RfxMclMessenger", + .value = "I", + }, + { + .key = "persist.log.tag.RfxMclStatusMgr", + .value = "I", + }, + { + .key = "persist.log.tag.RfxMessage", + .value = "I", + }, + { + .key = "persist.log.tag.RfxObject", + .value = "I", + }, + { + .key = "persist.log.tag.RfxOpUtils", + .value = "I", + }, + { + .key = "persist.log.tag.RfxRilAdapter", + .value = "I", + }, + { + .key = "persist.log.tag.RfxRilUtils", + .value = "I", + }, + { + .key = "persist.log.tag.RfxRoot", + .value = "I", + }, + { + .key = "persist.log.tag.RfxSM", + .value = "I", + }, + { + .key = "persist.log.tag.RfxSocketSM", + .value = "I", + }, + { + .key = "persist.log.tag.RfxStatusMgr", + .value = "I", + }, + { + .key = "persist.log.tag.RfxTimer", + .value = "I", + }, + { + .key = "persist.log.tag.RfxTransUtils", + .value = "I", + }, + { + .key = "persist.log.tag.RilClient", + .value = "I", + }, + { + .key = "persist.log.tag.RilMalClient", + .value = "I", + }, + { + .key = "persist.log.tag.RmcCapa", + .value = "I", + }, + { + .key = "persist.log.tag.RmcCdmaSimUrc", + .value = "I", + }, + { + .key = "persist.log.tag.RmcCommSimOpReq", + .value = "I", + }, + { + .key = "persist.log.tag.RmcCommSimReq", + .value = "I", + }, + { + .key = "persist.log.tag.RmcDcCommon", + .value = "I", + }, + { + .key = "persist.log.tag.RmcDcDefault", + .value = "I", + }, + { + .key = "persist.log.tag.RmcDcPdnManager", + .value = "I", + }, + { + .key = "persist.log.tag.RmcDcReqHandler", + .value = "I", + }, + { + .key = "persist.log.tag.RmcDcUtility", + .value = "I", + }, + { + .key = "persist.log.tag.RmcImsCtlReqHdl", + .value = "I", + }, + { + .key = "persist.log.tag.RmcImsCtlUrcHdl", + .value = "I", + }, + { + .key = "persist.log.tag.RmcNwHdlr", + .value = "D", + }, + { + .key = "persist.log.tag.RmcNwReqHdlr", + .value = "D", + }, + { + .key = "persist.log.tag.RmcOpRadioReq", + .value = "I", + }, + { + .key = "persist.log.tag.RmcPhbReq", + .value = "I", + }, + { + .key = "persist.log.tag.RmcPhbUrc", + .value = "I", + }, + { + .key = "persist.log.tag.RmcRadioReq", + .value = "I", + }, + { + .key = "persist.log.tag.RmcRatSwHdlr", + .value = "D", + }, + { + .key = "persist.log.tag.RmcWp", + .value = "I", + }, + { + .key = "persist.log.tag.RpAudioControl", + .value = "I", + }, + { + .key = "persist.log.tag.RpCallControl", + .value = "I", + }, + { + .key = "persist.log.tag.RpCdmaOemCtrl", + .value = "I", + }, + { + .key = "persist.log.tag.RpCdmaRadioCtrl", + .value = "I", + }, + { + .key = "persist.log.tag.RpFOUtils", + .value = "I", + }, + { + .key = "persist.log.tag.RpMDCtrl", + .value = "I", + }, + { + .key = "persist.log.tag.RpMalController", + .value = "I", + }, + { + .key = "persist.log.tag.RpModemMessage", + .value = "I", + }, + { + .key = "persist.log.tag.RpPhbController", + .value = "I", + }, + { + .key = "persist.log.tag.RpRadioCtrl", + .value = "I", + }, + { + .key = "persist.log.tag.RpRadioMessage", + .value = "I", + }, + { + .key = "persist.log.tag.RpRilClientCtrl", + .value = "I", + }, + { + .key = "persist.log.tag.RpSimController", + .value = "I", + }, + { + .key = "persist.log.tag.RpSsController", + .value = "I", + }, + { + .key = "persist.log.tag.RtcCapa", + .value = "I", + }, + { + .key = "persist.log.tag.RtcDC", + .value = "I", + }, + { + .key = "persist.log.tag.RtcIms", + .value = "I", + }, + { + .key = "persist.log.tag.RtcNwCtrl", + .value = "I", + }, + { + .key = "persist.log.tag.RtcPhb", + .value = "I", + }, + { + .key = "persist.log.tag.RtcRadioCont", + .value = "I", + }, + { + .key = "persist.log.tag.RtcRatSwCtrl", + .value = "D", + }, + { + .key = "persist.log.tag.RtcWp", + .value = "I", + }, + { + .key = "persist.log.tag.SIMRecords", + .value = "I", + }, + { + .key = "persist.log.tag.SSDecisonMaker", + .value = "I", + }, + { + .key = "persist.log.tag.SimSwitchOP01", + .value = "I", + }, + { + .key = "persist.log.tag.SimSwitchOP02", + .value = "I", + }, + { + .key = "persist.log.tag.SimSwitchOP18", + .value = "I", + }, + { + .key = "persist.log.tag.SimservType", + .value = "I", + }, + { + .key = "persist.log.tag.SimservsTest", + .value = "I", + }, + { + .key = "persist.log.tag.SlotQueueEntry", + .value = "I", + }, + { + .key = "persist.log.tag.SmsPlusCode", + .value = "I", + }, + { + .key = "persist.log.tag.SpnOverride", + .value = "I", + }, + { + .key = "persist.log.tag.SresResponse", + .value = "I", + }, + { + .key = "persist.log.tag.SuppMsgMgr", + .value = "I", + }, + { + .key = "persist.log.tag.SuppSrvConfig", + .value = "I", + }, + { + .key = "persist.log.tag.TeleConfCtrler", + .value = "I", + }, + { + .key = "persist.log.tag.TeleConnService", + .value = "I", + }, + { + .key = "persist.log.tag.TelephonyConf", + .value = "I", + }, + { + .key = "persist.log.tag.TelephonyConn", + .value = "I", + }, + { + .key = "persist.log.tag.UiccCard", + .value = "I", + }, + { + .key = "persist.log.tag.UiccController", + .value = "I", + }, + { + .key = "persist.log.tag.VT", + .value = "I", + }, + { + .key = "persist.log.tag.VsimAdaptor", + .value = "I", + }, + { + .key = "persist.log.tag.WORLDMODE", + .value = "I", + }, + { + .key = "persist.log.tag.WfoApp", + .value = "I", + }, + { + .key = "persist.log.tag.tel_log_ctrl", + .value = "1", + }, + { + .key = "persist.logd.size", + .value = "16777216", + }, + { + .key = "persist.meta.dumpdata", + .value = "0", + }, + { + .key = "persist.mtk.aee.mode", + .value = "4", + }, + { + .key = "persist.mtk.connsys.poweron.ctl", + .value = "0", + }, + { + .key = "persist.mtk.datashaping.support", + .value = "1", + }, + { + .key = "persist.mtk.volte.enable", + .value = "1", + }, + { + .key = "persist.mtk.wcn.combo.chipid", + .value = "0x6771", + }, + { + .key = "persist.mtk.wcn.coredump.mode", + .value = "2", + }, + { + .key = "persist.mtk.wcn.dynamic.dump", + .value = "0", + }, + { + .key = "persist.mtk.wcn.patch.version", + .value = "20180502111328a", + }, + { + .key = "persist.mtk_ct_volte_support", + .value = "1", + }, + { + .key = "persist.mtk_dynamic_ims_switch", + .value = "1", + }, + { + .key = "persist.mtk_epdg_support", + .value = "1", + }, + { + .key = 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"ro.mediatek.wlan.wsc", + .value = "1", + }, + { + .key = "ro.mount.fs", + .value = "EXT4", + }, + { + .key = "ro.mtk_aal_support", + .value = "1", + }, + { + .key = "ro.mtk_afw_support", + .value = "1", + }, + { + .key = "ro.mtk_agps_app", + .value = "1", + }, + { + .key = "ro.mtk_aod_support", + .value = "1", + }, + { + .key = "ro.mtk_audio_alac_support", + .value = "1", + }, + { + .key = "ro.mtk_audio_ape_support", + .value = "1", + }, + { + .key = "ro.mtk_audio_tuning_tool_ver", + .value = "V2.2", + }, + { + .key = "ro.mtk_bg_power_saving_support", + .value = "1", + }, + { + .key = "ro.mtk_bg_power_saving_ui", + .value = "1", + }, + { + .key = "ro.mtk_bip_scws", + .value = "1", + }, + { + .key = "ro.mtk_blulight_def_support", + .value = "1", + }, + { + .key = "ro.mtk_bsp_package", + .value = "1", + }, + { + .key = "ro.mtk_bt_support", + .value = "1", + }, + { + .key = "ro.mtk_c2k_support", + .value = "1", + }, + { + .key = "ro.mtk_cam_lomo_support", + .value = "1", + }, + { + .key = "ro.mtk_cam_mfb_support", + .value = "3", + }, + { + .key = "ro.mtk_cam_stereo_camera_support", + .value = "1", + }, + { + .key = "ro.mtk_camera_app_version", + .value = "3", + }, + { + .key = "ro.mtk_config_max_dram_size", + .value = "0x800000000", + }, + { + .key = "ro.mtk_cta_drm_support", + .value = "1", + }, + { + .key = "ro.mtk_cta_set", + .value = "1", + }, + { + .key = "ro.mtk_data_config", + .value = "1", + }, + { + .key = "ro.mtk_deinterlace_support", + .value = "1", + }, + { + .key = "ro.mtk_dhcpv6c_wifi", + .value = "1", + }, + { + .key = "ro.mtk_dual_mic_support", + .value = "1", + }, + { + .key = "ro.mtk_eap_sim_aka", + .value = "1", + }, + { + .key = "ro.mtk_emmc_support", + .value = "1", + }, + { + .key = "ro.mtk_exchange_support", + .value = "1", + }, + { + .key = "ro.mtk_external_sim_only_slots", + .value = "0", + }, + { + .key = "ro.mtk_external_sim_support", + .value = "1", + }, + { + .key = "ro.mtk_f2fs_enable", + .value = "0", + }, + { + .key = "ro.mtk_fd_support", + .value = "1", + }, + { + .key = "ro.mtk_flv_playback_support", + .value = "1", + }, + { + .key = "ro.mtk_fm_50khz_support", + .value = "1", + }, + { + .key = "ro.mtk_gps_support", + .value = "1", + }, + { + .key = "ro.mtk_is_tablet", + .value = "0", + }, + { + .key = "ro.mtk_log_hide_gps", + .value = "0", + }, + { + .key = "ro.mtk_lte_support", + .value = "1", + }, + { + .key = "ro.mtk_md_world_mode_support", + .value = "1", + }, + { + .key = "ro.mtk_modem_monitor_support", + .value = "1", + }, + { + .key = "ro.mtk_oma_drm_support", + .value = "1", + }, + { + .key = "ro.mtk_omacp_support", + .value = "1", + }, + { + .key = "ro.mtk_perf_fast_start_win", + .value = "1", + }, + { + .key = "ro.mtk_perf_response_time", + .value = "1", + }, + { + .key = "ro.mtk_perf_simple_start_win", + .value = "1", + }, + { + .key = "ro.mtk_pow_perf_support", + .value = "1", + }, + { + .key = "ro.mtk_pq_color_mode", + .value = "1", + }, + { + .key = "ro.mtk_pq_support", + .value = "2", + }, + { + .key = "ro.mtk_protocol1_rat_config", + .value = "C/Lf/Lt/W/T/G", + }, + { + .key = "ro.mtk_ril_mode", + .value = "c6m_1rild", + }, + { + .key = "ro.mtk_rild_read_imsi", + .value = "1", + }, + { + .key = "ro.mtk_search_db_support", + .value = "1", + }, + { + .key = "ro.mtk_send_rr_support", + .value = "1", + }, + { + .key = "ro.mtk_shared_sdcard", + .value = "1", + }, + { + .key = "ro.mtk_sim_hot_swap", + .value = "1", + }, + { + .key = "ro.mtk_sim_hot_swap_common_slot", + .value = "1", + }, + { + .key = "ro.mtk_single_bin_modem_support", + .value = "1", + }, + { + .key = "ro.mtk_slow_motion_support", + .value = "1", + }, + { + .key = "ro.mtk_soter_support", + .value = "1", + }, + { + .key = "ro.mtk_tee_gp_support", + .value = "1", + }, + { + .key = "ro.mtk_tetheringipv6_support", + .value = "1", + }, + { + .key = "ro.mtk_trustonic_tee_support", + .value = "1", + }, + { + .key = "ro.mtk_wapi_support", + .value = "1", + }, + { + .key = "ro.mtk_wappush_support", + .value = "1", + }, + { + .key = "ro.mtk_wfd_support", + .value = "1", + }, + { + .key = "ro.mtk_widevine_drm_l3_support", + .value = "1", + }, + { + .key = "ro.mtk_wlan_support", + .value = "1", + }, + { + .key = "ro.mtk_wmv_playback_support", + .value = "1", + }, + { + .key = "ro.mtk_world_phone_policy", + .value = "0", + }, + { + .key = "ro.mtk_zsdhdr_support", + .value = "1", + }, + { + .key = "ro.mtkrc.path", + .value = "/vendor/etc/init/hw/", + }, + { + .key = "ro.num_md_protocol", + .value = "2", + }, + { + .key = "ro.oem_unlock_supported", + .value = "1", + }, + { + .key = "ro.opengles.version", + .value = "196610", + }, + { + .key = "ro.oppo.market.name", + .value = "OPPO R15", + }, + { + .key = "ro.oppo.screen.heteromorphism", + .value = "378,0:702,80", + }, + { + .key = "ro.oppo.theme.version", + .value = "805", + }, + { + .key = "ro.oppo.version", + .value = "", + }, + { + .key = "ro.product.authentication", + .value = "2018CP0915", + }, + { + .key = "ro.product.board", + .value = "oppo6771_17197", + }, + { + .key = "ro.product.brand", + .value = "OPPO", + }, + { + .key = "ro.product.cpu.abi", + .value = "arm64-v8a", + }, + { + .key = "ro.product.cpu.abilist", + .value = "arm64-v8a,armeabi-v7a,armeabi", + }, + { + .key = "ro.product.cpu.abilist32", + .value = "armeabi-v7a,armeabi", + }, + { + .key = "ro.product.cpu.abilist64", + .value = "arm64-v8a", + }, + { + .key = "ro.product.device", + .value = "PACM00", + }, + { + .key = "ro.product.first_api_level", + .value = "27", + }, + { + .key = "ro.product.hw", + .value = "DB091", + }, + { + .key = "ro.product.locale", + .value = "zh-CN", + }, + { + .key = "ro.product.manufacturer", + .value = "OPPO", + }, + { + .key = "ro.product.model", + .value = "PACM00", + }, + { + .key = "ro.product.name", + .value = "PACM00", + }, + { + .key = "ro.product.sar", + .value = "1.7", + }, + { + .key = "ro.property_service.version", + .value = "2", + }, + { + .key = "ro.radio.simcount", + .value = "2", + }, + { + .key = "ro.recovery_id", + .value = "0x3d563eab71489464541dbb8210b4c7933e61bc7a000000000000000000000000", + }, + { + .key = "ro.reserve1.get", + .value = "/dev/block/platform/bootdevice/by-name/reserve1", + }, + { + .key = "ro.revision", + .value = "0", + }, + { + .key = "ro.rom.featrue", + .value = "allnet", + }, + { + .key = "ro.script.version", + .value = "1.0", + }, + { + .key = "ro.secure", + .value = "1", + }, + { + .key = "ro.separate.soft", + .value = "17197", + }, + { + .key = "ro.serialno", + .value = "9P4SUSOBEI7HIJJR", + }, + { + .key = "ro.sf.hwrotation", + .value = "0", + }, + { + .key = "ro.sf.lcd_density", + .value = "480", + }, + { + .key = "ro.sim_me_lock_mode", + .value = "0", + }, + { + .key = "ro.sim_refresh_reset_by_modem", + .value = "1", + }, + { + .key = "ro.sys.sdcardfs", + .value = "1", + }, + { + .key = "ro.sys.usb.bicr", + .value = "no", + }, + { + .key = "ro.sys.usb.charging.only", + .value = "yes", + }, + { + .key = "ro.sys.usb.mtp.whql.enable", + .value = "0", + }, + { + .key = "ro.sys.usb.storage.type", + .value = "mtp", + }, + { + .key = "ro.telephony.default_network", + .value = "10,10", + }, + { + .key = "ro.telephony.sim.count", + .value = "2", + }, + { + .key = "ro.treble.enabled", + .value = "true", + }, + { + .key = "ro.ussd_ksc5601", + .value = "0", + }, + { + .key = "ro.vendor.build.date", + .value = "Wed May 9 23:01:52 CST 2018", + }, + { + .key = "ro.vendor.build.date.utc", + .value = "1525878112", + }, + { + .key = "ro.vendor.build.fingerprint", + .value = "OPPO/PACM00/PACM00:8.1.0/O11019/1523979512:user/release-keys", + }, + { + .key = "ro.vendor.product.brand", + .value = "OPPO", + }, + { + .key = "ro.vendor.product.device", + .value = "PACM00", + }, + { + .key = "ro.vendor.product.manufacturer", + .value = "OPPO", + }, + { + .key = "ro.vendor.product.model", + .value = "PACM00", + }, + { + .key = "ro.vendor.product.name", + .value = "PACM00", + }, + { + .key = "ro.vendor.product.oem", + .value = "PACM00", + }, + { + .key = "ro.vold.serialno", + .value = "9P4SUSOBEI7HIJJR", + }, + { + .key = "ro.wifi.channels", + .value = "", + }, + { + .key = "ro.wlan.gen", + .value = "gen3", + }, + { + .key = "ro.wlan.mtk.wifi.5g", + .value = "1", + }, + { + .key = "ro.xxversion", + .value = "V0.5", + }, + { + .key = "ro.zygote", + .value = "zygote64_32", + }, + { + .key = "ro.zygote.preload.enable", + .value = "0", + }, + { + .key = "security.perf_harden", + .value = "1", + }, + { + .key = "service.bootanim.exit", + .value = "1", + }, + { + .key = "service.nvram_init", + .value = "Ready", + }, + { + .key = "service.sf.present_timestamp", + .value = "1", + }, + { + .key = "service.wcn.driver.ready", + .value = "yes", + }, + { + .key = "service.wcn.formeta.ready", + .value = "yes", + }, + { + .key = "sys.app_freeze_timeout", + .value = "0", + }, + { + .key = "sys.boot.reason", + .value = "0", + }, + { + .key = "sys.boot_completed", + .value = "1", + }, + { + .key = "sys.build.display.id", + .value = "PACM00_11_A.15_180509_a7d06fc5", + }, + { + .key = "sys.fb_parent_pid", + .value = "595", + }, + { + .key = "sys.fw_boot", + .value = "progress_done", + }, + { + .key = "sys.ipo.disable", + .value = "1", + }, + { + .key = "sys.ipo.pwrdncap", + .value = "2", + }, + { + .key = "sys.ipowin.done", + .value = "1", + }, + { + .key = "sys.logbootcomplete", + .value = "1", + }, + { + .key = "sys.loglimit.enabled", + .value = "true", + }, + { + .key = "sys.mediatek.version.release", + .value = "PACM00_11_A.15_180509_a7d06fc5", + }, + { + .key = "sys.oem_unlock_allowed", + .value = "0", + }, + { + .key = "sys.oppo.boot_completed", + .value = "1", + }, + { + .key = "sys.oppo.call_mode", + .value = "false", + }, + { + .key = "sys.oppo.gesturewakeup", + .value = "0", + }, + { + .key = "sys.oppo.gift", + .value = "1", + }, + { + .key = "sys.oppo.multibrightness", + .value = "1023", + }, + { + .key = "sys.oppo.nw.hongbao", + .value = "1", + }, + { + .key = "sys.oppo.reboot", + .value = "0", + }, + { + .key = "sys.oppo.recheck_finish", + .value = "true", + }, + { + .key = "sys.oppo.screenshot", + .value = "0", + }, + { + .key = "sys.power.screenoff.reason", + .value = "2", + }, + { + .key = "sys.power_off_alarm", + .value = "0", + }, + { + .key = "sys.retaildemo.enabled", + .value = "0", + }, + { + .key = "sys.sysctl.extra_free_kbytes", + .value = "43284", + }, + { + .key = "sys.usb.acm_cnt", + .value = "0", + }, + { + .key = "sys.usb.acm_enable", + .value = "0", + }, + { + .key = "sys.usb.acm_port0", + .value = "", + }, + { + .key = "sys.usb.acm_port1", + .value = "", + }, + { + .key = "sys.usb.clear", + .value = "boot", + }, + { + .key = "sys.usb.config", + .value = "adb", + }, + { + .key = "sys.usb.configfs", + .value = "1", + }, + { + .key = "sys.usb.controller", + .value = "musb-hdrc", + }, + { + .key = "sys.usb.ffs.mtp.ready", + .value = "1", + }, + { + .key = "sys.usb.ffs.ready", + .value = "1", + }, + { + .key = "sys.usb.pid", + .value = "0x2769", + }, + { + .key = "sys.usb.state", + .value = "adb", + }, + { + .key = "sys.usb.temp", + .value = "", + }, + { + .key = "sys.usb.vid", + .value = "0x22d9", + }, + { + .key = "sys.user.0.ce_available", + .value = "true", + }, + { + .key = "sys.wifitracing.started", + .value = "1", + }, + { + .key = "telephony.lteOnCdmaDevice", + .value = "1", + }, + { + .key = "vold.decrypt", + .value = "trigger_restart_framework", + }, + { + .key = "vold.encryption.type", + .value = "default", + }, + { + .key = "vold.has_adoptable", + .value = "0", + }, + { + .key = "vold.has_quota", + .value = "1", + }, + { + .key = "vold.post_fs_data_done", + .value = "1", + }, + { + .key = "wfd.dummy.enable", + .value = "1", + }, + { + .key = "wfd.iframesize.level", + .value = "0", + }, + { + .key = "wifi.direct.interface", + .value = "p2p0", + }, + { + .key = "wifi.interface", + .value = "wlan0", + }, + { + .key = "wifi.tethering.interface", + .value = "ap0", + }, + { NULL }, +}; +#endif /* __ANDROID__ */ |