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authorMarat Dukhan <marat@fb.com>2018-05-13 20:24:07 -0700
committerMarat Dukhan <marat@fb.com>2018-05-13 20:24:07 -0700
commit1e6c8c99d27f2b5eb9d2e6231055c6a4115b85e5 (patch)
tree93f55003f5045a73734ecb2b089ab4e6fb6a5393
parente196e6aa8826cc050fd1ed03b9741c0d68ab7cfd (diff)
downloadcpuinfo-1e6c8c99d27f2b5eb9d2e6231055c6a4115b85e5.tar.gz
Detect Denver 2 as a separate uarch
-rw-r--r--include/cpuinfo.h2
-rw-r--r--src/arm/cache.c1
-rw-r--r--src/arm/uarch.c7
-rw-r--r--tools/cpu-info.c2
4 files changed, 6 insertions, 6 deletions
diff --git a/include/cpuinfo.h b/include/cpuinfo.h
index b0e7f09..39a9110 100644
--- a/include/cpuinfo.h
+++ b/include/cpuinfo.h
@@ -393,6 +393,8 @@ enum cpuinfo_uarch {
/** Nvidia Denver. */
cpuinfo_uarch_denver = 0x00500100,
+ /** Nvidia Denver 2. */
+ cpuinfo_uarch_denver2 = 0x00500101,
/** Samsung Mongoose M1 (Exynos 8890 big cores). */
cpuinfo_uarch_mongoose_m1 = 0x00600100,
diff --git a/src/arm/cache.c b/src/arm/cache.c
index d64bfee..cbf1733 100644
--- a/src/arm/cache.c
+++ b/src/arm/cache.c
@@ -1093,6 +1093,7 @@ void cpuinfo_arm_decode_cache(
}
break;
case cpuinfo_uarch_denver:
+ case cpuinfo_uarch_denver2:
/*
* The Denver chip includes a 128KB, 4-way level 1 instruction cache, a 64KB, 4-way level 2 data cache,
* and a 2MB, 16-way level 2 cache, all of which can service both cores. [1]
diff --git a/src/arm/uarch.c b/src/arm/uarch.c
index 048a780..652fb66 100644
--- a/src/arm/uarch.c
+++ b/src/arm/uarch.c
@@ -149,12 +149,7 @@ void cpuinfo_arm_decode_vendor_uarch(
*uarch = cpuinfo_uarch_denver;
break;
case 0x003:
- /*
- * Nvidia Denver 2.
- * Few details are known about Denver 2, and known details are no different that Denver 1,
- * so consider them the same microarchitecture.
- */
- *uarch = cpuinfo_uarch_denver;
+ *uarch = cpuinfo_uarch_denver2;
break;
default:
cpuinfo_log_warning("unknown Nvidia CPU part 0x%03"PRIx32" ignored", midr_get_part(midr));
diff --git a/tools/cpu-info.c b/tools/cpu-info.c
index 73bffbf..0205e6c 100644
--- a/tools/cpu-info.c
+++ b/tools/cpu-info.c
@@ -171,6 +171,8 @@ static const char* uarch_to_string(enum cpuinfo_uarch uarch) {
return "Saphira";
case cpuinfo_uarch_denver:
return "Denver";
+ case cpuinfo_uarch_denver2:
+ return "Denver 2";
case cpuinfo_uarch_mongoose_m1:
return "Mongoose M1";
case cpuinfo_uarch_mongoose_m2: