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| author | Soumith Chintala <sc3104@nyu.edu> | 2020-01-22 17:30:02 -0500 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-01-22 17:30:02 -0500 |
| commit | e39a5790059b6b8274ed91f7b5b5b13641dff267 (patch) | |
| tree | c6e450a5ee5a86c335f4e7de7e7eed9db4fac155 /src/arm/linux | |
| parent | 97785054145da55cfef2ddc23babce455bbf90f9 (diff) | |
| parent | 0e6bde92b343c5fbcfe34ecd41abf9515d54b4a7 (diff) | |
| download | cpuinfo-e39a5790059b6b8274ed91f7b5b5b13641dff267.tar.gz | |
Merge pull request #29 from AshkanAliabadi/xnnpack
Upstream the cpuinfo updates in XNNPACK/third_party/cpuinfo.patch
Diffstat (limited to 'src/arm/linux')
| -rw-r--r-- | src/arm/linux/init.c | 2 | ||||
| -rw-r--r-- | src/arm/linux/midr.c | 8 |
2 files changed, 6 insertions, 4 deletions
diff --git a/src/arm/linux/init.c b/src/arm/linux/init.c index a297f63..f0c432c 100644 --- a/src/arm/linux/init.c +++ b/src/arm/linux/init.c @@ -678,6 +678,8 @@ void cpuinfo_arm_linux_init(void) { cpuinfo_cache_count[cpuinfo_cache_level_2] = l2_count; cpuinfo_cache_count[cpuinfo_cache_level_3] = l3_count; + cpuinfo_max_cache_size = cpuinfo_arm_compute_max_cache_size(&processors[0]); + __sync_synchronize(); cpuinfo_is_initialized = true; diff --git a/src/arm/linux/midr.c b/src/arm/linux/midr.c index 668fc72..2c3116b 100644 --- a/src/arm/linux/midr.c +++ b/src/arm/linux/midr.c @@ -220,7 +220,7 @@ static const struct cluster_config cluster_configs[] = { .model = UINT16_C(7420), .clusters = 2, .cluster_cores = { - [0] = 4, + [0] = 4, [1] = 4, }, .cluster_midr = { @@ -229,7 +229,7 @@ static const struct cluster_config cluster_configs[] = { }, }, { - /* Exynos 8890: 4x Mongoose + 4x Cortex-A53 */ + /* Exynos 8890: 4x Exynos M1 + 4x Cortex-A53 */ .cores = 8, .series = cpuinfo_arm_chipset_series_samsung_exynos, .model = UINT16_C(8890), @@ -695,7 +695,7 @@ static void cpuinfo_arm_linux_detect_cluster_midr_by_sequential_scan( if (bitmask_all(processors[i].flags, CPUINFO_LINUX_FLAG_VALID)) { if (processors[i].package_leader_id == i) { if (bitmask_all(processors[i].flags, CPUINFO_ARM_LINUX_VALID_MIDR)) { - midr = processors[i].midr; + midr = processors[i].midr; } else { cpuinfo_log_info("assume processor %"PRIu32" to have MIDR %08"PRIx32, i, midr); /* To be consistent, we copy the MIDR entirely, rather than by parts */ @@ -836,7 +836,7 @@ uint32_t cpuinfo_arm_linux_detect_cluster_midr( * - Clusters preceeding the first reported MIDR value are assumed to have the last reported MIDR value. * - Clusters following any reported MIDR value to have that MIDR value. */ - + if (cpuinfo_arm_linux_detect_cluster_midr_by_chipset( chipset, clusters_count, cluster_leaders, usable_processors, processors, true)) { |