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authorNikita Shulga <nshulga@fb.com>2020-11-18 17:25:18 -0800
committerGitHub <noreply@github.com>2020-11-18 17:25:18 -0800
commited8b86a253800bafdb7b25c5c399f91bff9cb1f3 (patch)
tree7ce8843cfa40d1f5d0a94bfcc551f20850a76539 /src/arm/mach/init.c
parent63b254577ed77a8004a9be6ac707f3dccc4e1fd9 (diff)
downloadcpuinfo-ed8b86a253800bafdb7b25c5c399f91bff9cb1f3.tar.gz
Fix build for Apple Silicon (#48)
* Fix build for Apple Silicon MacOS machines based on Apple M1 silicon are identified by cmake as "arm64" Modify build rules accordingly to recognize "arm64" is valid CPU configuration for cpuinfo * Add CPUFAMILY_ARM_FIRESTORM_ICESTORM switch case * Update comment in src/arm/mach/init.c
Diffstat (limited to 'src/arm/mach/init.c')
-rw-r--r--src/arm/mach/init.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/arm/mach/init.c b/src/arm/mach/init.c
index e912de6..d820744 100644
--- a/src/arm/mach/init.c
+++ b/src/arm/mach/init.c
@@ -25,6 +25,10 @@
#define CPUFAMILY_ARM_LIGHTNING_THUNDER 0x462504D2
#endif
+#ifndef CPUFAMILY_ARM_FIRESTORM_ICESTORM
+ #define CPUFAMILY_ARM_FIRESTORM_ICESTORM 0x1B588BB3
+#endif
+
struct cpuinfo_arm_isa cpuinfo_isa = {
#if CPUINFO_ARCH_ARM
.thumb = true,
@@ -101,6 +105,9 @@ static enum cpuinfo_uarch decode_uarch(uint32_t cpu_family, uint32_t cpu_subtype
case CPUFAMILY_ARM_LIGHTNING_THUNDER:
/* Hexa-core: 2x Lightning + 4x Thunder; Octa-core (presumed): 4x Lightning + 4x Thunder */
return core_index + 4 < core_count ? cpuinfo_uarch_lightning : cpuinfo_uarch_thunder;
+ case CPUFAMILY_ARM_FIRESTORM_ICESTORM:
+ /* Hexa-core: 2x Firestorm + 4x Icestorm; Octa-core: 4x Firestorm + 4x Icestorm */
+ return core_index + 4 < core_count ? cpuinfo_uarch_firestorm : cpuinfo_uarch_icestorm;
default:
/* Use hw.cpusubtype for detection */
break;