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author | Haibo Huang <hhb@google.com> | 2020-08-06 18:03:07 -0700 |
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committer | Haibo Huang <hhb@google.com> | 2020-08-07 20:04:33 +0000 |
commit | aff0604684a8512c65b551c8dc0025919036fc44 (patch) | |
tree | e1b3cd8e435837906ed1e0331358c2006f0cddc7 /src/arm/mach/init.c | |
parent | c51afc47f286b8e137527a20b9fb35e8ade0035c (diff) | |
parent | 63b254577ed77a8004a9be6ac707f3dccc4e1fd9 (diff) | |
download | cpuinfo-aff0604684a8512c65b551c8dc0025919036fc44.tar.gz |
Update cpuinfo to '63b254577ed77a8004a9be6ac707f3dccc4e1fd9'
Exempt-From-Owner-Approval: upgrade
Change-Id: I09956e4b7bbd8b335ecc185cd16d0db238b050e6
Diffstat (limited to 'src/arm/mach/init.c')
-rw-r--r-- | src/arm/mach/init.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/src/arm/mach/init.c b/src/arm/mach/init.c index b6c4a7b..e912de6 100644 --- a/src/arm/mach/init.c +++ b/src/arm/mach/init.c @@ -348,6 +348,15 @@ void cpuinfo_arm_mach_init(void) { cpuinfo_isa.fp16arith = true; } + /* + * There does not yet seem to exist an OS mechanism to detect support for + * ARMv8.2 optional dot-product instructions, so we currently whitelist CPUs + * known to support these instruction. + */ + if (cpu_family == CPUFAMILY_ARM_LIGHTNING_THUNDER) { + cpuinfo_isa.dot = true; + } + uint32_t num_clusters = 1; for (uint32_t i = 0; i < mach_topology.cores; i++) { cores[i] = (struct cpuinfo_core) { |