diff options
author | Marat Dukhan <marat@fb.com> | 2018-05-06 16:16:35 -0700 |
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committer | Marat Dukhan <marat@fb.com> | 2018-05-06 16:16:35 -0700 |
commit | 2b521edb07ff80df170fe6f1935b3d7d3756f6a3 (patch) | |
tree | a5d92284038b6c6e6ba314795ef43541da037881 /src/arm | |
parent | ba1795733e8593c75903663e9e1864de392bfc3a (diff) | |
download | cpuinfo-2b521edb07ff80df170fe6f1935b3d7d3756f6a3.tar.gz |
Fix cache size detection on Snapdragon 636 and 660
Diffstat (limited to 'src/arm')
-rw-r--r-- | src/arm/cache.c | 43 |
1 files changed, 34 insertions, 9 deletions
diff --git a/src/arm/cache.c b/src/arm/cache.c index 777a1d9..91bccab 100644 --- a/src/arm/cache.c +++ b/src/arm/cache.c @@ -490,6 +490,9 @@ void cpuinfo_arm_decode_cache( * | Exynos 7420 | 4(+4) | 32K | 32K | 256K | [2, 3] | * | Exynos 8890 | 4(+4) | 32K | 32K | 256K | [4] | * | Snapdragon 410 | 4 | 32K | 32K | 512K | [3] | + * | Snapdragon 630 | 4+4 | 32K | 32K | 1M+512K | sysfs | + * | Snapdragon 636 | 4(+4) | 32K+64K | 32K+64K | 1M+1M | sysfs | + * | Snapdragon 660 | 4(+4) | 32K+64K | 32K+64K | 1M+1M | sysfs | * | Snapdragon 835 | 4(+4) | 32K+64K | 32K+64K | 1M(+2M) | sysfs | * | Kirin 620 | 4+4 | 32K | 32K | 512K | [5] | * +--------------------+-------+-----------+-----------+-----------+-----------+ @@ -504,12 +507,33 @@ void cpuinfo_arm_decode_cache( /* Qualcomm-modified Cortex-A53 in Snapdragon 630/660/835 */ uint32_t l2_size = 512 * 1024; - if (chipset->series == cpuinfo_arm_chipset_series_qualcomm_msm && chipset->model == 8998) { - /* Snapdragon 835 (MSM8998): 1 MB L2 (little cores only) */ - l2_size = 1024 * 1024; - } else if (chipset->series == cpuinfo_arm_chipset_series_qualcomm_snapdragon && chipset->model == 630 && cluster_id == 0) { - /* Snapdragon 630 (MSM8998): 1 MB L2 for the big cores */ - l2_size = 1024 * 1024; + switch (chipset->series) { + case cpuinfo_arm_chipset_series_qualcomm_msm: + if (chipset->model == 8998) { + /* Snapdragon 835 (MSM8998): 1 MB L2 (little cores only) */ + l2_size = 1024 * 1024; + } + break; + case cpuinfo_arm_chipset_series_qualcomm_snapdragon: + switch (chipset->model) { + case 630: + if (cluster_id == 0) { + /* Snapdragon 630: 1 MB L2 for the big cores */ + l2_size = 1024 * 1024; + } + break; + case 636: + /* Snapdragon 636: 1 MB L2 (little cores only) */ + l2_size = 1024 * 1024; + break; + case 660: + /* Snapdragon 660: 1 MB L2 (little cores only) */ + l2_size = 1024 * 1024; + break; + } + break; + default: + break; } *l1i = (struct cpuinfo_cache) { @@ -840,10 +864,11 @@ void cpuinfo_arm_decode_cache( * +---------------------+---------+-----------+-----------+-----------+-----------+ * | Processor model | Cores | L1D cache | L1I cache | L2 cache | Reference | * +---------------------+---------+-----------+-----------+-----------+-----------+ - * | HiSilicon Kirin 960 | 4(+4) | 64K+32K | 64K+32K | ? | [2] | + * | HiSilicon Kirin 960 | 4(+4) | 64K+32K | 64K+32K | ? | [2] | * | MediaTek Helio X30 | 2(+4+4) | ? | 64K+ ? | ? | | - * | Snapdragon 835 | 4(+4) | 64K+32K | 64K+32K | 2M(+1M) | sysfs | - * | Snapdragon 660 | 4(+4) | 64K+32K | 64K+32K | 2M(+1M) | [3] | + * | Snapdragon 636 | 4(+4) | 64K(+32K) | 64K(+32K) | 1M(+1M) | sysfs | + * | Snapdragon 660 | 4(+4) | 64K+32K | 64K+32K | 1M(+1M) | [3] | + * | Snapdragon 835 | 4(+4) | 64K+32K | 64K+32K | 2M(+1M) | sysfs | * +---------------------+---------+-----------+-----------+-----------+-----------+ * * [1] http://www.anandtech.com/show/10347/arm-cortex-a73-artemis-unveiled/2 |