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| author | Marat Dukhan <marat@fb.com> | 2018-04-19 22:09:56 -0700 |
|---|---|---|
| committer | Marat Dukhan <marat@fb.com> | 2018-04-19 22:09:56 -0700 |
| commit | b1e99599dac4408eae09fde7976e4771b794e748 (patch) | |
| tree | e92f6f7be011682bdb9aeed29ff83a4fe78c0afd /src/arm | |
| parent | 3375181545e97dc854206a149d1eb56db4c5d4ec (diff) | |
| download | cpuinfo-b1e99599dac4408eae09fde7976e4771b794e748.tar.gz | |
Identify FP16 compute and RDM extension on selected AArch32 cores
Diffstat (limited to 'src/arm')
| -rw-r--r-- | src/arm/linux/aarch32-isa.c | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/src/arm/linux/aarch32-isa.c b/src/arm/linux/aarch32-isa.c index dce7add..71bd0a5 100644 --- a/src/arm/linux/aarch32-isa.c +++ b/src/arm/linux/aarch32-isa.c @@ -50,6 +50,30 @@ void cpuinfo_arm_linux_decode_isa_from_proc_cpuinfo( isa->fp16 = true; isa->fma = true; isa->neon = true; + + /* + * NEON FP16 compute extension is not indicated in /proc/cpuinfo. + * Use a MIDR-based heuristic to whitelist processors known to support it: + * - Processors with Qualcomm-modified Cortex-A75 and Cortex-A55 cores + */ + switch (midr & (CPUINFO_ARM_MIDR_IMPLEMENTER_MASK | CPUINFO_ARM_MIDR_PART_MASK)) { + case UINT32_C(0x51008020): /* Kryo 385 Gold (Cortex-A75) */ + case UINT32_C(0x51008030): /* Kryo 385 Silver (Cortex-A55) */ + isa->fp16arith = true; + break; + } + + /* + * NEON VQRDMLAH/VQRDMLSH instructions are not indicated in /proc/cpuinfo. + * Use a MIDR-based heuristic to whitelist processors known to support it: + * - Processors with Qualcomm-modified Cortex-A75 and Cortex-A55 cores + */ + switch (midr & (CPUINFO_ARM_MIDR_IMPLEMENTER_MASK | CPUINFO_ARM_MIDR_PART_MASK)) { + case UINT32_C(0x51008020): /* Kryo 385 Gold (Cortex-A75) */ + case UINT32_C(0x51008030): /* Kryo 385 Silver (Cortex-A55) */ + isa->rdm = true; + break; + } } else { /* ARMv7 or lower: use feature flags to detect optional features */ |