diff options
author | Marat Dukhan <marat@fb.com> | 2017-09-26 12:57:41 -0700 |
---|---|---|
committer | Marat Dukhan <marat@fb.com> | 2017-09-26 12:57:41 -0700 |
commit | eb3025f389fde8eea801de23ba34b7fdaba15708 (patch) | |
tree | fbf9e6469f68686e4698a45f940bc0b76e730587 /test | |
parent | 14a9d4c0188367ca4070e3f5df5f4a839bf8c1d0 (diff) | |
download | cpuinfo-eb3025f389fde8eea801de23ba34b7fdaba15708.tar.gz |
Convert mock tests to new ISA API
Diffstat (limited to 'test')
36 files changed, 2597 insertions, 1513 deletions
diff --git a/test/blu-r1-hd.cc b/test/blu-r1-hd.cc index 6ccc3cf..4b45c46 100644 --- a/test/blu-r1-hd.cc +++ b/test/blu-r1-hd.cc @@ -157,95 +157,123 @@ TEST(PACKAGES, core_count) { } TEST(ISA, thumb) { - ASSERT_TRUE(cpuinfo_isa.thumb); + ASSERT_TRUE(cpuinfo_has_arm_thumb()); } TEST(ISA, thumb2) { - ASSERT_TRUE(cpuinfo_isa.thumb2); -} - -TEST(ISA, thumbee) { - ASSERT_FALSE(cpuinfo_isa.thumbee); -} - -TEST(ISA, jazelle) { - ASSERT_FALSE(cpuinfo_isa.jazelle); + ASSERT_TRUE(cpuinfo_has_arm_thumb2()); } TEST(ISA, armv5e) { - ASSERT_TRUE(cpuinfo_isa.armv5e); + ASSERT_TRUE(cpuinfo_has_arm_v5e()); } TEST(ISA, armv6) { - ASSERT_TRUE(cpuinfo_isa.armv6); + ASSERT_TRUE(cpuinfo_has_arm_v6()); } TEST(ISA, armv6k) { - ASSERT_TRUE(cpuinfo_isa.armv6k); + ASSERT_TRUE(cpuinfo_has_arm_v6k()); } TEST(ISA, armv7) { - ASSERT_TRUE(cpuinfo_isa.armv7); + ASSERT_TRUE(cpuinfo_has_arm_v7()); } TEST(ISA, armv7mp) { - ASSERT_TRUE(cpuinfo_isa.armv7mp); + ASSERT_TRUE(cpuinfo_has_arm_v7mp()); } TEST(ISA, idiv) { - ASSERT_TRUE(cpuinfo_isa.idiv); + ASSERT_TRUE(cpuinfo_has_arm_idiv()); } TEST(ISA, vfpv2) { - ASSERT_FALSE(cpuinfo_isa.vfpv2); + ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); } TEST(ISA, vfpv3) { - ASSERT_TRUE(cpuinfo_isa.vfpv3); + ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); +} + +TEST(ISA, vfpv3_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); } -TEST(ISA, d32) { - ASSERT_TRUE(cpuinfo_isa.d32); +TEST(ISA, vfpv3_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16()); } -TEST(ISA, fp16) { - ASSERT_TRUE(cpuinfo_isa.fp16); +TEST(ISA, vfpv3_fp16_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32()); } -TEST(ISA, fma) { - ASSERT_TRUE(cpuinfo_isa.fma); +TEST(ISA, vfpv4) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4()); +} + +TEST(ISA, vfpv4_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32()); } TEST(ISA, wmmx) { - ASSERT_FALSE(cpuinfo_isa.wmmx); + ASSERT_FALSE(cpuinfo_has_arm_wmmx()); } TEST(ISA, wmmx2) { - ASSERT_FALSE(cpuinfo_isa.wmmx2); + ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); } TEST(ISA, neon) { - ASSERT_TRUE(cpuinfo_isa.neon); + ASSERT_TRUE(cpuinfo_has_arm_neon()); +} + +TEST(ISA, neon_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fp16()); +} + +TEST(ISA, neon_fma) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fma()); +} + +TEST(ISA, atomics) { + ASSERT_FALSE(cpuinfo_has_arm_atomics()); +} + +TEST(ISA, neon_rdm) { + ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); +} + +TEST(ISA, fp16_arith) { + ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); +} + +TEST(ISA, jscvt) { + ASSERT_FALSE(cpuinfo_has_arm_jscvt()); +} + +TEST(ISA, fcma) { + ASSERT_FALSE(cpuinfo_has_arm_fcma()); } TEST(ISA, aes) { - ASSERT_FALSE(cpuinfo_isa.aes); + ASSERT_FALSE(cpuinfo_has_arm_aes()); } TEST(ISA, sha1) { - ASSERT_FALSE(cpuinfo_isa.sha1); + ASSERT_FALSE(cpuinfo_has_arm_sha1()); } TEST(ISA, sha2) { - ASSERT_TRUE(cpuinfo_isa.sha2); + ASSERT_TRUE(cpuinfo_has_arm_sha2()); } TEST(ISA, pmull) { - ASSERT_FALSE(cpuinfo_isa.pmull); + ASSERT_FALSE(cpuinfo_has_arm_pmull()); } TEST(ISA, crc32) { - ASSERT_FALSE(cpuinfo_isa.crc32); + ASSERT_FALSE(cpuinfo_has_arm_crc32()); } TEST(L1I, count) { diff --git a/test/galaxy-c9-pro.cc b/test/galaxy-c9-pro.cc index bb4cfab..92c2c65 100644 --- a/test/galaxy-c9-pro.cc +++ b/test/galaxy-c9-pro.cc @@ -204,121 +204,153 @@ TEST(PACKAGES, core_count) { } } -#if CPUINFO_ARCH_ARM TEST(ISA, thumb) { - ASSERT_TRUE(cpuinfo_isa.thumb); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_thumb()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_thumb()); + #endif } TEST(ISA, thumb2) { - ASSERT_TRUE(cpuinfo_isa.thumb2); -} - -TEST(ISA, thumbee) { - ASSERT_FALSE(cpuinfo_isa.thumbee); -} - -TEST(ISA, jazelle) { - ASSERT_FALSE(cpuinfo_isa.jazelle); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_thumb2()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_thumb2()); + #endif } TEST(ISA, armv5e) { - ASSERT_TRUE(cpuinfo_isa.armv5e); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v5e()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v5e()); + #endif } TEST(ISA, armv6) { - ASSERT_TRUE(cpuinfo_isa.armv6); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v6()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v6()); + #endif } TEST(ISA, armv6k) { - ASSERT_TRUE(cpuinfo_isa.armv6k); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v6k()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v6k()); + #endif } TEST(ISA, armv7) { - ASSERT_TRUE(cpuinfo_isa.armv7); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v7()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v7()); + #endif } TEST(ISA, armv7mp) { - ASSERT_TRUE(cpuinfo_isa.armv7mp); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v7mp()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v7mp()); + #endif } TEST(ISA, idiv) { - ASSERT_TRUE(cpuinfo_isa.idiv); + ASSERT_TRUE(cpuinfo_has_arm_idiv()); } TEST(ISA, vfpv2) { - ASSERT_FALSE(cpuinfo_isa.vfpv2); + ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); } TEST(ISA, vfpv3) { - ASSERT_TRUE(cpuinfo_isa.vfpv3); + ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); +} + +TEST(ISA, vfpv3_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); +} + +TEST(ISA, vfpv3_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16()); } -TEST(ISA, d32) { - ASSERT_TRUE(cpuinfo_isa.d32); +TEST(ISA, vfpv3_fp16_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32()); } -TEST(ISA, fp16) { - ASSERT_TRUE(cpuinfo_isa.fp16); +TEST(ISA, vfpv4) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4()); } -TEST(ISA, fma) { - ASSERT_TRUE(cpuinfo_isa.fma); +TEST(ISA, vfpv4_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32()); } TEST(ISA, wmmx) { - ASSERT_FALSE(cpuinfo_isa.wmmx); + ASSERT_FALSE(cpuinfo_has_arm_wmmx()); } TEST(ISA, wmmx2) { - ASSERT_FALSE(cpuinfo_isa.wmmx2); + ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); } TEST(ISA, neon) { - ASSERT_TRUE(cpuinfo_isa.neon); + ASSERT_TRUE(cpuinfo_has_arm_neon()); } -#endif /* CPUINFO_ARCH_ARM */ -TEST(ISA, aes) { - ASSERT_TRUE(cpuinfo_isa.aes); +TEST(ISA, neon_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fp16()); } -TEST(ISA, sha1) { - ASSERT_TRUE(cpuinfo_isa.sha1); +TEST(ISA, neon_fma) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fma()); } -TEST(ISA, sha2) { - ASSERT_TRUE(cpuinfo_isa.sha2); +TEST(ISA, atomics) { + ASSERT_FALSE(cpuinfo_has_arm_atomics()); } -TEST(ISA, pmull) { - ASSERT_TRUE(cpuinfo_isa.pmull); +TEST(ISA, neon_rdm) { + ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); } -TEST(ISA, crc32) { - ASSERT_TRUE(cpuinfo_isa.crc32); +TEST(ISA, fp16_arith) { + ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); } -#if CPUINFO_ARCH_ARM64 -TEST(ISA, atomics) { - ASSERT_FALSE(cpuinfo_isa.atomics); +TEST(ISA, jscvt) { + ASSERT_FALSE(cpuinfo_has_arm_jscvt()); } -TEST(ISA, rdm) { - ASSERT_FALSE(cpuinfo_isa.rdm); +TEST(ISA, fcma) { + ASSERT_FALSE(cpuinfo_has_arm_fcma()); } -TEST(ISA, fp16arith) { - ASSERT_FALSE(cpuinfo_isa.fp16arith); +TEST(ISA, aes) { + ASSERT_TRUE(cpuinfo_has_arm_aes()); } -TEST(ISA, jscvt) { - ASSERT_FALSE(cpuinfo_isa.jscvt); +TEST(ISA, sha1) { + ASSERT_TRUE(cpuinfo_has_arm_sha1()); } -TEST(ISA, fcma) { - ASSERT_FALSE(cpuinfo_isa.fcma); +TEST(ISA, sha2) { + ASSERT_TRUE(cpuinfo_has_arm_sha2()); +} + +TEST(ISA, pmull) { + ASSERT_TRUE(cpuinfo_has_arm_pmull()); +} + +TEST(ISA, crc32) { + ASSERT_TRUE(cpuinfo_has_arm_crc32()); } -#endif /* CPUINFO_ARCH_ARM64 */ TEST(L1I, count) { cpuinfo_caches l1i = cpuinfo_get_l1i_cache(); diff --git a/test/galaxy-grand-prime-value-edition.cc b/test/galaxy-grand-prime-value-edition.cc index 965a336..e063946 100644 --- a/test/galaxy-grand-prime-value-edition.cc +++ b/test/galaxy-grand-prime-value-edition.cc @@ -153,95 +153,123 @@ TEST(PACKAGES, core_count) { } TEST(ISA, thumb) { - ASSERT_TRUE(cpuinfo_isa.thumb); + ASSERT_TRUE(cpuinfo_has_arm_thumb()); } TEST(ISA, thumb2) { - ASSERT_TRUE(cpuinfo_isa.thumb2); -} - -TEST(ISA, thumbee) { - ASSERT_FALSE(cpuinfo_isa.thumbee); -} - -TEST(ISA, jazelle) { - ASSERT_FALSE(cpuinfo_isa.jazelle); + ASSERT_TRUE(cpuinfo_has_arm_thumb2()); } TEST(ISA, armv5e) { - ASSERT_TRUE(cpuinfo_isa.armv5e); + ASSERT_TRUE(cpuinfo_has_arm_v5e()); } TEST(ISA, armv6) { - ASSERT_TRUE(cpuinfo_isa.armv6); + ASSERT_TRUE(cpuinfo_has_arm_v6()); } TEST(ISA, armv6k) { - ASSERT_TRUE(cpuinfo_isa.armv6k); + ASSERT_TRUE(cpuinfo_has_arm_v6k()); } TEST(ISA, armv7) { - ASSERT_TRUE(cpuinfo_isa.armv7); + ASSERT_TRUE(cpuinfo_has_arm_v7()); } TEST(ISA, armv7mp) { - ASSERT_TRUE(cpuinfo_isa.armv7mp); + ASSERT_TRUE(cpuinfo_has_arm_v7mp()); } TEST(ISA, idiv) { - ASSERT_TRUE(cpuinfo_isa.idiv); + ASSERT_TRUE(cpuinfo_has_arm_idiv()); } TEST(ISA, vfpv2) { - ASSERT_FALSE(cpuinfo_isa.vfpv2); + ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); } TEST(ISA, vfpv3) { - ASSERT_TRUE(cpuinfo_isa.vfpv3); + ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); +} + +TEST(ISA, vfpv3_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); } -TEST(ISA, d32) { - ASSERT_TRUE(cpuinfo_isa.d32); +TEST(ISA, vfpv3_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16()); } -TEST(ISA, fp16) { - ASSERT_TRUE(cpuinfo_isa.fp16); +TEST(ISA, vfpv3_fp16_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32()); } -TEST(ISA, fma) { - ASSERT_TRUE(cpuinfo_isa.fma); +TEST(ISA, vfpv4) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4()); +} + +TEST(ISA, vfpv4_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32()); } TEST(ISA, wmmx) { - ASSERT_FALSE(cpuinfo_isa.wmmx); + ASSERT_FALSE(cpuinfo_has_arm_wmmx()); } TEST(ISA, wmmx2) { - ASSERT_FALSE(cpuinfo_isa.wmmx2); + ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); } TEST(ISA, neon) { - ASSERT_TRUE(cpuinfo_isa.neon); + ASSERT_TRUE(cpuinfo_has_arm_neon()); +} + +TEST(ISA, neon_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fp16()); +} + +TEST(ISA, neon_fma) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fma()); +} + +TEST(ISA, atomics) { + ASSERT_FALSE(cpuinfo_has_arm_atomics()); +} + +TEST(ISA, neon_rdm) { + ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); +} + +TEST(ISA, fp16_arith) { + ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); +} + +TEST(ISA, jscvt) { + ASSERT_FALSE(cpuinfo_has_arm_jscvt()); +} + +TEST(ISA, fcma) { + ASSERT_FALSE(cpuinfo_has_arm_fcma()); } TEST(ISA, aes) { - ASSERT_FALSE(cpuinfo_isa.aes); + ASSERT_FALSE(cpuinfo_has_arm_aes()); } TEST(ISA, sha1) { - ASSERT_FALSE(cpuinfo_isa.sha1); + ASSERT_FALSE(cpuinfo_has_arm_sha1()); } TEST(ISA, sha2) { - ASSERT_FALSE(cpuinfo_isa.sha2); + ASSERT_FALSE(cpuinfo_has_arm_sha2()); } TEST(ISA, pmull) { - ASSERT_FALSE(cpuinfo_isa.pmull); + ASSERT_FALSE(cpuinfo_has_arm_pmull()); } TEST(ISA, crc32) { - ASSERT_FALSE(cpuinfo_isa.crc32); + ASSERT_FALSE(cpuinfo_has_arm_crc32()); } TEST(L1I, count) { diff --git a/test/galaxy-j7-tmobile.cc b/test/galaxy-j7-tmobile.cc index e4ce0b6..4771d37 100644 --- a/test/galaxy-j7-tmobile.cc +++ b/test/galaxy-j7-tmobile.cc @@ -178,121 +178,153 @@ TEST(PACKAGES, core_count) { } } -#if CPUINFO_ARCH_ARM TEST(ISA, thumb) { - ASSERT_TRUE(cpuinfo_isa.thumb); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_thumb()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_thumb()); + #endif } TEST(ISA, thumb2) { - ASSERT_TRUE(cpuinfo_isa.thumb2); -} - -TEST(ISA, thumbee) { - ASSERT_FALSE(cpuinfo_isa.thumbee); -} - -TEST(ISA, jazelle) { - ASSERT_FALSE(cpuinfo_isa.jazelle); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_thumb2()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_thumb2()); + #endif } TEST(ISA, armv5e) { - ASSERT_TRUE(cpuinfo_isa.armv5e); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v5e()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v5e()); + #endif } TEST(ISA, armv6) { - ASSERT_TRUE(cpuinfo_isa.armv6); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v6()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v6()); + #endif } TEST(ISA, armv6k) { - ASSERT_TRUE(cpuinfo_isa.armv6k); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v6k()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v6k()); + #endif } TEST(ISA, armv7) { - ASSERT_TRUE(cpuinfo_isa.armv7); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v7()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v7()); + #endif } TEST(ISA, armv7mp) { - ASSERT_TRUE(cpuinfo_isa.armv7mp); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v7mp()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v7mp()); + #endif } TEST(ISA, idiv) { - ASSERT_TRUE(cpuinfo_isa.idiv); + ASSERT_TRUE(cpuinfo_has_arm_idiv()); } TEST(ISA, vfpv2) { - ASSERT_FALSE(cpuinfo_isa.vfpv2); + ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); } TEST(ISA, vfpv3) { - ASSERT_TRUE(cpuinfo_isa.vfpv3); + ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); +} + +TEST(ISA, vfpv3_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); +} + +TEST(ISA, vfpv3_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16()); } -TEST(ISA, d32) { - ASSERT_TRUE(cpuinfo_isa.d32); +TEST(ISA, vfpv3_fp16_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32()); } -TEST(ISA, fp16) { - ASSERT_TRUE(cpuinfo_isa.fp16); +TEST(ISA, vfpv4) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4()); } -TEST(ISA, fma) { - ASSERT_TRUE(cpuinfo_isa.fma); +TEST(ISA, vfpv4_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32()); } TEST(ISA, wmmx) { - ASSERT_FALSE(cpuinfo_isa.wmmx); + ASSERT_FALSE(cpuinfo_has_arm_wmmx()); } TEST(ISA, wmmx2) { - ASSERT_FALSE(cpuinfo_isa.wmmx2); + ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); } TEST(ISA, neon) { - ASSERT_TRUE(cpuinfo_isa.neon); + ASSERT_TRUE(cpuinfo_has_arm_neon()); } -#endif /* CPUINFO_ARCH_ARM */ -TEST(ISA, aes) { - ASSERT_TRUE(cpuinfo_isa.aes); +TEST(ISA, neon_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fp16()); } -TEST(ISA, sha1) { - ASSERT_TRUE(cpuinfo_isa.sha1); +TEST(ISA, neon_fma) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fma()); } -TEST(ISA, sha2) { - ASSERT_TRUE(cpuinfo_isa.sha2); +TEST(ISA, atomics) { + ASSERT_FALSE(cpuinfo_has_arm_atomics()); } -TEST(ISA, pmull) { - ASSERT_TRUE(cpuinfo_isa.pmull); +TEST(ISA, neon_rdm) { + ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); } -TEST(ISA, crc32) { - ASSERT_TRUE(cpuinfo_isa.crc32); +TEST(ISA, fp16_arith) { + ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); } -#if CPUINFO_ARCH_ARM64 -TEST(ISA, atomics) { - ASSERT_FALSE(cpuinfo_isa.atomics); +TEST(ISA, jscvt) { + ASSERT_FALSE(cpuinfo_has_arm_jscvt()); } -TEST(ISA, rdm) { - ASSERT_FALSE(cpuinfo_isa.rdm); +TEST(ISA, fcma) { + ASSERT_FALSE(cpuinfo_has_arm_fcma()); } -TEST(ISA, fp16arith) { - ASSERT_FALSE(cpuinfo_isa.fp16arith); +TEST(ISA, aes) { + ASSERT_TRUE(cpuinfo_has_arm_aes()); } -TEST(ISA, jscvt) { - ASSERT_FALSE(cpuinfo_isa.jscvt); +TEST(ISA, sha1) { + ASSERT_TRUE(cpuinfo_has_arm_sha1()); } -TEST(ISA, fcma) { - ASSERT_FALSE(cpuinfo_isa.fcma); +TEST(ISA, sha2) { + ASSERT_TRUE(cpuinfo_has_arm_sha2()); +} + +TEST(ISA, pmull) { + ASSERT_TRUE(cpuinfo_has_arm_pmull()); +} + +TEST(ISA, crc32) { + ASSERT_TRUE(cpuinfo_has_arm_crc32()); } -#endif /* CPUINFO_ARCH_ARM64 */ TEST(L1I, count) { cpuinfo_caches l1i = cpuinfo_get_l1i_cache(); diff --git a/test/galaxy-j7-uae.cc b/test/galaxy-j7-uae.cc index d372676..1b7bfb0 100644 --- a/test/galaxy-j7-uae.cc +++ b/test/galaxy-j7-uae.cc @@ -178,121 +178,153 @@ TEST(PACKAGES, core_count) { } } -#if CPUINFO_ARCH_ARM TEST(ISA, thumb) { - ASSERT_TRUE(cpuinfo_isa.thumb); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_thumb()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_thumb()); + #endif } TEST(ISA, thumb2) { - ASSERT_TRUE(cpuinfo_isa.thumb2); -} - -TEST(ISA, thumbee) { - ASSERT_FALSE(cpuinfo_isa.thumbee); -} - -TEST(ISA, jazelle) { - ASSERT_FALSE(cpuinfo_isa.jazelle); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_thumb2()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_thumb2()); + #endif } TEST(ISA, armv5e) { - ASSERT_TRUE(cpuinfo_isa.armv5e); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v5e()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v5e()); + #endif } TEST(ISA, armv6) { - ASSERT_TRUE(cpuinfo_isa.armv6); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v6()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v6()); + #endif } TEST(ISA, armv6k) { - ASSERT_TRUE(cpuinfo_isa.armv6k); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v6k()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v6k()); + #endif } TEST(ISA, armv7) { - ASSERT_TRUE(cpuinfo_isa.armv7); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v7()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v7()); + #endif } TEST(ISA, armv7mp) { - ASSERT_TRUE(cpuinfo_isa.armv7mp); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v7mp()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v7mp()); + #endif } TEST(ISA, idiv) { - ASSERT_TRUE(cpuinfo_isa.idiv); + ASSERT_TRUE(cpuinfo_has_arm_idiv()); } TEST(ISA, vfpv2) { - ASSERT_FALSE(cpuinfo_isa.vfpv2); + ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); } TEST(ISA, vfpv3) { - ASSERT_TRUE(cpuinfo_isa.vfpv3); + ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); +} + +TEST(ISA, vfpv3_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); +} + +TEST(ISA, vfpv3_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16()); } -TEST(ISA, d32) { - ASSERT_TRUE(cpuinfo_isa.d32); +TEST(ISA, vfpv3_fp16_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32()); } -TEST(ISA, fp16) { - ASSERT_TRUE(cpuinfo_isa.fp16); +TEST(ISA, vfpv4) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4()); } -TEST(ISA, fma) { - ASSERT_TRUE(cpuinfo_isa.fma); +TEST(ISA, vfpv4_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32()); } TEST(ISA, wmmx) { - ASSERT_FALSE(cpuinfo_isa.wmmx); + ASSERT_FALSE(cpuinfo_has_arm_wmmx()); } TEST(ISA, wmmx2) { - ASSERT_FALSE(cpuinfo_isa.wmmx2); + ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); } TEST(ISA, neon) { - ASSERT_TRUE(cpuinfo_isa.neon); + ASSERT_TRUE(cpuinfo_has_arm_neon()); } -#endif /* CPUINFO_ARCH_ARM */ -TEST(ISA, aes) { - ASSERT_TRUE(cpuinfo_isa.aes); +TEST(ISA, neon_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fp16()); } -TEST(ISA, sha1) { - ASSERT_TRUE(cpuinfo_isa.sha1); +TEST(ISA, neon_fma) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fma()); } -TEST(ISA, sha2) { - ASSERT_TRUE(cpuinfo_isa.sha2); +TEST(ISA, atomics) { + ASSERT_FALSE(cpuinfo_has_arm_atomics()); } -TEST(ISA, pmull) { - ASSERT_TRUE(cpuinfo_isa.pmull); +TEST(ISA, neon_rdm) { + ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); } -TEST(ISA, crc32) { - ASSERT_TRUE(cpuinfo_isa.crc32); +TEST(ISA, fp16_arith) { + ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); } -#if CPUINFO_ARCH_ARM64 -TEST(ISA, atomics) { - ASSERT_FALSE(cpuinfo_isa.atomics); +TEST(ISA, jscvt) { + ASSERT_FALSE(cpuinfo_has_arm_jscvt()); } -TEST(ISA, rdm) { - ASSERT_FALSE(cpuinfo_isa.rdm); +TEST(ISA, fcma) { + ASSERT_FALSE(cpuinfo_has_arm_fcma()); } -TEST(ISA, fp16arith) { - ASSERT_FALSE(cpuinfo_isa.fp16arith); +TEST(ISA, aes) { + ASSERT_TRUE(cpuinfo_has_arm_aes()); } -TEST(ISA, jscvt) { - ASSERT_FALSE(cpuinfo_isa.jscvt); +TEST(ISA, sha1) { + ASSERT_TRUE(cpuinfo_has_arm_sha1()); } -TEST(ISA, fcma) { - ASSERT_FALSE(cpuinfo_isa.fcma); +TEST(ISA, sha2) { + ASSERT_TRUE(cpuinfo_has_arm_sha2()); +} + +TEST(ISA, pmull) { + ASSERT_TRUE(cpuinfo_has_arm_pmull()); +} + +TEST(ISA, crc32) { + ASSERT_TRUE(cpuinfo_has_arm_crc32()); } -#endif /* CPUINFO_ARCH_ARM64 */ TEST(L1I, count) { cpuinfo_caches l1i = cpuinfo_get_l1i_cache(); diff --git a/test/galaxy-s3-us.cc b/test/galaxy-s3-us.cc index 17c80c3..bd03b76 100644 --- a/test/galaxy-s3-us.cc +++ b/test/galaxy-s3-us.cc @@ -153,95 +153,123 @@ TEST(PACKAGES, core_count) { } TEST(ISA, thumb) { - ASSERT_TRUE(cpuinfo_isa.thumb); + ASSERT_TRUE(cpuinfo_has_arm_thumb()); } TEST(ISA, thumb2) { - ASSERT_TRUE(cpuinfo_isa.thumb2); -} - -TEST(ISA, thumbee) { - ASSERT_FALSE(cpuinfo_isa.thumbee); -} - -TEST(ISA, jazelle) { - ASSERT_FALSE(cpuinfo_isa.jazelle); + ASSERT_TRUE(cpuinfo_has_arm_thumb2()); } TEST(ISA, armv5e) { - ASSERT_TRUE(cpuinfo_isa.armv5e); + ASSERT_TRUE(cpuinfo_has_arm_v5e()); } TEST(ISA, armv6) { - ASSERT_TRUE(cpuinfo_isa.armv6); + ASSERT_TRUE(cpuinfo_has_arm_v6()); } TEST(ISA, armv6k) { - ASSERT_TRUE(cpuinfo_isa.armv6k); + ASSERT_TRUE(cpuinfo_has_arm_v6k()); } TEST(ISA, armv7) { - ASSERT_TRUE(cpuinfo_isa.armv7); + ASSERT_TRUE(cpuinfo_has_arm_v7()); } TEST(ISA, armv7mp) { - ASSERT_TRUE(cpuinfo_isa.armv7mp); + ASSERT_TRUE(cpuinfo_has_arm_v7mp()); } TEST(ISA, idiv) { - ASSERT_TRUE(cpuinfo_isa.idiv); + ASSERT_TRUE(cpuinfo_has_arm_idiv()); } TEST(ISA, vfpv2) { - ASSERT_FALSE(cpuinfo_isa.vfpv2); + ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); } TEST(ISA, vfpv3) { - ASSERT_TRUE(cpuinfo_isa.vfpv3); + ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); +} + +TEST(ISA, vfpv3_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); } -TEST(ISA, d32) { - ASSERT_TRUE(cpuinfo_isa.d32); +TEST(ISA, vfpv3_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16()); } -TEST(ISA, fp16) { - ASSERT_TRUE(cpuinfo_isa.fp16); +TEST(ISA, vfpv3_fp16_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32()); } -TEST(ISA, fma) { - ASSERT_TRUE(cpuinfo_isa.fma); +TEST(ISA, vfpv4) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4()); +} + +TEST(ISA, vfpv4_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32()); } TEST(ISA, wmmx) { - ASSERT_FALSE(cpuinfo_isa.wmmx); + ASSERT_FALSE(cpuinfo_has_arm_wmmx()); } TEST(ISA, wmmx2) { - ASSERT_FALSE(cpuinfo_isa.wmmx2); + ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); } TEST(ISA, neon) { - ASSERT_TRUE(cpuinfo_isa.neon); + ASSERT_TRUE(cpuinfo_has_arm_neon()); +} + +TEST(ISA, neon_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fp16()); +} + +TEST(ISA, neon_fma) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fma()); +} + +TEST(ISA, atomics) { + ASSERT_FALSE(cpuinfo_has_arm_atomics()); +} + +TEST(ISA, neon_rdm) { + ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); +} + +TEST(ISA, fp16_arith) { + ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); +} + +TEST(ISA, jscvt) { + ASSERT_FALSE(cpuinfo_has_arm_jscvt()); +} + +TEST(ISA, fcma) { + ASSERT_FALSE(cpuinfo_has_arm_fcma()); } TEST(ISA, aes) { - ASSERT_FALSE(cpuinfo_isa.aes); + ASSERT_FALSE(cpuinfo_has_arm_aes()); } TEST(ISA, sha1) { - ASSERT_FALSE(cpuinfo_isa.sha1); + ASSERT_FALSE(cpuinfo_has_arm_sha1()); } TEST(ISA, sha2) { - ASSERT_FALSE(cpuinfo_isa.sha2); + ASSERT_FALSE(cpuinfo_has_arm_sha2()); } TEST(ISA, pmull) { - ASSERT_FALSE(cpuinfo_isa.pmull); + ASSERT_FALSE(cpuinfo_has_arm_pmull()); } TEST(ISA, crc32) { - ASSERT_FALSE(cpuinfo_isa.crc32); + ASSERT_FALSE(cpuinfo_has_arm_crc32()); } TEST(L1I, count) { diff --git a/test/galaxy-s4-us.cc b/test/galaxy-s4-us.cc index 645af87..ed9a383 100644 --- a/test/galaxy-s4-us.cc +++ b/test/galaxy-s4-us.cc @@ -153,95 +153,123 @@ TEST(PACKAGES, core_count) { } TEST(ISA, thumb) { - ASSERT_TRUE(cpuinfo_isa.thumb); + ASSERT_TRUE(cpuinfo_has_arm_thumb()); } TEST(ISA, thumb2) { - ASSERT_TRUE(cpuinfo_isa.thumb2); -} - -TEST(ISA, thumbee) { - ASSERT_FALSE(cpuinfo_isa.thumbee); -} - -TEST(ISA, jazelle) { - ASSERT_FALSE(cpuinfo_isa.jazelle); + ASSERT_TRUE(cpuinfo_has_arm_thumb2()); } TEST(ISA, armv5e) { - ASSERT_TRUE(cpuinfo_isa.armv5e); + ASSERT_TRUE(cpuinfo_has_arm_v5e()); } TEST(ISA, armv6) { - ASSERT_TRUE(cpuinfo_isa.armv6); + ASSERT_TRUE(cpuinfo_has_arm_v6()); } TEST(ISA, armv6k) { - ASSERT_TRUE(cpuinfo_isa.armv6k); + ASSERT_TRUE(cpuinfo_has_arm_v6k()); } TEST(ISA, armv7) { - ASSERT_TRUE(cpuinfo_isa.armv7); + ASSERT_TRUE(cpuinfo_has_arm_v7()); } TEST(ISA, armv7mp) { - ASSERT_TRUE(cpuinfo_isa.armv7mp); + ASSERT_TRUE(cpuinfo_has_arm_v7mp()); } TEST(ISA, idiv) { - ASSERT_TRUE(cpuinfo_isa.idiv); + ASSERT_TRUE(cpuinfo_has_arm_idiv()); } TEST(ISA, vfpv2) { - ASSERT_FALSE(cpuinfo_isa.vfpv2); + ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); } TEST(ISA, vfpv3) { - ASSERT_TRUE(cpuinfo_isa.vfpv3); + ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); +} + +TEST(ISA, vfpv3_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); } -TEST(ISA, d32) { - ASSERT_TRUE(cpuinfo_isa.d32); +TEST(ISA, vfpv3_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16()); } -TEST(ISA, fp16) { - ASSERT_TRUE(cpuinfo_isa.fp16); +TEST(ISA, vfpv3_fp16_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32()); } -TEST(ISA, fma) { - ASSERT_TRUE(cpuinfo_isa.fma); +TEST(ISA, vfpv4) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4()); +} + +TEST(ISA, vfpv4_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32()); } TEST(ISA, wmmx) { - ASSERT_FALSE(cpuinfo_isa.wmmx); + ASSERT_FALSE(cpuinfo_has_arm_wmmx()); } TEST(ISA, wmmx2) { - ASSERT_FALSE(cpuinfo_isa.wmmx2); + ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); } TEST(ISA, neon) { - ASSERT_TRUE(cpuinfo_isa.neon); + ASSERT_TRUE(cpuinfo_has_arm_neon()); +} + +TEST(ISA, neon_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fp16()); +} + +TEST(ISA, neon_fma) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fma()); +} + +TEST(ISA, atomics) { + ASSERT_FALSE(cpuinfo_has_arm_atomics()); +} + +TEST(ISA, neon_rdm) { + ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); +} + +TEST(ISA, fp16_arith) { + ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); +} + +TEST(ISA, jscvt) { + ASSERT_FALSE(cpuinfo_has_arm_jscvt()); +} + +TEST(ISA, fcma) { + ASSERT_FALSE(cpuinfo_has_arm_fcma()); } TEST(ISA, aes) { - ASSERT_FALSE(cpuinfo_isa.aes); + ASSERT_FALSE(cpuinfo_has_arm_aes()); } TEST(ISA, sha1) { - ASSERT_FALSE(cpuinfo_isa.sha1); + ASSERT_FALSE(cpuinfo_has_arm_sha1()); } TEST(ISA, sha2) { - ASSERT_FALSE(cpuinfo_isa.sha2); + ASSERT_FALSE(cpuinfo_has_arm_sha2()); } TEST(ISA, pmull) { - ASSERT_FALSE(cpuinfo_isa.pmull); + ASSERT_FALSE(cpuinfo_has_arm_pmull()); } TEST(ISA, crc32) { - ASSERT_FALSE(cpuinfo_isa.crc32); + ASSERT_FALSE(cpuinfo_has_arm_crc32()); } TEST(L1I, count) { diff --git a/test/galaxy-s5-global.cc b/test/galaxy-s5-global.cc index 75e1140..6c62e77 100644 --- a/test/galaxy-s5-global.cc +++ b/test/galaxy-s5-global.cc @@ -205,95 +205,123 @@ TEST(PACKAGES, core_count) { } TEST(ISA, thumb) { - ASSERT_TRUE(cpuinfo_isa.thumb); + ASSERT_TRUE(cpuinfo_has_arm_thumb()); } TEST(ISA, thumb2) { - ASSERT_TRUE(cpuinfo_isa.thumb2); -} - -TEST(ISA, thumbee) { - ASSERT_FALSE(cpuinfo_isa.thumbee); -} - -TEST(ISA, jazelle) { - ASSERT_FALSE(cpuinfo_isa.jazelle); + ASSERT_TRUE(cpuinfo_has_arm_thumb2()); } TEST(ISA, armv5e) { - ASSERT_TRUE(cpuinfo_isa.armv5e); + ASSERT_TRUE(cpuinfo_has_arm_v5e()); } TEST(ISA, armv6) { - ASSERT_TRUE(cpuinfo_isa.armv6); + ASSERT_TRUE(cpuinfo_has_arm_v6()); } TEST(ISA, armv6k) { - ASSERT_TRUE(cpuinfo_isa.armv6k); + ASSERT_TRUE(cpuinfo_has_arm_v6k()); } TEST(ISA, armv7) { - ASSERT_TRUE(cpuinfo_isa.armv7); + ASSERT_TRUE(cpuinfo_has_arm_v7()); } TEST(ISA, armv7mp) { - ASSERT_TRUE(cpuinfo_isa.armv7mp); + ASSERT_TRUE(cpuinfo_has_arm_v7mp()); } TEST(ISA, idiv) { - ASSERT_TRUE(cpuinfo_isa.idiv); + ASSERT_TRUE(cpuinfo_has_arm_idiv()); } TEST(ISA, vfpv2) { - ASSERT_FALSE(cpuinfo_isa.vfpv2); + ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); } TEST(ISA, vfpv3) { - ASSERT_TRUE(cpuinfo_isa.vfpv3); + ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); +} + +TEST(ISA, vfpv3_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); } -TEST(ISA, d32) { - ASSERT_TRUE(cpuinfo_isa.d32); +TEST(ISA, vfpv3_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16()); } -TEST(ISA, fp16) { - ASSERT_TRUE(cpuinfo_isa.fp16); +TEST(ISA, vfpv3_fp16_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32()); } -TEST(ISA, fma) { - ASSERT_TRUE(cpuinfo_isa.fma); +TEST(ISA, vfpv4) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4()); +} + +TEST(ISA, vfpv4_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32()); } TEST(ISA, wmmx) { - ASSERT_FALSE(cpuinfo_isa.wmmx); + ASSERT_FALSE(cpuinfo_has_arm_wmmx()); } TEST(ISA, wmmx2) { - ASSERT_FALSE(cpuinfo_isa.wmmx2); + ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); } TEST(ISA, neon) { - ASSERT_TRUE(cpuinfo_isa.neon); + ASSERT_TRUE(cpuinfo_has_arm_neon()); +} + +TEST(ISA, neon_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fp16()); +} + +TEST(ISA, neon_fma) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fma()); +} + +TEST(ISA, atomics) { + ASSERT_FALSE(cpuinfo_has_arm_atomics()); +} + +TEST(ISA, neon_rdm) { + ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); +} + +TEST(ISA, fp16_arith) { + ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); +} + +TEST(ISA, jscvt) { + ASSERT_FALSE(cpuinfo_has_arm_jscvt()); +} + +TEST(ISA, fcma) { + ASSERT_FALSE(cpuinfo_has_arm_fcma()); } TEST(ISA, aes) { - ASSERT_FALSE(cpuinfo_isa.aes); + ASSERT_FALSE(cpuinfo_has_arm_aes()); } TEST(ISA, sha1) { - ASSERT_FALSE(cpuinfo_isa.sha1); + ASSERT_FALSE(cpuinfo_has_arm_sha1()); } TEST(ISA, sha2) { - ASSERT_FALSE(cpuinfo_isa.sha2); + ASSERT_FALSE(cpuinfo_has_arm_sha2()); } TEST(ISA, pmull) { - ASSERT_FALSE(cpuinfo_isa.pmull); + ASSERT_FALSE(cpuinfo_has_arm_pmull()); } TEST(ISA, crc32) { - ASSERT_FALSE(cpuinfo_isa.crc32); + ASSERT_FALSE(cpuinfo_has_arm_crc32()); } TEST(L1I, count) { diff --git a/test/galaxy-s5-us.cc b/test/galaxy-s5-us.cc index 8f9dae3..a4f812a 100644 --- a/test/galaxy-s5-us.cc +++ b/test/galaxy-s5-us.cc @@ -153,95 +153,123 @@ TEST(PACKAGES, core_count) { } TEST(ISA, thumb) { - ASSERT_TRUE(cpuinfo_isa.thumb); + ASSERT_TRUE(cpuinfo_has_arm_thumb()); } TEST(ISA, thumb2) { - ASSERT_TRUE(cpuinfo_isa.thumb2); -} - -TEST(ISA, thumbee) { - ASSERT_FALSE(cpuinfo_isa.thumbee); -} - -TEST(ISA, jazelle) { - ASSERT_FALSE(cpuinfo_isa.jazelle); + ASSERT_TRUE(cpuinfo_has_arm_thumb2()); } TEST(ISA, armv5e) { - ASSERT_TRUE(cpuinfo_isa.armv5e); + ASSERT_TRUE(cpuinfo_has_arm_v5e()); } TEST(ISA, armv6) { - ASSERT_TRUE(cpuinfo_isa.armv6); + ASSERT_TRUE(cpuinfo_has_arm_v6()); } TEST(ISA, armv6k) { - ASSERT_TRUE(cpuinfo_isa.armv6k); + ASSERT_TRUE(cpuinfo_has_arm_v6k()); } TEST(ISA, armv7) { - ASSERT_TRUE(cpuinfo_isa.armv7); + ASSERT_TRUE(cpuinfo_has_arm_v7()); } TEST(ISA, armv7mp) { - ASSERT_TRUE(cpuinfo_isa.armv7mp); + ASSERT_TRUE(cpuinfo_has_arm_v7mp()); } TEST(ISA, idiv) { - ASSERT_TRUE(cpuinfo_isa.idiv); + ASSERT_TRUE(cpuinfo_has_arm_idiv()); } TEST(ISA, vfpv2) { - ASSERT_FALSE(cpuinfo_isa.vfpv2); + ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); } TEST(ISA, vfpv3) { - ASSERT_TRUE(cpuinfo_isa.vfpv3); + ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); +} + +TEST(ISA, vfpv3_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); } -TEST(ISA, d32) { - ASSERT_TRUE(cpuinfo_isa.d32); +TEST(ISA, vfpv3_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16()); } -TEST(ISA, fp16) { - ASSERT_TRUE(cpuinfo_isa.fp16); +TEST(ISA, vfpv3_fp16_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32()); } -TEST(ISA, fma) { - ASSERT_TRUE(cpuinfo_isa.fma); +TEST(ISA, vfpv4) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4()); +} + +TEST(ISA, vfpv4_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32()); } TEST(ISA, wmmx) { - ASSERT_FALSE(cpuinfo_isa.wmmx); + ASSERT_FALSE(cpuinfo_has_arm_wmmx()); } TEST(ISA, wmmx2) { - ASSERT_FALSE(cpuinfo_isa.wmmx2); + ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); } TEST(ISA, neon) { - ASSERT_TRUE(cpuinfo_isa.neon); + ASSERT_TRUE(cpuinfo_has_arm_neon()); +} + +TEST(ISA, neon_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fp16()); +} + +TEST(ISA, neon_fma) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fma()); +} + +TEST(ISA, atomics) { + ASSERT_FALSE(cpuinfo_has_arm_atomics()); +} + +TEST(ISA, neon_rdm) { + ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); +} + +TEST(ISA, fp16_arith) { + ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); +} + +TEST(ISA, jscvt) { + ASSERT_FALSE(cpuinfo_has_arm_jscvt()); +} + +TEST(ISA, fcma) { + ASSERT_FALSE(cpuinfo_has_arm_fcma()); } TEST(ISA, aes) { - ASSERT_FALSE(cpuinfo_isa.aes); + ASSERT_FALSE(cpuinfo_has_arm_aes()); } TEST(ISA, sha1) { - ASSERT_FALSE(cpuinfo_isa.sha1); + ASSERT_FALSE(cpuinfo_has_arm_sha1()); } TEST(ISA, sha2) { - ASSERT_FALSE(cpuinfo_isa.sha2); + ASSERT_FALSE(cpuinfo_has_arm_sha2()); } TEST(ISA, pmull) { - ASSERT_FALSE(cpuinfo_isa.pmull); + ASSERT_FALSE(cpuinfo_has_arm_pmull()); } TEST(ISA, crc32) { - ASSERT_FALSE(cpuinfo_isa.crc32); + ASSERT_FALSE(cpuinfo_has_arm_crc32()); } TEST(L1I, count) { diff --git a/test/galaxy-s6.cc b/test/galaxy-s6.cc index 20346b4..7fa1bf4 100644 --- a/test/galaxy-s6.cc +++ b/test/galaxy-s6.cc @@ -204,121 +204,153 @@ TEST(PACKAGES, core_count) { } } -#if CPUINFO_ARCH_ARM TEST(ISA, thumb) { - ASSERT_TRUE(cpuinfo_isa.thumb); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_thumb()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_thumb()); + #endif } TEST(ISA, thumb2) { - ASSERT_TRUE(cpuinfo_isa.thumb2); -} - -TEST(ISA, thumbee) { - ASSERT_FALSE(cpuinfo_isa.thumbee); -} - -TEST(ISA, jazelle) { - ASSERT_FALSE(cpuinfo_isa.jazelle); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_thumb2()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_thumb2()); + #endif } TEST(ISA, armv5e) { - ASSERT_TRUE(cpuinfo_isa.armv5e); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v5e()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v5e()); + #endif } TEST(ISA, armv6) { - ASSERT_TRUE(cpuinfo_isa.armv6); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v6()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v6()); + #endif } TEST(ISA, armv6k) { - ASSERT_TRUE(cpuinfo_isa.armv6k); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v6k()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v6k()); + #endif } TEST(ISA, armv7) { - ASSERT_TRUE(cpuinfo_isa.armv7); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v7()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v7()); + #endif } TEST(ISA, armv7mp) { - ASSERT_TRUE(cpuinfo_isa.armv7mp); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v7mp()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v7mp()); + #endif } TEST(ISA, idiv) { - ASSERT_TRUE(cpuinfo_isa.idiv); + ASSERT_TRUE(cpuinfo_has_arm_idiv()); } TEST(ISA, vfpv2) { - ASSERT_FALSE(cpuinfo_isa.vfpv2); + ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); } TEST(ISA, vfpv3) { - ASSERT_TRUE(cpuinfo_isa.vfpv3); + ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); +} + +TEST(ISA, vfpv3_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); +} + +TEST(ISA, vfpv3_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16()); } -TEST(ISA, d32) { - ASSERT_TRUE(cpuinfo_isa.d32); +TEST(ISA, vfpv3_fp16_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32()); } -TEST(ISA, fp16) { - ASSERT_TRUE(cpuinfo_isa.fp16); +TEST(ISA, vfpv4) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4()); } -TEST(ISA, fma) { - ASSERT_TRUE(cpuinfo_isa.fma); +TEST(ISA, vfpv4_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32()); } TEST(ISA, wmmx) { - ASSERT_FALSE(cpuinfo_isa.wmmx); + ASSERT_FALSE(cpuinfo_has_arm_wmmx()); } TEST(ISA, wmmx2) { - ASSERT_FALSE(cpuinfo_isa.wmmx2); + ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); } TEST(ISA, neon) { - ASSERT_TRUE(cpuinfo_isa.neon); + ASSERT_TRUE(cpuinfo_has_arm_neon()); } -#endif /* CPUINFO_ARCH_ARM */ -TEST(ISA, aes) { - ASSERT_TRUE(cpuinfo_isa.aes); +TEST(ISA, neon_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fp16()); } -TEST(ISA, sha1) { - ASSERT_TRUE(cpuinfo_isa.sha1); +TEST(ISA, neon_fma) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fma()); } -TEST(ISA, sha2) { - ASSERT_TRUE(cpuinfo_isa.sha2); +TEST(ISA, atomics) { + ASSERT_FALSE(cpuinfo_has_arm_atomics()); } -TEST(ISA, pmull) { - ASSERT_TRUE(cpuinfo_isa.pmull); +TEST(ISA, neon_rdm) { + ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); } -TEST(ISA, crc32) { - ASSERT_TRUE(cpuinfo_isa.crc32); +TEST(ISA, fp16_arith) { + ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); } -#if CPUINFO_ARCH_ARM64 -TEST(ISA, atomics) { - ASSERT_FALSE(cpuinfo_isa.atomics); +TEST(ISA, jscvt) { + ASSERT_FALSE(cpuinfo_has_arm_jscvt()); } -TEST(ISA, rdm) { - ASSERT_FALSE(cpuinfo_isa.rdm); +TEST(ISA, fcma) { + ASSERT_FALSE(cpuinfo_has_arm_fcma()); } -TEST(ISA, fp16arith) { - ASSERT_FALSE(cpuinfo_isa.fp16arith); +TEST(ISA, aes) { + ASSERT_TRUE(cpuinfo_has_arm_aes()); } -TEST(ISA, jscvt) { - ASSERT_FALSE(cpuinfo_isa.jscvt); +TEST(ISA, sha1) { + ASSERT_TRUE(cpuinfo_has_arm_sha1()); } -TEST(ISA, fcma) { - ASSERT_FALSE(cpuinfo_isa.fcma); +TEST(ISA, sha2) { + ASSERT_TRUE(cpuinfo_has_arm_sha2()); +} + +TEST(ISA, pmull) { + ASSERT_TRUE(cpuinfo_has_arm_pmull()); +} + +TEST(ISA, crc32) { + ASSERT_TRUE(cpuinfo_has_arm_crc32()); } -#endif /* CPUINFO_ARCH_ARM64 */ TEST(L1I, count) { cpuinfo_caches l1i = cpuinfo_get_l1i_cache(); diff --git a/test/galaxy-s7-global.cc b/test/galaxy-s7-global.cc index d52a83f..ab2ac35 100644 --- a/test/galaxy-s7-global.cc +++ b/test/galaxy-s7-global.cc @@ -217,121 +217,153 @@ TEST(PACKAGES, core_count) { } } -#if CPUINFO_ARCH_ARM TEST(ISA, thumb) { - ASSERT_TRUE(cpuinfo_isa.thumb); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_thumb()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_thumb()); + #endif } TEST(ISA, thumb2) { - ASSERT_TRUE(cpuinfo_isa.thumb2); -} - -TEST(ISA, thumbee) { - ASSERT_FALSE(cpuinfo_isa.thumbee); -} - -TEST(ISA, jazelle) { - ASSERT_FALSE(cpuinfo_isa.jazelle); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_thumb2()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_thumb2()); + #endif } TEST(ISA, armv5e) { - ASSERT_TRUE(cpuinfo_isa.armv5e); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v5e()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v5e()); + #endif } TEST(ISA, armv6) { - ASSERT_TRUE(cpuinfo_isa.armv6); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v6()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v6()); + #endif } TEST(ISA, armv6k) { - ASSERT_TRUE(cpuinfo_isa.armv6k); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v6k()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v6k()); + #endif } TEST(ISA, armv7) { - ASSERT_TRUE(cpuinfo_isa.armv7); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v7()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v7()); + #endif } TEST(ISA, armv7mp) { - ASSERT_TRUE(cpuinfo_isa.armv7mp); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v7mp()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v7mp()); + #endif } TEST(ISA, idiv) { - ASSERT_TRUE(cpuinfo_isa.idiv); + ASSERT_TRUE(cpuinfo_has_arm_idiv()); } TEST(ISA, vfpv2) { - ASSERT_FALSE(cpuinfo_isa.vfpv2); + ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); } TEST(ISA, vfpv3) { - ASSERT_TRUE(cpuinfo_isa.vfpv3); + ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); +} + +TEST(ISA, vfpv3_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); +} + +TEST(ISA, vfpv3_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16()); } -TEST(ISA, d32) { - ASSERT_TRUE(cpuinfo_isa.d32); +TEST(ISA, vfpv3_fp16_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32()); } -TEST(ISA, fp16) { - ASSERT_TRUE(cpuinfo_isa.fp16); +TEST(ISA, vfpv4) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4()); } -TEST(ISA, fma) { - ASSERT_TRUE(cpuinfo_isa.fma); +TEST(ISA, vfpv4_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32()); } TEST(ISA, wmmx) { - ASSERT_FALSE(cpuinfo_isa.wmmx); + ASSERT_FALSE(cpuinfo_has_arm_wmmx()); } TEST(ISA, wmmx2) { - ASSERT_FALSE(cpuinfo_isa.wmmx2); + ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); } TEST(ISA, neon) { - ASSERT_TRUE(cpuinfo_isa.neon); + ASSERT_TRUE(cpuinfo_has_arm_neon()); } -#endif /* CPUINFO_ARCH_ARM */ -TEST(ISA, aes) { - ASSERT_TRUE(cpuinfo_isa.aes); +TEST(ISA, neon_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fp16()); } -TEST(ISA, sha1) { - ASSERT_TRUE(cpuinfo_isa.sha1); +TEST(ISA, neon_fma) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fma()); } -TEST(ISA, sha2) { - ASSERT_TRUE(cpuinfo_isa.sha2); +TEST(ISA, atomics) { + ASSERT_FALSE(cpuinfo_has_arm_atomics()); } -TEST(ISA, pmull) { - ASSERT_TRUE(cpuinfo_isa.pmull); +TEST(ISA, neon_rdm) { + ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); } -TEST(ISA, crc32) { - ASSERT_TRUE(cpuinfo_isa.crc32); +TEST(ISA, fp16_arith) { + ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); } -#if CPUINFO_ARCH_ARM64 -TEST(ISA, atomics) { - ASSERT_FALSE(cpuinfo_isa.atomics); +TEST(ISA, jscvt) { + ASSERT_FALSE(cpuinfo_has_arm_jscvt()); } -TEST(ISA, rdm) { - ASSERT_FALSE(cpuinfo_isa.rdm); +TEST(ISA, fcma) { + ASSERT_FALSE(cpuinfo_has_arm_fcma()); } -TEST(ISA, fp16arith) { - ASSERT_FALSE(cpuinfo_isa.fp16arith); +TEST(ISA, aes) { + ASSERT_TRUE(cpuinfo_has_arm_aes()); } -TEST(ISA, jscvt) { - ASSERT_FALSE(cpuinfo_isa.jscvt); +TEST(ISA, sha1) { + ASSERT_TRUE(cpuinfo_has_arm_sha1()); } -TEST(ISA, fcma) { - ASSERT_FALSE(cpuinfo_isa.fcma); +TEST(ISA, sha2) { + ASSERT_TRUE(cpuinfo_has_arm_sha2()); +} + +TEST(ISA, pmull) { + ASSERT_TRUE(cpuinfo_has_arm_pmull()); +} + +TEST(ISA, crc32) { + ASSERT_TRUE(cpuinfo_has_arm_crc32()); } -#endif /* CPUINFO_ARCH_ARM64 */ TEST(L1I, count) { cpuinfo_caches l1i = cpuinfo_get_l1i_cache(); diff --git a/test/galaxy-s7-us.cc b/test/galaxy-s7-us.cc index e61e34d..c4950c3 100644 --- a/test/galaxy-s7-us.cc +++ b/test/galaxy-s7-us.cc @@ -179,121 +179,153 @@ TEST(PACKAGES, core_count) { } } -#if CPUINFO_ARCH_ARM TEST(ISA, thumb) { - ASSERT_TRUE(cpuinfo_isa.thumb); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_thumb()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_thumb()); + #endif } TEST(ISA, thumb2) { - ASSERT_TRUE(cpuinfo_isa.thumb2); -} - -TEST(ISA, thumbee) { - ASSERT_FALSE(cpuinfo_isa.thumbee); -} - -TEST(ISA, jazelle) { - ASSERT_FALSE(cpuinfo_isa.jazelle); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_thumb2()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_thumb2()); + #endif } TEST(ISA, armv5e) { - ASSERT_TRUE(cpuinfo_isa.armv5e); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v5e()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v5e()); + #endif } TEST(ISA, armv6) { - ASSERT_TRUE(cpuinfo_isa.armv6); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v6()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v6()); + #endif } TEST(ISA, armv6k) { - ASSERT_TRUE(cpuinfo_isa.armv6k); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v6k()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v6k()); + #endif } TEST(ISA, armv7) { - ASSERT_TRUE(cpuinfo_isa.armv7); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v7()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v7()); + #endif } TEST(ISA, armv7mp) { - ASSERT_TRUE(cpuinfo_isa.armv7mp); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v7mp()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v7mp()); + #endif } TEST(ISA, idiv) { - ASSERT_TRUE(cpuinfo_isa.idiv); + ASSERT_TRUE(cpuinfo_has_arm_idiv()); } TEST(ISA, vfpv2) { - ASSERT_FALSE(cpuinfo_isa.vfpv2); + ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); } TEST(ISA, vfpv3) { - ASSERT_TRUE(cpuinfo_isa.vfpv3); + ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); +} + +TEST(ISA, vfpv3_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); +} + +TEST(ISA, vfpv3_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16()); } -TEST(ISA, d32) { - ASSERT_TRUE(cpuinfo_isa.d32); +TEST(ISA, vfpv3_fp16_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32()); } -TEST(ISA, fp16) { - ASSERT_TRUE(cpuinfo_isa.fp16); +TEST(ISA, vfpv4) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4()); } -TEST(ISA, fma) { - ASSERT_TRUE(cpuinfo_isa.fma); +TEST(ISA, vfpv4_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32()); } TEST(ISA, wmmx) { - ASSERT_FALSE(cpuinfo_isa.wmmx); + ASSERT_FALSE(cpuinfo_has_arm_wmmx()); } TEST(ISA, wmmx2) { - ASSERT_FALSE(cpuinfo_isa.wmmx2); + ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); } TEST(ISA, neon) { - ASSERT_TRUE(cpuinfo_isa.neon); + ASSERT_TRUE(cpuinfo_has_arm_neon()); } -#endif /* CPUINFO_ARCH_ARM */ -TEST(ISA, aes) { - ASSERT_TRUE(cpuinfo_isa.aes); +TEST(ISA, neon_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fp16()); } -TEST(ISA, sha1) { - ASSERT_TRUE(cpuinfo_isa.sha1); +TEST(ISA, neon_fma) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fma()); } -TEST(ISA, sha2) { - ASSERT_TRUE(cpuinfo_isa.sha2); +TEST(ISA, atomics) { + ASSERT_FALSE(cpuinfo_has_arm_atomics()); } -TEST(ISA, pmull) { - ASSERT_TRUE(cpuinfo_isa.pmull); +TEST(ISA, neon_rdm) { + ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); } -TEST(ISA, crc32) { - ASSERT_TRUE(cpuinfo_isa.crc32); +TEST(ISA, fp16_arith) { + ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); } -#if CPUINFO_ARCH_ARM64 -TEST(ISA, atomics) { - ASSERT_FALSE(cpuinfo_isa.atomics); +TEST(ISA, jscvt) { + ASSERT_FALSE(cpuinfo_has_arm_jscvt()); } -TEST(ISA, rdm) { - ASSERT_FALSE(cpuinfo_isa.rdm); +TEST(ISA, fcma) { + ASSERT_FALSE(cpuinfo_has_arm_fcma()); } -TEST(ISA, fp16arith) { - ASSERT_FALSE(cpuinfo_isa.fp16arith); +TEST(ISA, aes) { + ASSERT_TRUE(cpuinfo_has_arm_aes()); } -TEST(ISA, jscvt) { - ASSERT_FALSE(cpuinfo_isa.jscvt); +TEST(ISA, sha1) { + ASSERT_TRUE(cpuinfo_has_arm_sha1()); } -TEST(ISA, fcma) { - ASSERT_FALSE(cpuinfo_isa.fcma); +TEST(ISA, sha2) { + ASSERT_TRUE(cpuinfo_has_arm_sha2()); +} + +TEST(ISA, pmull) { + ASSERT_TRUE(cpuinfo_has_arm_pmull()); +} + +TEST(ISA, crc32) { + ASSERT_TRUE(cpuinfo_has_arm_crc32()); } -#endif /* CPUINFO_ARCH_ARM64 */ TEST(L1I, count) { cpuinfo_caches l1i = cpuinfo_get_l1i_cache(); diff --git a/test/galaxy-s8-global.cc b/test/galaxy-s8-global.cc index c9795d0..eee7a86 100644 --- a/test/galaxy-s8-global.cc +++ b/test/galaxy-s8-global.cc @@ -217,121 +217,153 @@ TEST(PACKAGES, core_count) { } } -#if CPUINFO_ARCH_ARM TEST(ISA, thumb) { - ASSERT_TRUE(cpuinfo_isa.thumb); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_thumb()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_thumb()); + #endif } TEST(ISA, thumb2) { - ASSERT_TRUE(cpuinfo_isa.thumb2); -} - -TEST(ISA, thumbee) { - ASSERT_FALSE(cpuinfo_isa.thumbee); -} - -TEST(ISA, jazelle) { - ASSERT_FALSE(cpuinfo_isa.jazelle); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_thumb2()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_thumb2()); + #endif } TEST(ISA, armv5e) { - ASSERT_TRUE(cpuinfo_isa.armv5e); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v5e()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v5e()); + #endif } TEST(ISA, armv6) { - ASSERT_TRUE(cpuinfo_isa.armv6); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v6()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v6()); + #endif } TEST(ISA, armv6k) { - ASSERT_TRUE(cpuinfo_isa.armv6k); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v6k()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v6k()); + #endif } TEST(ISA, armv7) { - ASSERT_TRUE(cpuinfo_isa.armv7); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v7()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v7()); + #endif } TEST(ISA, armv7mp) { - ASSERT_TRUE(cpuinfo_isa.armv7mp); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v7mp()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v7mp()); + #endif } TEST(ISA, idiv) { - ASSERT_TRUE(cpuinfo_isa.idiv); + ASSERT_TRUE(cpuinfo_has_arm_idiv()); } TEST(ISA, vfpv2) { - ASSERT_FALSE(cpuinfo_isa.vfpv2); + ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); } TEST(ISA, vfpv3) { - ASSERT_TRUE(cpuinfo_isa.vfpv3); + ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); +} + +TEST(ISA, vfpv3_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); +} + +TEST(ISA, vfpv3_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16()); } -TEST(ISA, d32) { - ASSERT_TRUE(cpuinfo_isa.d32); +TEST(ISA, vfpv3_fp16_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32()); } -TEST(ISA, fp16) { - ASSERT_TRUE(cpuinfo_isa.fp16); +TEST(ISA, vfpv4) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4()); } -TEST(ISA, fma) { - ASSERT_TRUE(cpuinfo_isa.fma); +TEST(ISA, vfpv4_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32()); } TEST(ISA, wmmx) { - ASSERT_FALSE(cpuinfo_isa.wmmx); + ASSERT_FALSE(cpuinfo_has_arm_wmmx()); } TEST(ISA, wmmx2) { - ASSERT_FALSE(cpuinfo_isa.wmmx2); + ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); } TEST(ISA, neon) { - ASSERT_TRUE(cpuinfo_isa.neon); + ASSERT_TRUE(cpuinfo_has_arm_neon()); } -#endif /* CPUINFO_ARCH_ARM */ -TEST(ISA, aes) { - ASSERT_TRUE(cpuinfo_isa.aes); +TEST(ISA, neon_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fp16()); } -TEST(ISA, sha1) { - ASSERT_TRUE(cpuinfo_isa.sha1); +TEST(ISA, neon_fma) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fma()); } -TEST(ISA, sha2) { - ASSERT_TRUE(cpuinfo_isa.sha2); +TEST(ISA, atomics) { + ASSERT_FALSE(cpuinfo_has_arm_atomics()); } -TEST(ISA, pmull) { - ASSERT_TRUE(cpuinfo_isa.pmull); +TEST(ISA, neon_rdm) { + ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); } -TEST(ISA, crc32) { - ASSERT_TRUE(cpuinfo_isa.crc32); +TEST(ISA, fp16_arith) { + ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); } -#if CPUINFO_ARCH_ARM64 -TEST(ISA, atomics) { - ASSERT_FALSE(cpuinfo_isa.atomics); +TEST(ISA, jscvt) { + ASSERT_FALSE(cpuinfo_has_arm_jscvt()); } -TEST(ISA, rdm) { - ASSERT_FALSE(cpuinfo_isa.rdm); +TEST(ISA, fcma) { + ASSERT_FALSE(cpuinfo_has_arm_fcma()); } -TEST(ISA, fp16arith) { - ASSERT_FALSE(cpuinfo_isa.fp16arith); +TEST(ISA, aes) { + ASSERT_TRUE(cpuinfo_has_arm_aes()); } -TEST(ISA, jscvt) { - ASSERT_FALSE(cpuinfo_isa.jscvt); +TEST(ISA, sha1) { + ASSERT_TRUE(cpuinfo_has_arm_sha1()); } -TEST(ISA, fcma) { - ASSERT_FALSE(cpuinfo_isa.fcma); +TEST(ISA, sha2) { + ASSERT_TRUE(cpuinfo_has_arm_sha2()); +} + +TEST(ISA, pmull) { + ASSERT_TRUE(cpuinfo_has_arm_pmull()); +} + +TEST(ISA, crc32) { + ASSERT_TRUE(cpuinfo_has_arm_crc32()); } -#endif /* CPUINFO_ARCH_ARM64 */ TEST(L1I, count) { cpuinfo_caches l1i = cpuinfo_get_l1i_cache(); diff --git a/test/galaxy-s8-us.cc b/test/galaxy-s8-us.cc index 4e83981..c6a19dc 100644 --- a/test/galaxy-s8-us.cc +++ b/test/galaxy-s8-us.cc @@ -204,121 +204,153 @@ TEST(PACKAGES, core_count) { } } -#if CPUINFO_ARCH_ARM TEST(ISA, thumb) { - ASSERT_TRUE(cpuinfo_isa.thumb); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_thumb()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_thumb()); + #endif } TEST(ISA, thumb2) { - ASSERT_TRUE(cpuinfo_isa.thumb2); -} - -TEST(ISA, thumbee) { - ASSERT_FALSE(cpuinfo_isa.thumbee); -} - -TEST(ISA, jazelle) { - ASSERT_FALSE(cpuinfo_isa.jazelle); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_thumb2()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_thumb2()); + #endif } TEST(ISA, armv5e) { - ASSERT_TRUE(cpuinfo_isa.armv5e); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v5e()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v5e()); + #endif } TEST(ISA, armv6) { - ASSERT_TRUE(cpuinfo_isa.armv6); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v6()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v6()); + #endif } TEST(ISA, armv6k) { - ASSERT_TRUE(cpuinfo_isa.armv6k); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v6k()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v6k()); + #endif } TEST(ISA, armv7) { - ASSERT_TRUE(cpuinfo_isa.armv7); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v7()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v7()); + #endif } TEST(ISA, armv7mp) { - ASSERT_TRUE(cpuinfo_isa.armv7mp); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v7mp()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v7mp()); + #endif } TEST(ISA, idiv) { - ASSERT_TRUE(cpuinfo_isa.idiv); + ASSERT_TRUE(cpuinfo_has_arm_idiv()); } TEST(ISA, vfpv2) { - ASSERT_FALSE(cpuinfo_isa.vfpv2); + ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); } TEST(ISA, vfpv3) { - ASSERT_TRUE(cpuinfo_isa.vfpv3); + ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); +} + +TEST(ISA, vfpv3_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); +} + +TEST(ISA, vfpv3_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16()); } -TEST(ISA, d32) { - ASSERT_TRUE(cpuinfo_isa.d32); +TEST(ISA, vfpv3_fp16_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32()); } -TEST(ISA, fp16) { - ASSERT_TRUE(cpuinfo_isa.fp16); +TEST(ISA, vfpv4) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4()); } -TEST(ISA, fma) { - ASSERT_TRUE(cpuinfo_isa.fma); +TEST(ISA, vfpv4_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32()); } TEST(ISA, wmmx) { - ASSERT_FALSE(cpuinfo_isa.wmmx); + ASSERT_FALSE(cpuinfo_has_arm_wmmx()); } TEST(ISA, wmmx2) { - ASSERT_FALSE(cpuinfo_isa.wmmx2); + ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); } TEST(ISA, neon) { - ASSERT_TRUE(cpuinfo_isa.neon); + ASSERT_TRUE(cpuinfo_has_arm_neon()); } -#endif /* CPUINFO_ARCH_ARM */ -TEST(ISA, aes) { - ASSERT_TRUE(cpuinfo_isa.aes); +TEST(ISA, neon_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fp16()); } -TEST(ISA, sha1) { - ASSERT_TRUE(cpuinfo_isa.sha1); +TEST(ISA, neon_fma) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fma()); } -TEST(ISA, sha2) { - ASSERT_TRUE(cpuinfo_isa.sha2); +TEST(ISA, atomics) { + ASSERT_FALSE(cpuinfo_has_arm_atomics()); } -TEST(ISA, pmull) { - ASSERT_TRUE(cpuinfo_isa.pmull); +TEST(ISA, neon_rdm) { + ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); } -TEST(ISA, crc32) { - ASSERT_TRUE(cpuinfo_isa.crc32); +TEST(ISA, fp16_arith) { + ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); } -#if CPUINFO_ARCH_ARM64 -TEST(ISA, atomics) { - ASSERT_FALSE(cpuinfo_isa.atomics); +TEST(ISA, jscvt) { + ASSERT_FALSE(cpuinfo_has_arm_jscvt()); } -TEST(ISA, rdm) { - ASSERT_FALSE(cpuinfo_isa.rdm); +TEST(ISA, fcma) { + ASSERT_FALSE(cpuinfo_has_arm_fcma()); } -TEST(ISA, fp16arith) { - ASSERT_FALSE(cpuinfo_isa.fp16arith); +TEST(ISA, aes) { + ASSERT_TRUE(cpuinfo_has_arm_aes()); } -TEST(ISA, jscvt) { - ASSERT_FALSE(cpuinfo_isa.jscvt); +TEST(ISA, sha1) { + ASSERT_TRUE(cpuinfo_has_arm_sha1()); } -TEST(ISA, fcma) { - ASSERT_FALSE(cpuinfo_isa.fcma); +TEST(ISA, sha2) { + ASSERT_TRUE(cpuinfo_has_arm_sha2()); +} + +TEST(ISA, pmull) { + ASSERT_TRUE(cpuinfo_has_arm_pmull()); +} + +TEST(ISA, crc32) { + ASSERT_TRUE(cpuinfo_has_arm_crc32()); } -#endif /* CPUINFO_ARCH_ARM64 */ TEST(L1I, count) { cpuinfo_caches l1i = cpuinfo_get_l1i_cache(); diff --git a/test/galaxy-tab-3-7.0.cc b/test/galaxy-tab-3-7.0.cc index d2ce1b0..ee5e9b1 100644 --- a/test/galaxy-tab-3-7.0.cc +++ b/test/galaxy-tab-3-7.0.cc @@ -153,95 +153,123 @@ TEST(PACKAGES, core_count) { } TEST(ISA, thumb) { - ASSERT_TRUE(cpuinfo_isa.thumb); + ASSERT_TRUE(cpuinfo_has_arm_thumb()); } TEST(ISA, thumb2) { - ASSERT_TRUE(cpuinfo_isa.thumb2); -} - -TEST(ISA, thumbee) { - ASSERT_TRUE(cpuinfo_isa.thumbee); -} - -TEST(ISA, jazelle) { - ASSERT_FALSE(cpuinfo_isa.jazelle); + ASSERT_TRUE(cpuinfo_has_arm_thumb2()); } TEST(ISA, armv5e) { - ASSERT_TRUE(cpuinfo_isa.armv5e); + ASSERT_TRUE(cpuinfo_has_arm_v5e()); } TEST(ISA, armv6) { - ASSERT_TRUE(cpuinfo_isa.armv6); + ASSERT_TRUE(cpuinfo_has_arm_v6()); } TEST(ISA, armv6k) { - ASSERT_TRUE(cpuinfo_isa.armv6k); + ASSERT_TRUE(cpuinfo_has_arm_v6k()); } TEST(ISA, armv7) { - ASSERT_TRUE(cpuinfo_isa.armv7); + ASSERT_TRUE(cpuinfo_has_arm_v7()); } TEST(ISA, DISABLED_armv7mp) { - ASSERT_TRUE(cpuinfo_isa.armv7mp); + ASSERT_TRUE(cpuinfo_has_arm_v7mp()); } TEST(ISA, idiv) { - ASSERT_FALSE(cpuinfo_isa.idiv); + ASSERT_FALSE(cpuinfo_has_arm_idiv()); } TEST(ISA, vfpv2) { - ASSERT_FALSE(cpuinfo_isa.vfpv2); + ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); } TEST(ISA, vfpv3) { - ASSERT_TRUE(cpuinfo_isa.vfpv3); + ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); +} + +TEST(ISA, vfpv3_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); } -TEST(ISA, d32) { - ASSERT_TRUE(cpuinfo_isa.d32); +TEST(ISA, vfpv3_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16()); } -TEST(ISA, fp16) { - ASSERT_TRUE(cpuinfo_isa.fp16); +TEST(ISA, vfpv3_fp16_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32()); } -TEST(ISA, fma) { - ASSERT_FALSE(cpuinfo_isa.fma); +TEST(ISA, vfpv4) { + ASSERT_FALSE(cpuinfo_has_arm_vfpv4()); +} + +TEST(ISA, vfpv4_d32) { + ASSERT_FALSE(cpuinfo_has_arm_vfpv4_d32()); } TEST(ISA, wmmx) { - ASSERT_FALSE(cpuinfo_isa.wmmx); + ASSERT_FALSE(cpuinfo_has_arm_wmmx()); } TEST(ISA, wmmx2) { - ASSERT_FALSE(cpuinfo_isa.wmmx2); + ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); } TEST(ISA, neon) { - ASSERT_TRUE(cpuinfo_isa.neon); + ASSERT_TRUE(cpuinfo_has_arm_neon()); +} + +TEST(ISA, neon_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fp16()); +} + +TEST(ISA, neon_fma) { + ASSERT_FALSE(cpuinfo_has_arm_neon_fma()); +} + +TEST(ISA, atomics) { + ASSERT_FALSE(cpuinfo_has_arm_atomics()); +} + +TEST(ISA, neon_rdm) { + ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); +} + +TEST(ISA, fp16_arith) { + ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); +} + +TEST(ISA, jscvt) { + ASSERT_FALSE(cpuinfo_has_arm_jscvt()); +} + +TEST(ISA, fcma) { + ASSERT_FALSE(cpuinfo_has_arm_fcma()); } TEST(ISA, aes) { - ASSERT_FALSE(cpuinfo_isa.aes); + ASSERT_FALSE(cpuinfo_has_arm_aes()); } TEST(ISA, sha1) { - ASSERT_FALSE(cpuinfo_isa.sha1); + ASSERT_FALSE(cpuinfo_has_arm_sha1()); } TEST(ISA, sha2) { - ASSERT_FALSE(cpuinfo_isa.sha2); + ASSERT_FALSE(cpuinfo_has_arm_sha2()); } TEST(ISA, pmull) { - ASSERT_FALSE(cpuinfo_isa.pmull); + ASSERT_FALSE(cpuinfo_has_arm_pmull()); } TEST(ISA, crc32) { - ASSERT_FALSE(cpuinfo_isa.crc32); + ASSERT_FALSE(cpuinfo_has_arm_crc32()); } TEST(L1I, count) { diff --git a/test/galaxy-win-duos.cc b/test/galaxy-win-duos.cc index 4d59798..c5d9704 100644 --- a/test/galaxy-win-duos.cc +++ b/test/galaxy-win-duos.cc @@ -153,95 +153,123 @@ TEST(PACKAGES, core_count) { } TEST(ISA, thumb) { - ASSERT_TRUE(cpuinfo_isa.thumb); + ASSERT_TRUE(cpuinfo_has_arm_thumb()); } TEST(ISA, thumb2) { - ASSERT_TRUE(cpuinfo_isa.thumb2); -} - -TEST(ISA, thumbee) { - ASSERT_TRUE(cpuinfo_isa.thumbee); -} - -TEST(ISA, jazelle) { - ASSERT_FALSE(cpuinfo_isa.jazelle); + ASSERT_TRUE(cpuinfo_has_arm_thumb2()); } TEST(ISA, armv5e) { - ASSERT_TRUE(cpuinfo_isa.armv5e); + ASSERT_TRUE(cpuinfo_has_arm_v5e()); } TEST(ISA, armv6) { - ASSERT_TRUE(cpuinfo_isa.armv6); + ASSERT_TRUE(cpuinfo_has_arm_v6()); } TEST(ISA, armv6k) { - ASSERT_TRUE(cpuinfo_isa.armv6k); + ASSERT_TRUE(cpuinfo_has_arm_v6k()); } TEST(ISA, armv7) { - ASSERT_TRUE(cpuinfo_isa.armv7); + ASSERT_TRUE(cpuinfo_has_arm_v7()); } TEST(ISA, armv7mp) { - ASSERT_TRUE(cpuinfo_isa.armv7mp); + ASSERT_TRUE(cpuinfo_has_arm_v7mp()); } TEST(ISA, idiv) { - ASSERT_FALSE(cpuinfo_isa.idiv); + ASSERT_FALSE(cpuinfo_has_arm_idiv()); } TEST(ISA, vfpv2) { - ASSERT_FALSE(cpuinfo_isa.vfpv2); + ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); } TEST(ISA, vfpv3) { - ASSERT_TRUE(cpuinfo_isa.vfpv3); + ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); +} + +TEST(ISA, vfpv3_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); } -TEST(ISA, d32) { - ASSERT_TRUE(cpuinfo_isa.d32); +TEST(ISA, vfpv3_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16()); } -TEST(ISA, fp16) { - ASSERT_TRUE(cpuinfo_isa.fp16); +TEST(ISA, vfpv3_fp16_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32()); } -TEST(ISA, fma) { - ASSERT_TRUE(cpuinfo_isa.fma); +TEST(ISA, vfpv4) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4()); +} + +TEST(ISA, vfpv4_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32()); } TEST(ISA, wmmx) { - ASSERT_FALSE(cpuinfo_isa.wmmx); + ASSERT_FALSE(cpuinfo_has_arm_wmmx()); } TEST(ISA, wmmx2) { - ASSERT_FALSE(cpuinfo_isa.wmmx2); + ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); } TEST(ISA, neon) { - ASSERT_TRUE(cpuinfo_isa.neon); + ASSERT_TRUE(cpuinfo_has_arm_neon()); +} + +TEST(ISA, neon_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fp16()); +} + +TEST(ISA, neon_fma) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fma()); +} + +TEST(ISA, atomics) { + ASSERT_FALSE(cpuinfo_has_arm_atomics()); +} + +TEST(ISA, neon_rdm) { + ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); +} + +TEST(ISA, fp16_arith) { + ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); +} + +TEST(ISA, jscvt) { + ASSERT_FALSE(cpuinfo_has_arm_jscvt()); +} + +TEST(ISA, fcma) { + ASSERT_FALSE(cpuinfo_has_arm_fcma()); } TEST(ISA, aes) { - ASSERT_FALSE(cpuinfo_isa.aes); + ASSERT_FALSE(cpuinfo_has_arm_aes()); } TEST(ISA, sha1) { - ASSERT_FALSE(cpuinfo_isa.sha1); + ASSERT_FALSE(cpuinfo_has_arm_sha1()); } TEST(ISA, sha2) { - ASSERT_FALSE(cpuinfo_isa.sha2); + ASSERT_FALSE(cpuinfo_has_arm_sha2()); } TEST(ISA, pmull) { - ASSERT_FALSE(cpuinfo_isa.pmull); + ASSERT_FALSE(cpuinfo_has_arm_pmull()); } TEST(ISA, crc32) { - ASSERT_FALSE(cpuinfo_isa.crc32); + ASSERT_FALSE(cpuinfo_has_arm_crc32()); } TEST(L1I, count) { diff --git a/test/huawei-mate-8.cc b/test/huawei-mate-8.cc index 9b9d9bb..3b6544f 100644 --- a/test/huawei-mate-8.cc +++ b/test/huawei-mate-8.cc @@ -204,121 +204,153 @@ TEST(PACKAGES, core_count) { } } -#if CPUINFO_ARCH_ARM TEST(ISA, thumb) { - ASSERT_TRUE(cpuinfo_isa.thumb); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_thumb()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_thumb()); + #endif } TEST(ISA, thumb2) { - ASSERT_TRUE(cpuinfo_isa.thumb2); -} - -TEST(ISA, thumbee) { - ASSERT_FALSE(cpuinfo_isa.thumbee); -} - -TEST(ISA, jazelle) { - ASSERT_FALSE(cpuinfo_isa.jazelle); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_thumb2()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_thumb2()); + #endif } TEST(ISA, armv5e) { - ASSERT_TRUE(cpuinfo_isa.armv5e); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v5e()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v5e()); + #endif } TEST(ISA, armv6) { - ASSERT_TRUE(cpuinfo_isa.armv6); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v6()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v6()); + #endif } TEST(ISA, armv6k) { - ASSERT_TRUE(cpuinfo_isa.armv6k); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v6k()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v6k()); + #endif } TEST(ISA, armv7) { - ASSERT_TRUE(cpuinfo_isa.armv7); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v7()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v7()); + #endif } TEST(ISA, armv7mp) { - ASSERT_TRUE(cpuinfo_isa.armv7mp); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v7mp()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v7mp()); + #endif } TEST(ISA, idiv) { - ASSERT_TRUE(cpuinfo_isa.idiv); + ASSERT_TRUE(cpuinfo_has_arm_idiv()); } TEST(ISA, vfpv2) { - ASSERT_FALSE(cpuinfo_isa.vfpv2); + ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); } TEST(ISA, vfpv3) { - ASSERT_TRUE(cpuinfo_isa.vfpv3); + ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); +} + +TEST(ISA, vfpv3_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); +} + +TEST(ISA, vfpv3_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16()); } -TEST(ISA, d32) { - ASSERT_TRUE(cpuinfo_isa.d32); +TEST(ISA, vfpv3_fp16_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32()); } -TEST(ISA, fp16) { - ASSERT_TRUE(cpuinfo_isa.fp16); +TEST(ISA, vfpv4) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4()); } -TEST(ISA, fma) { - ASSERT_TRUE(cpuinfo_isa.fma); +TEST(ISA, vfpv4_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32()); } TEST(ISA, wmmx) { - ASSERT_FALSE(cpuinfo_isa.wmmx); + ASSERT_FALSE(cpuinfo_has_arm_wmmx()); } TEST(ISA, wmmx2) { - ASSERT_FALSE(cpuinfo_isa.wmmx2); + ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); } TEST(ISA, neon) { - ASSERT_TRUE(cpuinfo_isa.neon); + ASSERT_TRUE(cpuinfo_has_arm_neon()); } -#endif /* CPUINFO_ARCH_ARM */ -TEST(ISA, aes) { - ASSERT_TRUE(cpuinfo_isa.aes); +TEST(ISA, neon_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fp16()); } -TEST(ISA, sha1) { - ASSERT_TRUE(cpuinfo_isa.sha1); +TEST(ISA, neon_fma) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fma()); } -TEST(ISA, sha2) { - ASSERT_TRUE(cpuinfo_isa.sha2); +TEST(ISA, atomics) { + ASSERT_FALSE(cpuinfo_has_arm_atomics()); } -TEST(ISA, pmull) { - ASSERT_TRUE(cpuinfo_isa.pmull); +TEST(ISA, neon_rdm) { + ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); } -TEST(ISA, crc32) { - ASSERT_TRUE(cpuinfo_isa.crc32); +TEST(ISA, fp16_arith) { + ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); } -#if CPUINFO_ARCH_ARM64 -TEST(ISA, atomics) { - ASSERT_FALSE(cpuinfo_isa.atomics); +TEST(ISA, jscvt) { + ASSERT_FALSE(cpuinfo_has_arm_jscvt()); } -TEST(ISA, rdm) { - ASSERT_FALSE(cpuinfo_isa.rdm); +TEST(ISA, fcma) { + ASSERT_FALSE(cpuinfo_has_arm_fcma()); } -TEST(ISA, fp16arith) { - ASSERT_FALSE(cpuinfo_isa.fp16arith); +TEST(ISA, aes) { + ASSERT_TRUE(cpuinfo_has_arm_aes()); } -TEST(ISA, jscvt) { - ASSERT_FALSE(cpuinfo_isa.jscvt); +TEST(ISA, sha1) { + ASSERT_TRUE(cpuinfo_has_arm_sha1()); } -TEST(ISA, fcma) { - ASSERT_FALSE(cpuinfo_isa.fcma); +TEST(ISA, sha2) { + ASSERT_TRUE(cpuinfo_has_arm_sha2()); +} + +TEST(ISA, pmull) { + ASSERT_TRUE(cpuinfo_has_arm_pmull()); +} + +TEST(ISA, crc32) { + ASSERT_TRUE(cpuinfo_has_arm_crc32()); } -#endif /* CPUINFO_ARCH_ARM64 */ TEST(L1I, count) { cpuinfo_caches l1i = cpuinfo_get_l1i_cache(); diff --git a/test/huawei-p9-lite.cc b/test/huawei-p9-lite.cc index ee8d77a..ff2f1a9 100644 --- a/test/huawei-p9-lite.cc +++ b/test/huawei-p9-lite.cc @@ -178,121 +178,153 @@ TEST(PACKAGES, core_count) { } } -#if CPUINFO_ARCH_ARM TEST(ISA, thumb) { - ASSERT_TRUE(cpuinfo_isa.thumb); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_thumb()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_thumb()); + #endif } TEST(ISA, thumb2) { - ASSERT_TRUE(cpuinfo_isa.thumb2); -} - -TEST(ISA, thumbee) { - ASSERT_FALSE(cpuinfo_isa.thumbee); -} - -TEST(ISA, jazelle) { - ASSERT_FALSE(cpuinfo_isa.jazelle); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_thumb2()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_thumb2()); + #endif } TEST(ISA, armv5e) { - ASSERT_TRUE(cpuinfo_isa.armv5e); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v5e()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v5e()); + #endif } TEST(ISA, armv6) { - ASSERT_TRUE(cpuinfo_isa.armv6); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v6()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v6()); + #endif } TEST(ISA, armv6k) { - ASSERT_TRUE(cpuinfo_isa.armv6k); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v6k()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v6k()); + #endif } TEST(ISA, armv7) { - ASSERT_TRUE(cpuinfo_isa.armv7); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v7()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v7()); + #endif } TEST(ISA, armv7mp) { - ASSERT_TRUE(cpuinfo_isa.armv7mp); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v7mp()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v7mp()); + #endif } TEST(ISA, idiv) { - ASSERT_TRUE(cpuinfo_isa.idiv); + ASSERT_TRUE(cpuinfo_has_arm_idiv()); } TEST(ISA, vfpv2) { - ASSERT_FALSE(cpuinfo_isa.vfpv2); + ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); } TEST(ISA, vfpv3) { - ASSERT_TRUE(cpuinfo_isa.vfpv3); + ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); +} + +TEST(ISA, vfpv3_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); +} + +TEST(ISA, vfpv3_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16()); } -TEST(ISA, d32) { - ASSERT_TRUE(cpuinfo_isa.d32); +TEST(ISA, vfpv3_fp16_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32()); } -TEST(ISA, fp16) { - ASSERT_TRUE(cpuinfo_isa.fp16); +TEST(ISA, vfpv4) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4()); } -TEST(ISA, fma) { - ASSERT_TRUE(cpuinfo_isa.fma); +TEST(ISA, vfpv4_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32()); } TEST(ISA, wmmx) { - ASSERT_FALSE(cpuinfo_isa.wmmx); + ASSERT_FALSE(cpuinfo_has_arm_wmmx()); } TEST(ISA, wmmx2) { - ASSERT_FALSE(cpuinfo_isa.wmmx2); + ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); } TEST(ISA, neon) { - ASSERT_TRUE(cpuinfo_isa.neon); + ASSERT_TRUE(cpuinfo_has_arm_neon()); } -#endif /* CPUINFO_ARCH_ARM */ -TEST(ISA, aes) { - ASSERT_TRUE(cpuinfo_isa.aes); +TEST(ISA, neon_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fp16()); } -TEST(ISA, sha1) { - ASSERT_TRUE(cpuinfo_isa.sha1); +TEST(ISA, neon_fma) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fma()); } -TEST(ISA, sha2) { - ASSERT_TRUE(cpuinfo_isa.sha2); +TEST(ISA, atomics) { + ASSERT_FALSE(cpuinfo_has_arm_atomics()); } -TEST(ISA, pmull) { - ASSERT_TRUE(cpuinfo_isa.pmull); +TEST(ISA, neon_rdm) { + ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); } -TEST(ISA, crc32) { - ASSERT_TRUE(cpuinfo_isa.crc32); +TEST(ISA, fp16_arith) { + ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); } -#if CPUINFO_ARCH_ARM64 -TEST(ISA, atomics) { - ASSERT_FALSE(cpuinfo_isa.atomics); +TEST(ISA, jscvt) { + ASSERT_FALSE(cpuinfo_has_arm_jscvt()); } -TEST(ISA, rdm) { - ASSERT_FALSE(cpuinfo_isa.rdm); +TEST(ISA, fcma) { + ASSERT_FALSE(cpuinfo_has_arm_fcma()); } -TEST(ISA, fp16arith) { - ASSERT_FALSE(cpuinfo_isa.fp16arith); +TEST(ISA, aes) { + ASSERT_TRUE(cpuinfo_has_arm_aes()); } -TEST(ISA, jscvt) { - ASSERT_FALSE(cpuinfo_isa.jscvt); +TEST(ISA, sha1) { + ASSERT_TRUE(cpuinfo_has_arm_sha1()); } -TEST(ISA, fcma) { - ASSERT_FALSE(cpuinfo_isa.fcma); +TEST(ISA, sha2) { + ASSERT_TRUE(cpuinfo_has_arm_sha2()); +} + +TEST(ISA, pmull) { + ASSERT_TRUE(cpuinfo_has_arm_pmull()); +} + +TEST(ISA, crc32) { + ASSERT_TRUE(cpuinfo_has_arm_crc32()); } -#endif /* CPUINFO_ARCH_ARM64 */ TEST(L1I, count) { cpuinfo_caches l1i = cpuinfo_get_l1i_cache(); diff --git a/test/lenovo-a6600-plus.cc b/test/lenovo-a6600-plus.cc index b9100d8..3482024 100644 --- a/test/lenovo-a6600-plus.cc +++ b/test/lenovo-a6600-plus.cc @@ -153,95 +153,123 @@ TEST(PACKAGES, core_count) { } TEST(ISA, thumb) { - ASSERT_TRUE(cpuinfo_isa.thumb); + ASSERT_TRUE(cpuinfo_has_arm_thumb()); } TEST(ISA, thumb2) { - ASSERT_TRUE(cpuinfo_isa.thumb2); -} - -TEST(ISA, thumbee) { - ASSERT_FALSE(cpuinfo_isa.thumbee); -} - -TEST(ISA, jazelle) { - ASSERT_FALSE(cpuinfo_isa.jazelle); + ASSERT_TRUE(cpuinfo_has_arm_thumb2()); } TEST(ISA, armv5e) { - ASSERT_TRUE(cpuinfo_isa.armv5e); + ASSERT_TRUE(cpuinfo_has_arm_v5e()); } TEST(ISA, armv6) { - ASSERT_TRUE(cpuinfo_isa.armv6); + ASSERT_TRUE(cpuinfo_has_arm_v6()); } TEST(ISA, armv6k) { - ASSERT_TRUE(cpuinfo_isa.armv6k); + ASSERT_TRUE(cpuinfo_has_arm_v6k()); } TEST(ISA, armv7) { - ASSERT_TRUE(cpuinfo_isa.armv7); + ASSERT_TRUE(cpuinfo_has_arm_v7()); } TEST(ISA, armv7mp) { - ASSERT_TRUE(cpuinfo_isa.armv7mp); + ASSERT_TRUE(cpuinfo_has_arm_v7mp()); } TEST(ISA, idiv) { - ASSERT_TRUE(cpuinfo_isa.idiv); + ASSERT_TRUE(cpuinfo_has_arm_idiv()); } TEST(ISA, vfpv2) { - ASSERT_FALSE(cpuinfo_isa.vfpv2); + ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); } TEST(ISA, vfpv3) { - ASSERT_TRUE(cpuinfo_isa.vfpv3); + ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); +} + +TEST(ISA, vfpv3_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); } -TEST(ISA, d32) { - ASSERT_TRUE(cpuinfo_isa.d32); +TEST(ISA, vfpv3_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16()); } -TEST(ISA, fp16) { - ASSERT_TRUE(cpuinfo_isa.fp16); +TEST(ISA, vfpv3_fp16_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32()); } -TEST(ISA, fma) { - ASSERT_TRUE(cpuinfo_isa.fma); +TEST(ISA, vfpv4) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4()); +} + +TEST(ISA, vfpv4_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32()); } TEST(ISA, wmmx) { - ASSERT_FALSE(cpuinfo_isa.wmmx); + ASSERT_FALSE(cpuinfo_has_arm_wmmx()); } TEST(ISA, wmmx2) { - ASSERT_FALSE(cpuinfo_isa.wmmx2); + ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); } TEST(ISA, neon) { - ASSERT_TRUE(cpuinfo_isa.neon); + ASSERT_TRUE(cpuinfo_has_arm_neon()); +} + +TEST(ISA, neon_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fp16()); +} + +TEST(ISA, neon_fma) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fma()); +} + +TEST(ISA, atomics) { + ASSERT_FALSE(cpuinfo_has_arm_atomics()); +} + +TEST(ISA, neon_rdm) { + ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); +} + +TEST(ISA, fp16_arith) { + ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); +} + +TEST(ISA, jscvt) { + ASSERT_FALSE(cpuinfo_has_arm_jscvt()); +} + +TEST(ISA, fcma) { + ASSERT_FALSE(cpuinfo_has_arm_fcma()); } TEST(ISA, aes) { - ASSERT_FALSE(cpuinfo_isa.aes); + ASSERT_FALSE(cpuinfo_has_arm_aes()); } TEST(ISA, sha1) { - ASSERT_FALSE(cpuinfo_isa.sha1); + ASSERT_FALSE(cpuinfo_has_arm_sha1()); } TEST(ISA, sha2) { - ASSERT_TRUE(cpuinfo_isa.sha2); + ASSERT_TRUE(cpuinfo_has_arm_sha2()); } TEST(ISA, pmull) { - ASSERT_FALSE(cpuinfo_isa.pmull); + ASSERT_FALSE(cpuinfo_has_arm_pmull()); } TEST(ISA, crc32) { - ASSERT_FALSE(cpuinfo_isa.crc32); + ASSERT_FALSE(cpuinfo_has_arm_crc32()); } TEST(L1I, count) { diff --git a/test/lenovo-vibe-x2.cc b/test/lenovo-vibe-x2.cc index c0cf0aa..460e04e 100644 --- a/test/lenovo-vibe-x2.cc +++ b/test/lenovo-vibe-x2.cc @@ -205,95 +205,123 @@ TEST(PACKAGES, core_count) { } TEST(ISA, thumb) { - ASSERT_TRUE(cpuinfo_isa.thumb); + ASSERT_TRUE(cpuinfo_has_arm_thumb()); } TEST(ISA, thumb2) { - ASSERT_TRUE(cpuinfo_isa.thumb2); -} - -TEST(ISA, thumbee) { - ASSERT_TRUE(cpuinfo_isa.thumbee); -} - -TEST(ISA, jazelle) { - ASSERT_FALSE(cpuinfo_isa.jazelle); + ASSERT_TRUE(cpuinfo_has_arm_thumb2()); } TEST(ISA, armv5e) { - ASSERT_TRUE(cpuinfo_isa.armv5e); + ASSERT_TRUE(cpuinfo_has_arm_v5e()); } TEST(ISA, armv6) { - ASSERT_TRUE(cpuinfo_isa.armv6); + ASSERT_TRUE(cpuinfo_has_arm_v6()); } TEST(ISA, armv6k) { - ASSERT_TRUE(cpuinfo_isa.armv6k); + ASSERT_TRUE(cpuinfo_has_arm_v6k()); } TEST(ISA, armv7) { - ASSERT_TRUE(cpuinfo_isa.armv7); + ASSERT_TRUE(cpuinfo_has_arm_v7()); } TEST(ISA, armv7mp) { - ASSERT_TRUE(cpuinfo_isa.armv7mp); + ASSERT_TRUE(cpuinfo_has_arm_v7mp()); } TEST(ISA, idiv) { - ASSERT_TRUE(cpuinfo_isa.idiv); + ASSERT_TRUE(cpuinfo_has_arm_idiv()); } TEST(ISA, vfpv2) { - ASSERT_FALSE(cpuinfo_isa.vfpv2); + ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); } TEST(ISA, vfpv3) { - ASSERT_TRUE(cpuinfo_isa.vfpv3); + ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); +} + +TEST(ISA, vfpv3_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); } -TEST(ISA, d32) { - ASSERT_TRUE(cpuinfo_isa.d32); +TEST(ISA, vfpv3_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16()); } -TEST(ISA, fp16) { - ASSERT_TRUE(cpuinfo_isa.fp16); +TEST(ISA, vfpv3_fp16_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32()); } -TEST(ISA, fma) { - ASSERT_TRUE(cpuinfo_isa.fma); +TEST(ISA, vfpv4) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4()); +} + +TEST(ISA, vfpv4_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32()); } TEST(ISA, wmmx) { - ASSERT_FALSE(cpuinfo_isa.wmmx); + ASSERT_FALSE(cpuinfo_has_arm_wmmx()); } TEST(ISA, wmmx2) { - ASSERT_FALSE(cpuinfo_isa.wmmx2); + ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); } TEST(ISA, neon) { - ASSERT_TRUE(cpuinfo_isa.neon); + ASSERT_TRUE(cpuinfo_has_arm_neon()); +} + +TEST(ISA, neon_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fp16()); +} + +TEST(ISA, neon_fma) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fma()); +} + +TEST(ISA, atomics) { + ASSERT_FALSE(cpuinfo_has_arm_atomics()); +} + +TEST(ISA, neon_rdm) { + ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); +} + +TEST(ISA, fp16_arith) { + ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); +} + +TEST(ISA, jscvt) { + ASSERT_FALSE(cpuinfo_has_arm_jscvt()); +} + +TEST(ISA, fcma) { + ASSERT_FALSE(cpuinfo_has_arm_fcma()); } TEST(ISA, aes) { - ASSERT_FALSE(cpuinfo_isa.aes); + ASSERT_FALSE(cpuinfo_has_arm_aes()); } TEST(ISA, sha1) { - ASSERT_FALSE(cpuinfo_isa.sha1); + ASSERT_FALSE(cpuinfo_has_arm_sha1()); } TEST(ISA, sha2) { - ASSERT_FALSE(cpuinfo_isa.sha2); + ASSERT_FALSE(cpuinfo_has_arm_sha2()); } TEST(ISA, pmull) { - ASSERT_FALSE(cpuinfo_isa.pmull); + ASSERT_FALSE(cpuinfo_has_arm_pmull()); } TEST(ISA, crc32) { - ASSERT_FALSE(cpuinfo_isa.crc32); + ASSERT_FALSE(cpuinfo_has_arm_crc32()); } TEST(L1I, count) { diff --git a/test/lg-k10-eu.cc b/test/lg-k10-eu.cc index 05715ee..b21377d 100644 --- a/test/lg-k10-eu.cc +++ b/test/lg-k10-eu.cc @@ -153,95 +153,123 @@ TEST(PACKAGES, core_count) { } TEST(ISA, thumb) { - ASSERT_TRUE(cpuinfo_isa.thumb); + ASSERT_TRUE(cpuinfo_has_arm_thumb()); } TEST(ISA, thumb2) { - ASSERT_TRUE(cpuinfo_isa.thumb2); -} - -TEST(ISA, thumbee) { - ASSERT_FALSE(cpuinfo_isa.thumbee); -} - -TEST(ISA, jazelle) { - ASSERT_FALSE(cpuinfo_isa.jazelle); + ASSERT_TRUE(cpuinfo_has_arm_thumb2()); } TEST(ISA, armv5e) { - ASSERT_TRUE(cpuinfo_isa.armv5e); + ASSERT_TRUE(cpuinfo_has_arm_v5e()); } TEST(ISA, armv6) { - ASSERT_TRUE(cpuinfo_isa.armv6); + ASSERT_TRUE(cpuinfo_has_arm_v6()); } TEST(ISA, armv6k) { - ASSERT_TRUE(cpuinfo_isa.armv6k); + ASSERT_TRUE(cpuinfo_has_arm_v6k()); } TEST(ISA, armv7) { - ASSERT_TRUE(cpuinfo_isa.armv7); + ASSERT_TRUE(cpuinfo_has_arm_v7()); } TEST(ISA, armv7mp) { - ASSERT_TRUE(cpuinfo_isa.armv7mp); + ASSERT_TRUE(cpuinfo_has_arm_v7mp()); } TEST(ISA, idiv) { - ASSERT_TRUE(cpuinfo_isa.idiv); + ASSERT_TRUE(cpuinfo_has_arm_idiv()); } TEST(ISA, vfpv2) { - ASSERT_FALSE(cpuinfo_isa.vfpv2); + ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); } TEST(ISA, vfpv3) { - ASSERT_TRUE(cpuinfo_isa.vfpv3); + ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); +} + +TEST(ISA, vfpv3_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); } -TEST(ISA, d32) { - ASSERT_TRUE(cpuinfo_isa.d32); +TEST(ISA, vfpv3_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16()); } -TEST(ISA, fp16) { - ASSERT_TRUE(cpuinfo_isa.fp16); +TEST(ISA, vfpv3_fp16_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32()); } -TEST(ISA, fma) { - ASSERT_TRUE(cpuinfo_isa.fma); +TEST(ISA, vfpv4) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4()); +} + +TEST(ISA, vfpv4_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32()); } TEST(ISA, wmmx) { - ASSERT_FALSE(cpuinfo_isa.wmmx); + ASSERT_FALSE(cpuinfo_has_arm_wmmx()); } TEST(ISA, wmmx2) { - ASSERT_FALSE(cpuinfo_isa.wmmx2); + ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); } TEST(ISA, neon) { - ASSERT_TRUE(cpuinfo_isa.neon); + ASSERT_TRUE(cpuinfo_has_arm_neon()); +} + +TEST(ISA, neon_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fp16()); +} + +TEST(ISA, neon_fma) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fma()); +} + +TEST(ISA, atomics) { + ASSERT_FALSE(cpuinfo_has_arm_atomics()); +} + +TEST(ISA, neon_rdm) { + ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); +} + +TEST(ISA, fp16_arith) { + ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); +} + +TEST(ISA, jscvt) { + ASSERT_FALSE(cpuinfo_has_arm_jscvt()); +} + +TEST(ISA, fcma) { + ASSERT_FALSE(cpuinfo_has_arm_fcma()); } TEST(ISA, aes) { - ASSERT_FALSE(cpuinfo_isa.aes); + ASSERT_FALSE(cpuinfo_has_arm_aes()); } TEST(ISA, sha1) { - ASSERT_FALSE(cpuinfo_isa.sha1); + ASSERT_FALSE(cpuinfo_has_arm_sha1()); } TEST(ISA, sha2) { - ASSERT_FALSE(cpuinfo_isa.sha2); + ASSERT_FALSE(cpuinfo_has_arm_sha2()); } TEST(ISA, pmull) { - ASSERT_FALSE(cpuinfo_isa.pmull); + ASSERT_FALSE(cpuinfo_has_arm_pmull()); } TEST(ISA, crc32) { - ASSERT_FALSE(cpuinfo_isa.crc32); + ASSERT_FALSE(cpuinfo_has_arm_crc32()); } TEST(L1I, count) { diff --git a/test/meizu-pro-6s.cc b/test/meizu-pro-6s.cc index 76b6a4a..68a0708 100644 --- a/test/meizu-pro-6s.cc +++ b/test/meizu-pro-6s.cc @@ -216,121 +216,153 @@ TEST(PACKAGES, core_count) { } } -#if CPUINFO_ARCH_ARM TEST(ISA, thumb) { - ASSERT_TRUE(cpuinfo_isa.thumb); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_thumb()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_thumb()); + #endif } TEST(ISA, thumb2) { - ASSERT_TRUE(cpuinfo_isa.thumb2); -} - -TEST(ISA, thumbee) { - ASSERT_FALSE(cpuinfo_isa.thumbee); -} - -TEST(ISA, jazelle) { - ASSERT_FALSE(cpuinfo_isa.jazelle); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_thumb2()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_thumb2()); + #endif } TEST(ISA, armv5e) { - ASSERT_TRUE(cpuinfo_isa.armv5e); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v5e()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v5e()); + #endif } TEST(ISA, armv6) { - ASSERT_TRUE(cpuinfo_isa.armv6); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v6()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v6()); + #endif } TEST(ISA, armv6k) { - ASSERT_TRUE(cpuinfo_isa.armv6k); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v6k()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v6k()); + #endif } TEST(ISA, armv7) { - ASSERT_TRUE(cpuinfo_isa.armv7); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v7()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v7()); + #endif } TEST(ISA, armv7mp) { - ASSERT_TRUE(cpuinfo_isa.armv7mp); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v7mp()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v7mp()); + #endif } TEST(ISA, idiv) { - ASSERT_TRUE(cpuinfo_isa.idiv); + ASSERT_TRUE(cpuinfo_has_arm_idiv()); } TEST(ISA, vfpv2) { - ASSERT_FALSE(cpuinfo_isa.vfpv2); + ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); } TEST(ISA, vfpv3) { - ASSERT_TRUE(cpuinfo_isa.vfpv3); + ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); +} + +TEST(ISA, vfpv3_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); +} + +TEST(ISA, vfpv3_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16()); } -TEST(ISA, d32) { - ASSERT_TRUE(cpuinfo_isa.d32); +TEST(ISA, vfpv3_fp16_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32()); } -TEST(ISA, fp16) { - ASSERT_TRUE(cpuinfo_isa.fp16); +TEST(ISA, vfpv4) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4()); } -TEST(ISA, fma) { - ASSERT_TRUE(cpuinfo_isa.fma); +TEST(ISA, vfpv4_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32()); } TEST(ISA, wmmx) { - ASSERT_FALSE(cpuinfo_isa.wmmx); + ASSERT_FALSE(cpuinfo_has_arm_wmmx()); } TEST(ISA, wmmx2) { - ASSERT_FALSE(cpuinfo_isa.wmmx2); + ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); } TEST(ISA, neon) { - ASSERT_TRUE(cpuinfo_isa.neon); + ASSERT_TRUE(cpuinfo_has_arm_neon()); } -#endif /* CPUINFO_ARCH_ARM */ -TEST(ISA, aes) { - ASSERT_TRUE(cpuinfo_isa.aes); +TEST(ISA, neon_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fp16()); } -TEST(ISA, sha1) { - ASSERT_TRUE(cpuinfo_isa.sha1); +TEST(ISA, neon_fma) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fma()); } -TEST(ISA, sha2) { - ASSERT_TRUE(cpuinfo_isa.sha2); +TEST(ISA, atomics) { + ASSERT_FALSE(cpuinfo_has_arm_atomics()); } -TEST(ISA, pmull) { - ASSERT_TRUE(cpuinfo_isa.pmull); +TEST(ISA, neon_rdm) { + ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); } -TEST(ISA, crc32) { - ASSERT_TRUE(cpuinfo_isa.crc32); +TEST(ISA, fp16_arith) { + ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); } -#if CPUINFO_ARCH_ARM64 -TEST(ISA, atomics) { - ASSERT_FALSE(cpuinfo_isa.atomics); +TEST(ISA, jscvt) { + ASSERT_FALSE(cpuinfo_has_arm_jscvt()); } -TEST(ISA, rdm) { - ASSERT_FALSE(cpuinfo_isa.rdm); +TEST(ISA, fcma) { + ASSERT_FALSE(cpuinfo_has_arm_fcma()); } -TEST(ISA, fp16arith) { - ASSERT_FALSE(cpuinfo_isa.fp16arith); +TEST(ISA, aes) { + ASSERT_TRUE(cpuinfo_has_arm_aes()); } -TEST(ISA, jscvt) { - ASSERT_FALSE(cpuinfo_isa.jscvt); +TEST(ISA, sha1) { + ASSERT_TRUE(cpuinfo_has_arm_sha1()); } -TEST(ISA, fcma) { - ASSERT_FALSE(cpuinfo_isa.fcma); +TEST(ISA, sha2) { + ASSERT_TRUE(cpuinfo_has_arm_sha2()); +} + +TEST(ISA, pmull) { + ASSERT_TRUE(cpuinfo_has_arm_pmull()); +} + +TEST(ISA, crc32) { + ASSERT_TRUE(cpuinfo_has_arm_crc32()); } -#endif /* CPUINFO_ARCH_ARM64 */ TEST(L1I, count) { cpuinfo_caches l1i = cpuinfo_get_l1i_cache(); diff --git a/test/moto-e-gen1.cc b/test/moto-e-gen1.cc index 1b82262..c1c94e5 100644 --- a/test/moto-e-gen1.cc +++ b/test/moto-e-gen1.cc @@ -153,95 +153,123 @@ TEST(PACKAGES, core_count) { } TEST(ISA, thumb) { - ASSERT_TRUE(cpuinfo_isa.thumb); + ASSERT_TRUE(cpuinfo_has_arm_thumb()); } TEST(ISA, thumb2) { - ASSERT_TRUE(cpuinfo_isa.thumb2); -} - -TEST(ISA, thumbee) { - ASSERT_FALSE(cpuinfo_isa.thumbee); -} - -TEST(ISA, jazelle) { - ASSERT_FALSE(cpuinfo_isa.jazelle); + ASSERT_TRUE(cpuinfo_has_arm_thumb2()); } TEST(ISA, armv5e) { - ASSERT_TRUE(cpuinfo_isa.armv5e); + ASSERT_TRUE(cpuinfo_has_arm_v5e()); } TEST(ISA, armv6) { - ASSERT_TRUE(cpuinfo_isa.armv6); + ASSERT_TRUE(cpuinfo_has_arm_v6()); } TEST(ISA, armv6k) { - ASSERT_TRUE(cpuinfo_isa.armv6k); + ASSERT_TRUE(cpuinfo_has_arm_v6k()); } TEST(ISA, armv7) { - ASSERT_TRUE(cpuinfo_isa.armv7); + ASSERT_TRUE(cpuinfo_has_arm_v7()); } TEST(ISA, armv7mp) { - ASSERT_TRUE(cpuinfo_isa.armv7mp); + ASSERT_TRUE(cpuinfo_has_arm_v7mp()); } TEST(ISA, idiv) { - ASSERT_TRUE(cpuinfo_isa.idiv); + ASSERT_TRUE(cpuinfo_has_arm_idiv()); } TEST(ISA, vfpv2) { - ASSERT_FALSE(cpuinfo_isa.vfpv2); + ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); } TEST(ISA, vfpv3) { - ASSERT_TRUE(cpuinfo_isa.vfpv3); + ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); +} + +TEST(ISA, vfpv3_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); } -TEST(ISA, d32) { - ASSERT_TRUE(cpuinfo_isa.d32); +TEST(ISA, vfpv3_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16()); } -TEST(ISA, fp16) { - ASSERT_TRUE(cpuinfo_isa.fp16); +TEST(ISA, vfpv3_fp16_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32()); } -TEST(ISA, fma) { - ASSERT_TRUE(cpuinfo_isa.fma); +TEST(ISA, vfpv4) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4()); +} + +TEST(ISA, vfpv4_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32()); } TEST(ISA, wmmx) { - ASSERT_FALSE(cpuinfo_isa.wmmx); + ASSERT_FALSE(cpuinfo_has_arm_wmmx()); } TEST(ISA, wmmx2) { - ASSERT_FALSE(cpuinfo_isa.wmmx2); + ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); } TEST(ISA, neon) { - ASSERT_TRUE(cpuinfo_isa.neon); + ASSERT_TRUE(cpuinfo_has_arm_neon()); +} + +TEST(ISA, neon_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fp16()); +} + +TEST(ISA, neon_fma) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fma()); +} + +TEST(ISA, atomics) { + ASSERT_FALSE(cpuinfo_has_arm_atomics()); +} + +TEST(ISA, neon_rdm) { + ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); +} + +TEST(ISA, fp16_arith) { + ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); +} + +TEST(ISA, jscvt) { + ASSERT_FALSE(cpuinfo_has_arm_jscvt()); +} + +TEST(ISA, fcma) { + ASSERT_FALSE(cpuinfo_has_arm_fcma()); } TEST(ISA, aes) { - ASSERT_FALSE(cpuinfo_isa.aes); + ASSERT_FALSE(cpuinfo_has_arm_aes()); } TEST(ISA, sha1) { - ASSERT_FALSE(cpuinfo_isa.sha1); + ASSERT_FALSE(cpuinfo_has_arm_sha1()); } TEST(ISA, sha2) { - ASSERT_FALSE(cpuinfo_isa.sha2); + ASSERT_FALSE(cpuinfo_has_arm_sha2()); } TEST(ISA, pmull) { - ASSERT_FALSE(cpuinfo_isa.pmull); + ASSERT_FALSE(cpuinfo_has_arm_pmull()); } TEST(ISA, crc32) { - ASSERT_FALSE(cpuinfo_isa.crc32); + ASSERT_FALSE(cpuinfo_has_arm_crc32()); } TEST(L1I, count) { diff --git a/test/moto-g-gen2.cc b/test/moto-g-gen2.cc index f916752..d5b1c86 100644 --- a/test/moto-g-gen2.cc +++ b/test/moto-g-gen2.cc @@ -153,95 +153,123 @@ TEST(PACKAGES, core_count) { } TEST(ISA, thumb) { - ASSERT_TRUE(cpuinfo_isa.thumb); + ASSERT_TRUE(cpuinfo_has_arm_thumb()); } TEST(ISA, thumb2) { - ASSERT_TRUE(cpuinfo_isa.thumb2); -} - -TEST(ISA, thumbee) { - ASSERT_FALSE(cpuinfo_isa.thumbee); -} - -TEST(ISA, jazelle) { - ASSERT_FALSE(cpuinfo_isa.jazelle); + ASSERT_TRUE(cpuinfo_has_arm_thumb2()); } TEST(ISA, armv5e) { - ASSERT_TRUE(cpuinfo_isa.armv5e); + ASSERT_TRUE(cpuinfo_has_arm_v5e()); } TEST(ISA, armv6) { - ASSERT_TRUE(cpuinfo_isa.armv6); + ASSERT_TRUE(cpuinfo_has_arm_v6()); } TEST(ISA, armv6k) { - ASSERT_TRUE(cpuinfo_isa.armv6k); + ASSERT_TRUE(cpuinfo_has_arm_v6k()); } TEST(ISA, armv7) { - ASSERT_TRUE(cpuinfo_isa.armv7); + ASSERT_TRUE(cpuinfo_has_arm_v7()); } TEST(ISA, armv7mp) { - ASSERT_TRUE(cpuinfo_isa.armv7mp); + ASSERT_TRUE(cpuinfo_has_arm_v7mp()); } TEST(ISA, idiv) { - ASSERT_TRUE(cpuinfo_isa.idiv); + ASSERT_TRUE(cpuinfo_has_arm_idiv()); } TEST(ISA, vfpv2) { - ASSERT_FALSE(cpuinfo_isa.vfpv2); + ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); } TEST(ISA, vfpv3) { - ASSERT_TRUE(cpuinfo_isa.vfpv3); + ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); +} + +TEST(ISA, vfpv3_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); } -TEST(ISA, d32) { - ASSERT_TRUE(cpuinfo_isa.d32); +TEST(ISA, vfpv3_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16()); } -TEST(ISA, fp16) { - ASSERT_TRUE(cpuinfo_isa.fp16); +TEST(ISA, vfpv3_fp16_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32()); } -TEST(ISA, fma) { - ASSERT_TRUE(cpuinfo_isa.fma); +TEST(ISA, vfpv4) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4()); +} + +TEST(ISA, vfpv4_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32()); } TEST(ISA, wmmx) { - ASSERT_FALSE(cpuinfo_isa.wmmx); + ASSERT_FALSE(cpuinfo_has_arm_wmmx()); } TEST(ISA, wmmx2) { - ASSERT_FALSE(cpuinfo_isa.wmmx2); + ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); } TEST(ISA, neon) { - ASSERT_TRUE(cpuinfo_isa.neon); + ASSERT_TRUE(cpuinfo_has_arm_neon()); +} + +TEST(ISA, neon_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fp16()); +} + +TEST(ISA, neon_fma) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fma()); +} + +TEST(ISA, atomics) { + ASSERT_FALSE(cpuinfo_has_arm_atomics()); +} + +TEST(ISA, neon_rdm) { + ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); +} + +TEST(ISA, fp16_arith) { + ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); +} + +TEST(ISA, jscvt) { + ASSERT_FALSE(cpuinfo_has_arm_jscvt()); +} + +TEST(ISA, fcma) { + ASSERT_FALSE(cpuinfo_has_arm_fcma()); } TEST(ISA, aes) { - ASSERT_FALSE(cpuinfo_isa.aes); + ASSERT_FALSE(cpuinfo_has_arm_aes()); } TEST(ISA, sha1) { - ASSERT_FALSE(cpuinfo_isa.sha1); + ASSERT_FALSE(cpuinfo_has_arm_sha1()); } TEST(ISA, sha2) { - ASSERT_FALSE(cpuinfo_isa.sha2); + ASSERT_FALSE(cpuinfo_has_arm_sha2()); } TEST(ISA, pmull) { - ASSERT_FALSE(cpuinfo_isa.pmull); + ASSERT_FALSE(cpuinfo_has_arm_pmull()); } TEST(ISA, crc32) { - ASSERT_FALSE(cpuinfo_isa.crc32); + ASSERT_FALSE(cpuinfo_has_arm_crc32()); } TEST(L1I, count) { diff --git a/test/moto-g-gen3.cc b/test/moto-g-gen3.cc index 9153a66..e1265d2 100644 --- a/test/moto-g-gen3.cc +++ b/test/moto-g-gen3.cc @@ -153,95 +153,123 @@ TEST(PACKAGES, core_count) { } TEST(ISA, thumb) { - ASSERT_TRUE(cpuinfo_isa.thumb); + ASSERT_TRUE(cpuinfo_has_arm_thumb()); } TEST(ISA, thumb2) { - ASSERT_TRUE(cpuinfo_isa.thumb2); -} - -TEST(ISA, thumbee) { - ASSERT_FALSE(cpuinfo_isa.thumbee); -} - -TEST(ISA, jazelle) { - ASSERT_FALSE(cpuinfo_isa.jazelle); + ASSERT_TRUE(cpuinfo_has_arm_thumb2()); } TEST(ISA, armv5e) { - ASSERT_TRUE(cpuinfo_isa.armv5e); + ASSERT_TRUE(cpuinfo_has_arm_v5e()); } TEST(ISA, armv6) { - ASSERT_TRUE(cpuinfo_isa.armv6); + ASSERT_TRUE(cpuinfo_has_arm_v6()); } TEST(ISA, armv6k) { - ASSERT_TRUE(cpuinfo_isa.armv6k); + ASSERT_TRUE(cpuinfo_has_arm_v6k()); } TEST(ISA, armv7) { - ASSERT_TRUE(cpuinfo_isa.armv7); + ASSERT_TRUE(cpuinfo_has_arm_v7()); } TEST(ISA, armv7mp) { - ASSERT_TRUE(cpuinfo_isa.armv7mp); + ASSERT_TRUE(cpuinfo_has_arm_v7mp()); } TEST(ISA, idiv) { - ASSERT_TRUE(cpuinfo_isa.idiv); + ASSERT_TRUE(cpuinfo_has_arm_idiv()); } TEST(ISA, vfpv2) { - ASSERT_FALSE(cpuinfo_isa.vfpv2); + ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); } TEST(ISA, vfpv3) { - ASSERT_TRUE(cpuinfo_isa.vfpv3); + ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); +} + +TEST(ISA, vfpv3_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); } -TEST(ISA, d32) { - ASSERT_TRUE(cpuinfo_isa.d32); +TEST(ISA, vfpv3_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16()); } -TEST(ISA, fp16) { - ASSERT_TRUE(cpuinfo_isa.fp16); +TEST(ISA, vfpv3_fp16_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32()); } -TEST(ISA, fma) { - ASSERT_TRUE(cpuinfo_isa.fma); +TEST(ISA, vfpv4) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4()); +} + +TEST(ISA, vfpv4_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32()); } TEST(ISA, wmmx) { - ASSERT_FALSE(cpuinfo_isa.wmmx); + ASSERT_FALSE(cpuinfo_has_arm_wmmx()); } TEST(ISA, wmmx2) { - ASSERT_FALSE(cpuinfo_isa.wmmx2); + ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); } TEST(ISA, neon) { - ASSERT_TRUE(cpuinfo_isa.neon); + ASSERT_TRUE(cpuinfo_has_arm_neon()); +} + +TEST(ISA, neon_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fp16()); +} + +TEST(ISA, neon_fma) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fma()); +} + +TEST(ISA, atomics) { + ASSERT_FALSE(cpuinfo_has_arm_atomics()); +} + +TEST(ISA, neon_rdm) { + ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); +} + +TEST(ISA, fp16_arith) { + ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); +} + +TEST(ISA, jscvt) { + ASSERT_FALSE(cpuinfo_has_arm_jscvt()); +} + +TEST(ISA, fcma) { + ASSERT_FALSE(cpuinfo_has_arm_fcma()); } TEST(ISA, aes) { - ASSERT_FALSE(cpuinfo_isa.aes); + ASSERT_FALSE(cpuinfo_has_arm_aes()); } TEST(ISA, sha1) { - ASSERT_FALSE(cpuinfo_isa.sha1); + ASSERT_FALSE(cpuinfo_has_arm_sha1()); } TEST(ISA, sha2) { - ASSERT_FALSE(cpuinfo_isa.sha2); + ASSERT_FALSE(cpuinfo_has_arm_sha2()); } TEST(ISA, pmull) { - ASSERT_FALSE(cpuinfo_isa.pmull); + ASSERT_FALSE(cpuinfo_has_arm_pmull()); } TEST(ISA, crc32) { - ASSERT_FALSE(cpuinfo_isa.crc32); + ASSERT_FALSE(cpuinfo_has_arm_crc32()); } TEST(L1I, count) { diff --git a/test/nexus-s.cc b/test/nexus-s.cc index deb5f35..edfa77c 100644 --- a/test/nexus-s.cc +++ b/test/nexus-s.cc @@ -153,95 +153,123 @@ TEST(PACKAGES, core_count) { } TEST(ISA, thumb) { - ASSERT_TRUE(cpuinfo_isa.thumb); + ASSERT_TRUE(cpuinfo_has_arm_thumb()); } TEST(ISA, thumb2) { - ASSERT_TRUE(cpuinfo_isa.thumb2); -} - -TEST(ISA, thumbee) { - ASSERT_TRUE(cpuinfo_isa.thumbee); -} - -TEST(ISA, jazelle) { - ASSERT_FALSE(cpuinfo_isa.jazelle); + ASSERT_TRUE(cpuinfo_has_arm_thumb2()); } TEST(ISA, armv5e) { - ASSERT_TRUE(cpuinfo_isa.armv5e); + ASSERT_TRUE(cpuinfo_has_arm_v5e()); } TEST(ISA, armv6) { - ASSERT_TRUE(cpuinfo_isa.armv6); + ASSERT_TRUE(cpuinfo_has_arm_v6()); } TEST(ISA, armv6k) { - ASSERT_TRUE(cpuinfo_isa.armv6k); + ASSERT_TRUE(cpuinfo_has_arm_v6k()); } TEST(ISA, armv7) { - ASSERT_TRUE(cpuinfo_isa.armv7); + ASSERT_TRUE(cpuinfo_has_arm_v7()); } TEST(ISA, armv7mp) { - ASSERT_FALSE(cpuinfo_isa.armv7mp); + ASSERT_FALSE(cpuinfo_has_arm_v7mp()); } TEST(ISA, idiv) { - ASSERT_FALSE(cpuinfo_isa.idiv); + ASSERT_FALSE(cpuinfo_has_arm_idiv()); } TEST(ISA, vfpv2) { - ASSERT_FALSE(cpuinfo_isa.vfpv2); + ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); } TEST(ISA, vfpv3) { - ASSERT_TRUE(cpuinfo_isa.vfpv3); + ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); +} + +TEST(ISA, vfpv3_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); } -TEST(ISA, d32) { - ASSERT_TRUE(cpuinfo_isa.d32); +TEST(ISA, vfpv3_fp16) { + ASSERT_FALSE(cpuinfo_has_arm_vfpv3_fp16()); } -TEST(ISA, fp16) { - ASSERT_FALSE(cpuinfo_isa.fp16); +TEST(ISA, vfpv3_fp16_d32) { + ASSERT_FALSE(cpuinfo_has_arm_vfpv3_fp16_d32()); } -TEST(ISA, fma) { - ASSERT_FALSE(cpuinfo_isa.fma); +TEST(ISA, vfpv4) { + ASSERT_FALSE(cpuinfo_has_arm_vfpv4()); +} + +TEST(ISA, vfpv4_d32) { + ASSERT_FALSE(cpuinfo_has_arm_vfpv4_d32()); } TEST(ISA, wmmx) { - ASSERT_FALSE(cpuinfo_isa.wmmx); + ASSERT_FALSE(cpuinfo_has_arm_wmmx()); } TEST(ISA, wmmx2) { - ASSERT_FALSE(cpuinfo_isa.wmmx2); + ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); } TEST(ISA, neon) { - ASSERT_TRUE(cpuinfo_isa.neon); + ASSERT_TRUE(cpuinfo_has_arm_neon()); +} + +TEST(ISA, neon_fp16) { + ASSERT_FALSE(cpuinfo_has_arm_neon_fp16()); +} + +TEST(ISA, neon_fma) { + ASSERT_FALSE(cpuinfo_has_arm_neon_fma()); +} + +TEST(ISA, atomics) { + ASSERT_FALSE(cpuinfo_has_arm_atomics()); +} + +TEST(ISA, neon_rdm) { + ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); +} + +TEST(ISA, fp16_arith) { + ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); +} + +TEST(ISA, jscvt) { + ASSERT_FALSE(cpuinfo_has_arm_jscvt()); +} + +TEST(ISA, fcma) { + ASSERT_FALSE(cpuinfo_has_arm_fcma()); } TEST(ISA, aes) { - ASSERT_FALSE(cpuinfo_isa.aes); + ASSERT_FALSE(cpuinfo_has_arm_aes()); } TEST(ISA, sha1) { - ASSERT_FALSE(cpuinfo_isa.sha1); + ASSERT_FALSE(cpuinfo_has_arm_sha1()); } TEST(ISA, sha2) { - ASSERT_FALSE(cpuinfo_isa.sha2); + ASSERT_FALSE(cpuinfo_has_arm_sha2()); } TEST(ISA, pmull) { - ASSERT_FALSE(cpuinfo_isa.pmull); + ASSERT_FALSE(cpuinfo_has_arm_pmull()); } TEST(ISA, crc32) { - ASSERT_FALSE(cpuinfo_isa.crc32); + ASSERT_FALSE(cpuinfo_has_arm_crc32()); } TEST(L1I, count) { diff --git a/test/nexus4.cc b/test/nexus4.cc index 47c42c1..755a29d 100644 --- a/test/nexus4.cc +++ b/test/nexus4.cc @@ -153,95 +153,123 @@ TEST(PACKAGES, core_count) { } TEST(ISA, thumb) { - ASSERT_TRUE(cpuinfo_isa.thumb); + ASSERT_TRUE(cpuinfo_has_arm_thumb()); } TEST(ISA, thumb2) { - ASSERT_TRUE(cpuinfo_isa.thumb2); -} - -TEST(ISA, thumbee) { - ASSERT_FALSE(cpuinfo_isa.thumbee); -} - -TEST(ISA, jazelle) { - ASSERT_FALSE(cpuinfo_isa.jazelle); + ASSERT_TRUE(cpuinfo_has_arm_thumb2()); } TEST(ISA, armv5e) { - ASSERT_TRUE(cpuinfo_isa.armv5e); + ASSERT_TRUE(cpuinfo_has_arm_v5e()); } TEST(ISA, armv6) { - ASSERT_TRUE(cpuinfo_isa.armv6); + ASSERT_TRUE(cpuinfo_has_arm_v6()); } TEST(ISA, armv6k) { - ASSERT_TRUE(cpuinfo_isa.armv6k); + ASSERT_TRUE(cpuinfo_has_arm_v6k()); } TEST(ISA, armv7) { - ASSERT_TRUE(cpuinfo_isa.armv7); + ASSERT_TRUE(cpuinfo_has_arm_v7()); } TEST(ISA, armv7mp) { - ASSERT_TRUE(cpuinfo_isa.armv7mp); + ASSERT_TRUE(cpuinfo_has_arm_v7mp()); } TEST(ISA, idiv) { - ASSERT_TRUE(cpuinfo_isa.idiv); + ASSERT_TRUE(cpuinfo_has_arm_idiv()); } TEST(ISA, vfpv2) { - ASSERT_FALSE(cpuinfo_isa.vfpv2); + ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); } TEST(ISA, vfpv3) { - ASSERT_TRUE(cpuinfo_isa.vfpv3); + ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); +} + +TEST(ISA, vfpv3_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); } -TEST(ISA, d32) { - ASSERT_TRUE(cpuinfo_isa.d32); +TEST(ISA, vfpv3_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16()); } -TEST(ISA, fp16) { - ASSERT_TRUE(cpuinfo_isa.fp16); +TEST(ISA, vfpv3_fp16_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32()); } -TEST(ISA, fma) { - ASSERT_TRUE(cpuinfo_isa.fma); +TEST(ISA, vfpv4) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4()); +} + +TEST(ISA, vfpv4_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32()); } TEST(ISA, wmmx) { - ASSERT_FALSE(cpuinfo_isa.wmmx); + ASSERT_FALSE(cpuinfo_has_arm_wmmx()); } TEST(ISA, wmmx2) { - ASSERT_FALSE(cpuinfo_isa.wmmx2); + ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); } TEST(ISA, neon) { - ASSERT_TRUE(cpuinfo_isa.neon); + ASSERT_TRUE(cpuinfo_has_arm_neon()); +} + +TEST(ISA, neon_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fp16()); +} + +TEST(ISA, neon_fma) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fma()); +} + +TEST(ISA, atomics) { + ASSERT_FALSE(cpuinfo_has_arm_atomics()); +} + +TEST(ISA, neon_rdm) { + ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); +} + +TEST(ISA, fp16_arith) { + ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); +} + +TEST(ISA, jscvt) { + ASSERT_FALSE(cpuinfo_has_arm_jscvt()); +} + +TEST(ISA, fcma) { + ASSERT_FALSE(cpuinfo_has_arm_fcma()); } TEST(ISA, aes) { - ASSERT_FALSE(cpuinfo_isa.aes); + ASSERT_FALSE(cpuinfo_has_arm_aes()); } TEST(ISA, sha1) { - ASSERT_FALSE(cpuinfo_isa.sha1); + ASSERT_FALSE(cpuinfo_has_arm_sha1()); } TEST(ISA, sha2) { - ASSERT_FALSE(cpuinfo_isa.sha2); + ASSERT_FALSE(cpuinfo_has_arm_sha2()); } TEST(ISA, pmull) { - ASSERT_FALSE(cpuinfo_isa.pmull); + ASSERT_FALSE(cpuinfo_has_arm_pmull()); } TEST(ISA, crc32) { - ASSERT_FALSE(cpuinfo_isa.crc32); + ASSERT_FALSE(cpuinfo_has_arm_crc32()); } TEST(L1I, count) { diff --git a/test/nexus5x.cc b/test/nexus5x.cc index 6d6d953..7082949 100644 --- a/test/nexus5x.cc +++ b/test/nexus5x.cc @@ -196,121 +196,153 @@ TEST(PACKAGES, core_count) { } } -#if CPUINFO_ARCH_ARM TEST(ISA, thumb) { - ASSERT_TRUE(cpuinfo_isa.thumb); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_thumb()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_thumb()); + #endif } TEST(ISA, thumb2) { - ASSERT_TRUE(cpuinfo_isa.thumb2); -} - -TEST(ISA, thumbee) { - ASSERT_FALSE(cpuinfo_isa.thumbee); -} - -TEST(ISA, jazelle) { - ASSERT_FALSE(cpuinfo_isa.jazelle); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_thumb2()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_thumb2()); + #endif } TEST(ISA, armv5e) { - ASSERT_TRUE(cpuinfo_isa.armv5e); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v5e()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v5e()); + #endif } TEST(ISA, armv6) { - ASSERT_TRUE(cpuinfo_isa.armv6); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v6()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v6()); + #endif } TEST(ISA, armv6k) { - ASSERT_TRUE(cpuinfo_isa.armv6k); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v6k()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v6k()); + #endif } TEST(ISA, armv7) { - ASSERT_TRUE(cpuinfo_isa.armv7); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v7()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v7()); + #endif } TEST(ISA, armv7mp) { - ASSERT_TRUE(cpuinfo_isa.armv7mp); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v7mp()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v7mp()); + #endif } TEST(ISA, idiv) { - ASSERT_TRUE(cpuinfo_isa.idiv); + ASSERT_TRUE(cpuinfo_has_arm_idiv()); } TEST(ISA, vfpv2) { - ASSERT_FALSE(cpuinfo_isa.vfpv2); + ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); } TEST(ISA, vfpv3) { - ASSERT_TRUE(cpuinfo_isa.vfpv3); + ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); +} + +TEST(ISA, vfpv3_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); +} + +TEST(ISA, vfpv3_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16()); } -TEST(ISA, d32) { - ASSERT_TRUE(cpuinfo_isa.d32); +TEST(ISA, vfpv3_fp16_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32()); } -TEST(ISA, fp16) { - ASSERT_TRUE(cpuinfo_isa.fp16); +TEST(ISA, vfpv4) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4()); } -TEST(ISA, fma) { - ASSERT_TRUE(cpuinfo_isa.fma); +TEST(ISA, vfpv4_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32()); } TEST(ISA, wmmx) { - ASSERT_FALSE(cpuinfo_isa.wmmx); + ASSERT_FALSE(cpuinfo_has_arm_wmmx()); } TEST(ISA, wmmx2) { - ASSERT_FALSE(cpuinfo_isa.wmmx2); + ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); } TEST(ISA, neon) { - ASSERT_TRUE(cpuinfo_isa.neon); + ASSERT_TRUE(cpuinfo_has_arm_neon()); } -#endif /* CPUINFO_ARCH_ARM */ -TEST(ISA, aes) { - ASSERT_TRUE(cpuinfo_isa.aes); +TEST(ISA, neon_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fp16()); } -TEST(ISA, sha1) { - ASSERT_TRUE(cpuinfo_isa.sha1); +TEST(ISA, neon_fma) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fma()); } -TEST(ISA, sha2) { - ASSERT_TRUE(cpuinfo_isa.sha2); +TEST(ISA, atomics) { + ASSERT_FALSE(cpuinfo_has_arm_atomics()); } -TEST(ISA, pmull) { - ASSERT_TRUE(cpuinfo_isa.pmull); +TEST(ISA, neon_rdm) { + ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); } -TEST(ISA, crc32) { - ASSERT_TRUE(cpuinfo_isa.crc32); +TEST(ISA, fp16_arith) { + ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); } -#if CPUINFO_ARCH_ARM64 -TEST(ISA, atomics) { - ASSERT_FALSE(cpuinfo_isa.atomics); +TEST(ISA, jscvt) { + ASSERT_FALSE(cpuinfo_has_arm_jscvt()); } -TEST(ISA, rdm) { - ASSERT_FALSE(cpuinfo_isa.rdm); +TEST(ISA, fcma) { + ASSERT_FALSE(cpuinfo_has_arm_fcma()); } -TEST(ISA, fp16arith) { - ASSERT_FALSE(cpuinfo_isa.fp16arith); +TEST(ISA, aes) { + ASSERT_TRUE(cpuinfo_has_arm_aes()); } -TEST(ISA, jscvt) { - ASSERT_FALSE(cpuinfo_isa.jscvt); +TEST(ISA, sha1) { + ASSERT_TRUE(cpuinfo_has_arm_sha1()); } -TEST(ISA, fcma) { - ASSERT_FALSE(cpuinfo_isa.fcma); +TEST(ISA, sha2) { + ASSERT_TRUE(cpuinfo_has_arm_sha2()); +} + +TEST(ISA, pmull) { + ASSERT_TRUE(cpuinfo_has_arm_pmull()); +} + +TEST(ISA, crc32) { + ASSERT_TRUE(cpuinfo_has_arm_crc32()); } -#endif /* CPUINFO_ARCH_ARM64 */ TEST(L1I, count) { cpuinfo_caches l1i = cpuinfo_get_l1i_cache(); diff --git a/test/nexus6.cc b/test/nexus6.cc index 0570730..7afa612 100644 --- a/test/nexus6.cc +++ b/test/nexus6.cc @@ -153,95 +153,123 @@ TEST(PACKAGES, core_count) { } TEST(ISA, thumb) { - ASSERT_TRUE(cpuinfo_isa.thumb); + ASSERT_TRUE(cpuinfo_has_arm_thumb()); } TEST(ISA, thumb2) { - ASSERT_TRUE(cpuinfo_isa.thumb2); -} - -TEST(ISA, thumbee) { - ASSERT_FALSE(cpuinfo_isa.thumbee); -} - -TEST(ISA, jazelle) { - ASSERT_FALSE(cpuinfo_isa.jazelle); + ASSERT_TRUE(cpuinfo_has_arm_thumb2()); } TEST(ISA, armv5e) { - ASSERT_TRUE(cpuinfo_isa.armv5e); + ASSERT_TRUE(cpuinfo_has_arm_v5e()); } TEST(ISA, armv6) { - ASSERT_TRUE(cpuinfo_isa.armv6); + ASSERT_TRUE(cpuinfo_has_arm_v6()); } TEST(ISA, armv6k) { - ASSERT_TRUE(cpuinfo_isa.armv6k); + ASSERT_TRUE(cpuinfo_has_arm_v6k()); } TEST(ISA, armv7) { - ASSERT_TRUE(cpuinfo_isa.armv7); + ASSERT_TRUE(cpuinfo_has_arm_v7()); } TEST(ISA, armv7mp) { - ASSERT_TRUE(cpuinfo_isa.armv7mp); + ASSERT_TRUE(cpuinfo_has_arm_v7mp()); } TEST(ISA, idiv) { - ASSERT_TRUE(cpuinfo_isa.idiv); + ASSERT_TRUE(cpuinfo_has_arm_idiv()); } TEST(ISA, vfpv2) { - ASSERT_FALSE(cpuinfo_isa.vfpv2); + ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); } TEST(ISA, vfpv3) { - ASSERT_TRUE(cpuinfo_isa.vfpv3); + ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); +} + +TEST(ISA, vfpv3_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); } -TEST(ISA, d32) { - ASSERT_TRUE(cpuinfo_isa.d32); +TEST(ISA, vfpv3_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16()); } -TEST(ISA, fp16) { - ASSERT_TRUE(cpuinfo_isa.fp16); +TEST(ISA, vfpv3_fp16_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32()); } -TEST(ISA, fma) { - ASSERT_TRUE(cpuinfo_isa.fma); +TEST(ISA, vfpv4) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4()); +} + +TEST(ISA, vfpv4_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32()); } TEST(ISA, wmmx) { - ASSERT_FALSE(cpuinfo_isa.wmmx); + ASSERT_FALSE(cpuinfo_has_arm_wmmx()); } TEST(ISA, wmmx2) { - ASSERT_FALSE(cpuinfo_isa.wmmx2); + ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); } TEST(ISA, neon) { - ASSERT_TRUE(cpuinfo_isa.neon); + ASSERT_TRUE(cpuinfo_has_arm_neon()); +} + +TEST(ISA, neon_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fp16()); +} + +TEST(ISA, neon_fma) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fma()); +} + +TEST(ISA, atomics) { + ASSERT_FALSE(cpuinfo_has_arm_atomics()); +} + +TEST(ISA, neon_rdm) { + ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); +} + +TEST(ISA, fp16_arith) { + ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); +} + +TEST(ISA, jscvt) { + ASSERT_FALSE(cpuinfo_has_arm_jscvt()); +} + +TEST(ISA, fcma) { + ASSERT_FALSE(cpuinfo_has_arm_fcma()); } TEST(ISA, aes) { - ASSERT_FALSE(cpuinfo_isa.aes); + ASSERT_FALSE(cpuinfo_has_arm_aes()); } TEST(ISA, sha1) { - ASSERT_FALSE(cpuinfo_isa.sha1); + ASSERT_FALSE(cpuinfo_has_arm_sha1()); } TEST(ISA, sha2) { - ASSERT_FALSE(cpuinfo_isa.sha2); + ASSERT_FALSE(cpuinfo_has_arm_sha2()); } TEST(ISA, pmull) { - ASSERT_FALSE(cpuinfo_isa.pmull); + ASSERT_FALSE(cpuinfo_has_arm_pmull()); } TEST(ISA, crc32) { - ASSERT_FALSE(cpuinfo_isa.crc32); + ASSERT_FALSE(cpuinfo_has_arm_crc32()); } TEST(L1I, count) { diff --git a/test/nexus6p.cc b/test/nexus6p.cc index 94f2141..1a0fc0b 100644 --- a/test/nexus6p.cc +++ b/test/nexus6p.cc @@ -204,121 +204,153 @@ TEST(PACKAGES, core_count) { } } -#if CPUINFO_ARCH_ARM TEST(ISA, thumb) { - ASSERT_TRUE(cpuinfo_isa.thumb); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_thumb()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_thumb()); + #endif } TEST(ISA, thumb2) { - ASSERT_TRUE(cpuinfo_isa.thumb2); -} - -TEST(ISA, thumbee) { - ASSERT_FALSE(cpuinfo_isa.thumbee); -} - -TEST(ISA, jazelle) { - ASSERT_FALSE(cpuinfo_isa.jazelle); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_thumb2()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_thumb2()); + #endif } TEST(ISA, armv5e) { - ASSERT_TRUE(cpuinfo_isa.armv5e); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v5e()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v5e()); + #endif } TEST(ISA, armv6) { - ASSERT_TRUE(cpuinfo_isa.armv6); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v6()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v6()); + #endif } TEST(ISA, armv6k) { - ASSERT_TRUE(cpuinfo_isa.armv6k); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v6k()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v6k()); + #endif } TEST(ISA, armv7) { - ASSERT_TRUE(cpuinfo_isa.armv7); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v7()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v7()); + #endif } TEST(ISA, armv7mp) { - ASSERT_TRUE(cpuinfo_isa.armv7mp); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v7mp()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v7mp()); + #endif } TEST(ISA, idiv) { - ASSERT_TRUE(cpuinfo_isa.idiv); + ASSERT_TRUE(cpuinfo_has_arm_idiv()); } TEST(ISA, vfpv2) { - ASSERT_FALSE(cpuinfo_isa.vfpv2); + ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); } TEST(ISA, vfpv3) { - ASSERT_TRUE(cpuinfo_isa.vfpv3); + ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); +} + +TEST(ISA, vfpv3_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); +} + +TEST(ISA, vfpv3_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16()); } -TEST(ISA, d32) { - ASSERT_TRUE(cpuinfo_isa.d32); +TEST(ISA, vfpv3_fp16_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32()); } -TEST(ISA, fp16) { - ASSERT_TRUE(cpuinfo_isa.fp16); +TEST(ISA, vfpv4) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4()); } -TEST(ISA, fma) { - ASSERT_TRUE(cpuinfo_isa.fma); +TEST(ISA, vfpv4_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32()); } TEST(ISA, wmmx) { - ASSERT_FALSE(cpuinfo_isa.wmmx); + ASSERT_FALSE(cpuinfo_has_arm_wmmx()); } TEST(ISA, wmmx2) { - ASSERT_FALSE(cpuinfo_isa.wmmx2); + ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); } TEST(ISA, neon) { - ASSERT_TRUE(cpuinfo_isa.neon); + ASSERT_TRUE(cpuinfo_has_arm_neon()); } -#endif /* CPUINFO_ARCH_ARM */ -TEST(ISA, aes) { - ASSERT_TRUE(cpuinfo_isa.aes); +TEST(ISA, neon_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fp16()); } -TEST(ISA, sha1) { - ASSERT_TRUE(cpuinfo_isa.sha1); +TEST(ISA, neon_fma) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fma()); } -TEST(ISA, sha2) { - ASSERT_TRUE(cpuinfo_isa.sha2); +TEST(ISA, atomics) { + ASSERT_FALSE(cpuinfo_has_arm_atomics()); } -TEST(ISA, pmull) { - ASSERT_TRUE(cpuinfo_isa.pmull); +TEST(ISA, neon_rdm) { + ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); } -TEST(ISA, crc32) { - ASSERT_TRUE(cpuinfo_isa.crc32); +TEST(ISA, fp16_arith) { + ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); } -#if CPUINFO_ARCH_ARM64 -TEST(ISA, atomics) { - ASSERT_FALSE(cpuinfo_isa.atomics); +TEST(ISA, jscvt) { + ASSERT_FALSE(cpuinfo_has_arm_jscvt()); } -TEST(ISA, rdm) { - ASSERT_FALSE(cpuinfo_isa.rdm); +TEST(ISA, fcma) { + ASSERT_FALSE(cpuinfo_has_arm_fcma()); } -TEST(ISA, fp16arith) { - ASSERT_FALSE(cpuinfo_isa.fp16arith); +TEST(ISA, aes) { + ASSERT_TRUE(cpuinfo_has_arm_aes()); } -TEST(ISA, jscvt) { - ASSERT_FALSE(cpuinfo_isa.jscvt); +TEST(ISA, sha1) { + ASSERT_TRUE(cpuinfo_has_arm_sha1()); } -TEST(ISA, fcma) { - ASSERT_FALSE(cpuinfo_isa.fcma); +TEST(ISA, sha2) { + ASSERT_TRUE(cpuinfo_has_arm_sha2()); +} + +TEST(ISA, pmull) { + ASSERT_TRUE(cpuinfo_has_arm_pmull()); +} + +TEST(ISA, crc32) { + ASSERT_TRUE(cpuinfo_has_arm_crc32()); } -#endif /* CPUINFO_ARCH_ARM64 */ TEST(L1I, count) { cpuinfo_caches l1i = cpuinfo_get_l1i_cache(); diff --git a/test/nexus9.cc b/test/nexus9.cc index 0e518fa..3e0a71c 100644 --- a/test/nexus9.cc +++ b/test/nexus9.cc @@ -152,121 +152,153 @@ TEST(PACKAGES, core_count) { } } -#if CPUINFO_ARCH_ARM TEST(ISA, thumb) { - ASSERT_TRUE(cpuinfo_isa.thumb); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_thumb()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_thumb()); + #endif } TEST(ISA, thumb2) { - ASSERT_TRUE(cpuinfo_isa.thumb2); -} - -TEST(ISA, thumbee) { - ASSERT_FALSE(cpuinfo_isa.thumbee); -} - -TEST(ISA, jazelle) { - ASSERT_FALSE(cpuinfo_isa.jazelle); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_thumb2()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_thumb2()); + #endif } TEST(ISA, armv5e) { - ASSERT_TRUE(cpuinfo_isa.armv5e); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v5e()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v5e()); + #endif } TEST(ISA, armv6) { - ASSERT_TRUE(cpuinfo_isa.armv6); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v6()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v6()); + #endif } TEST(ISA, armv6k) { - ASSERT_TRUE(cpuinfo_isa.armv6k); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v6k()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v6k()); + #endif } TEST(ISA, armv7) { - ASSERT_TRUE(cpuinfo_isa.armv7); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v7()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v7()); + #endif } TEST(ISA, armv7mp) { - ASSERT_TRUE(cpuinfo_isa.armv7mp); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v7mp()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v7mp()); + #endif } TEST(ISA, idiv) { - ASSERT_TRUE(cpuinfo_isa.idiv); + ASSERT_TRUE(cpuinfo_has_arm_idiv()); } TEST(ISA, vfpv2) { - ASSERT_FALSE(cpuinfo_isa.vfpv2); + ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); } TEST(ISA, vfpv3) { - ASSERT_TRUE(cpuinfo_isa.vfpv3); + ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); +} + +TEST(ISA, vfpv3_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); +} + +TEST(ISA, vfpv3_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16()); } -TEST(ISA, d32) { - ASSERT_TRUE(cpuinfo_isa.d32); +TEST(ISA, vfpv3_fp16_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32()); } -TEST(ISA, fp16) { - ASSERT_TRUE(cpuinfo_isa.fp16); +TEST(ISA, vfpv4) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4()); } -TEST(ISA, fma) { - ASSERT_TRUE(cpuinfo_isa.fma); +TEST(ISA, vfpv4_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32()); } TEST(ISA, wmmx) { - ASSERT_FALSE(cpuinfo_isa.wmmx); + ASSERT_FALSE(cpuinfo_has_arm_wmmx()); } TEST(ISA, wmmx2) { - ASSERT_FALSE(cpuinfo_isa.wmmx2); + ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); } TEST(ISA, neon) { - ASSERT_TRUE(cpuinfo_isa.neon); + ASSERT_TRUE(cpuinfo_has_arm_neon()); } -#endif /* CPUINFO_ARCH_ARM */ -TEST(ISA, aes) { - ASSERT_TRUE(cpuinfo_isa.aes); +TEST(ISA, neon_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fp16()); } -TEST(ISA, sha1) { - ASSERT_TRUE(cpuinfo_isa.sha1); +TEST(ISA, neon_fma) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fma()); } -TEST(ISA, sha2) { - ASSERT_TRUE(cpuinfo_isa.sha2); +TEST(ISA, atomics) { + ASSERT_FALSE(cpuinfo_has_arm_atomics()); } -TEST(ISA, pmull) { - ASSERT_TRUE(cpuinfo_isa.pmull); +TEST(ISA, neon_rdm) { + ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); } -TEST(ISA, crc32) { - ASSERT_TRUE(cpuinfo_isa.crc32); +TEST(ISA, fp16_arith) { + ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); } -#if CPUINFO_ARCH_ARM64 -TEST(ISA, atomics) { - ASSERT_FALSE(cpuinfo_isa.atomics); +TEST(ISA, jscvt) { + ASSERT_FALSE(cpuinfo_has_arm_jscvt()); } -TEST(ISA, rdm) { - ASSERT_FALSE(cpuinfo_isa.rdm); +TEST(ISA, fcma) { + ASSERT_FALSE(cpuinfo_has_arm_fcma()); } -TEST(ISA, fp16arith) { - ASSERT_FALSE(cpuinfo_isa.fp16arith); +TEST(ISA, aes) { + ASSERT_TRUE(cpuinfo_has_arm_aes()); } -TEST(ISA, jscvt) { - ASSERT_FALSE(cpuinfo_isa.jscvt); +TEST(ISA, sha1) { + ASSERT_TRUE(cpuinfo_has_arm_sha1()); } -TEST(ISA, fcma) { - ASSERT_FALSE(cpuinfo_isa.fcma); +TEST(ISA, sha2) { + ASSERT_TRUE(cpuinfo_has_arm_sha2()); +} + +TEST(ISA, pmull) { + ASSERT_TRUE(cpuinfo_has_arm_pmull()); +} + +TEST(ISA, crc32) { + ASSERT_TRUE(cpuinfo_has_arm_crc32()); } -#endif /* CPUINFO_ARCH_ARM64 */ TEST(L1I, count) { cpuinfo_caches l1i = cpuinfo_get_l1i_cache(); diff --git a/test/oppo-r9.cc b/test/oppo-r9.cc index e5a7d50..5228582 100644 --- a/test/oppo-r9.cc +++ b/test/oppo-r9.cc @@ -178,121 +178,153 @@ TEST(PACKAGES, core_count) { } } -#if CPUINFO_ARCH_ARM TEST(ISA, thumb) { - ASSERT_TRUE(cpuinfo_isa.thumb); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_thumb()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_thumb()); + #endif } TEST(ISA, thumb2) { - ASSERT_TRUE(cpuinfo_isa.thumb2); -} - -TEST(ISA, thumbee) { - ASSERT_FALSE(cpuinfo_isa.thumbee); -} - -TEST(ISA, jazelle) { - ASSERT_FALSE(cpuinfo_isa.jazelle); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_thumb2()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_thumb2()); + #endif } TEST(ISA, armv5e) { - ASSERT_TRUE(cpuinfo_isa.armv5e); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v5e()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v5e()); + #endif } TEST(ISA, armv6) { - ASSERT_TRUE(cpuinfo_isa.armv6); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v6()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v6()); + #endif } TEST(ISA, armv6k) { - ASSERT_TRUE(cpuinfo_isa.armv6k); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v6k()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v6k()); + #endif } TEST(ISA, armv7) { - ASSERT_TRUE(cpuinfo_isa.armv7); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v7()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v7()); + #endif } TEST(ISA, armv7mp) { - ASSERT_TRUE(cpuinfo_isa.armv7mp); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v7mp()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v7mp()); + #endif } TEST(ISA, idiv) { - ASSERT_TRUE(cpuinfo_isa.idiv); + ASSERT_TRUE(cpuinfo_has_arm_idiv()); } TEST(ISA, vfpv2) { - ASSERT_FALSE(cpuinfo_isa.vfpv2); + ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); } TEST(ISA, vfpv3) { - ASSERT_TRUE(cpuinfo_isa.vfpv3); + ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); +} + +TEST(ISA, vfpv3_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); +} + +TEST(ISA, vfpv3_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16()); } -TEST(ISA, d32) { - ASSERT_TRUE(cpuinfo_isa.d32); +TEST(ISA, vfpv3_fp16_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32()); } -TEST(ISA, fp16) { - ASSERT_TRUE(cpuinfo_isa.fp16); +TEST(ISA, vfpv4) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4()); } -TEST(ISA, fma) { - ASSERT_TRUE(cpuinfo_isa.fma); +TEST(ISA, vfpv4_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32()); } TEST(ISA, wmmx) { - ASSERT_FALSE(cpuinfo_isa.wmmx); + ASSERT_FALSE(cpuinfo_has_arm_wmmx()); } TEST(ISA, wmmx2) { - ASSERT_FALSE(cpuinfo_isa.wmmx2); + ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); } TEST(ISA, neon) { - ASSERT_TRUE(cpuinfo_isa.neon); + ASSERT_TRUE(cpuinfo_has_arm_neon()); } -#endif /* CPUINFO_ARCH_ARM */ -TEST(ISA, aes) { - ASSERT_TRUE(cpuinfo_isa.aes); +TEST(ISA, neon_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fp16()); } -TEST(ISA, sha1) { - ASSERT_TRUE(cpuinfo_isa.sha1); +TEST(ISA, neon_fma) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fma()); } -TEST(ISA, sha2) { - ASSERT_TRUE(cpuinfo_isa.sha2); +TEST(ISA, atomics) { + ASSERT_FALSE(cpuinfo_has_arm_atomics()); } -TEST(ISA, pmull) { - ASSERT_TRUE(cpuinfo_isa.pmull); +TEST(ISA, neon_rdm) { + ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); } -TEST(ISA, crc32) { - ASSERT_TRUE(cpuinfo_isa.crc32); +TEST(ISA, fp16_arith) { + ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); } -#if CPUINFO_ARCH_ARM64 -TEST(ISA, atomics) { - ASSERT_FALSE(cpuinfo_isa.atomics); +TEST(ISA, jscvt) { + ASSERT_FALSE(cpuinfo_has_arm_jscvt()); } -TEST(ISA, rdm) { - ASSERT_FALSE(cpuinfo_isa.rdm); +TEST(ISA, fcma) { + ASSERT_FALSE(cpuinfo_has_arm_fcma()); } -TEST(ISA, fp16arith) { - ASSERT_FALSE(cpuinfo_isa.fp16arith); +TEST(ISA, aes) { + ASSERT_TRUE(cpuinfo_has_arm_aes()); } -TEST(ISA, jscvt) { - ASSERT_FALSE(cpuinfo_isa.jscvt); +TEST(ISA, sha1) { + ASSERT_TRUE(cpuinfo_has_arm_sha1()); } -TEST(ISA, fcma) { - ASSERT_FALSE(cpuinfo_isa.fcma); +TEST(ISA, sha2) { + ASSERT_TRUE(cpuinfo_has_arm_sha2()); +} + +TEST(ISA, pmull) { + ASSERT_TRUE(cpuinfo_has_arm_pmull()); +} + +TEST(ISA, crc32) { + ASSERT_TRUE(cpuinfo_has_arm_crc32()); } -#endif /* CPUINFO_ARCH_ARM64 */ TEST(L1I, count) { cpuinfo_caches l1i = cpuinfo_get_l1i_cache(); diff --git a/test/pixel-c.cc b/test/pixel-c.cc index 3fbcad8..5d92cf6 100644 --- a/test/pixel-c.cc +++ b/test/pixel-c.cc @@ -152,121 +152,153 @@ TEST(PACKAGES, core_count) { } } -#if CPUINFO_ARCH_ARM TEST(ISA, thumb) { - ASSERT_TRUE(cpuinfo_isa.thumb); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_thumb()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_thumb()); + #endif } TEST(ISA, thumb2) { - ASSERT_TRUE(cpuinfo_isa.thumb2); -} - -TEST(ISA, thumbee) { - ASSERT_FALSE(cpuinfo_isa.thumbee); -} - -TEST(ISA, jazelle) { - ASSERT_FALSE(cpuinfo_isa.jazelle); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_thumb2()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_thumb2()); + #endif } TEST(ISA, armv5e) { - ASSERT_TRUE(cpuinfo_isa.armv5e); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v5e()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v5e()); + #endif } TEST(ISA, armv6) { - ASSERT_TRUE(cpuinfo_isa.armv6); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v6()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v6()); + #endif } TEST(ISA, armv6k) { - ASSERT_TRUE(cpuinfo_isa.armv6k); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v6k()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v6k()); + #endif } TEST(ISA, armv7) { - ASSERT_TRUE(cpuinfo_isa.armv7); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v7()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v7()); + #endif } TEST(ISA, armv7mp) { - ASSERT_TRUE(cpuinfo_isa.armv7mp); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v7mp()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v7mp()); + #endif } TEST(ISA, idiv) { - ASSERT_TRUE(cpuinfo_isa.idiv); + ASSERT_TRUE(cpuinfo_has_arm_idiv()); } TEST(ISA, vfpv2) { - ASSERT_FALSE(cpuinfo_isa.vfpv2); + ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); } TEST(ISA, vfpv3) { - ASSERT_TRUE(cpuinfo_isa.vfpv3); + ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); +} + +TEST(ISA, vfpv3_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); +} + +TEST(ISA, vfpv3_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16()); } -TEST(ISA, d32) { - ASSERT_TRUE(cpuinfo_isa.d32); +TEST(ISA, vfpv3_fp16_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32()); } -TEST(ISA, fp16) { - ASSERT_TRUE(cpuinfo_isa.fp16); +TEST(ISA, vfpv4) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4()); } -TEST(ISA, fma) { - ASSERT_TRUE(cpuinfo_isa.fma); +TEST(ISA, vfpv4_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32()); } TEST(ISA, wmmx) { - ASSERT_FALSE(cpuinfo_isa.wmmx); + ASSERT_FALSE(cpuinfo_has_arm_wmmx()); } TEST(ISA, wmmx2) { - ASSERT_FALSE(cpuinfo_isa.wmmx2); + ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); } TEST(ISA, neon) { - ASSERT_TRUE(cpuinfo_isa.neon); + ASSERT_TRUE(cpuinfo_has_arm_neon()); } -#endif /* CPUINFO_ARCH_ARM */ -TEST(ISA, aes) { - ASSERT_TRUE(cpuinfo_isa.aes); +TEST(ISA, neon_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fp16()); } -TEST(ISA, sha1) { - ASSERT_TRUE(cpuinfo_isa.sha1); +TEST(ISA, neon_fma) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fma()); } -TEST(ISA, sha2) { - ASSERT_TRUE(cpuinfo_isa.sha2); +TEST(ISA, atomics) { + ASSERT_FALSE(cpuinfo_has_arm_atomics()); } -TEST(ISA, pmull) { - ASSERT_TRUE(cpuinfo_isa.pmull); +TEST(ISA, neon_rdm) { + ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); } -TEST(ISA, crc32) { - ASSERT_TRUE(cpuinfo_isa.crc32); +TEST(ISA, fp16_arith) { + ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); } -#if CPUINFO_ARCH_ARM64 -TEST(ISA, atomics) { - ASSERT_FALSE(cpuinfo_isa.atomics); +TEST(ISA, jscvt) { + ASSERT_FALSE(cpuinfo_has_arm_jscvt()); } -TEST(ISA, rdm) { - ASSERT_FALSE(cpuinfo_isa.rdm); +TEST(ISA, fcma) { + ASSERT_FALSE(cpuinfo_has_arm_fcma()); } -TEST(ISA, fp16arith) { - ASSERT_FALSE(cpuinfo_isa.fp16arith); +TEST(ISA, aes) { + ASSERT_TRUE(cpuinfo_has_arm_aes()); } -TEST(ISA, jscvt) { - ASSERT_FALSE(cpuinfo_isa.jscvt); +TEST(ISA, sha1) { + ASSERT_TRUE(cpuinfo_has_arm_sha1()); } -TEST(ISA, fcma) { - ASSERT_FALSE(cpuinfo_isa.fcma); +TEST(ISA, sha2) { + ASSERT_TRUE(cpuinfo_has_arm_sha2()); +} + +TEST(ISA, pmull) { + ASSERT_TRUE(cpuinfo_has_arm_pmull()); +} + +TEST(ISA, crc32) { + ASSERT_TRUE(cpuinfo_has_arm_crc32()); } -#endif /* CPUINFO_ARCH_ARM64 */ TEST(L1I, count) { cpuinfo_caches l1i = cpuinfo_get_l1i_cache(); diff --git a/test/pixel-xl.cc b/test/pixel-xl.cc index a9bf05b..62b5e73 100644 --- a/test/pixel-xl.cc +++ b/test/pixel-xl.cc @@ -179,121 +179,153 @@ TEST(PACKAGES, core_count) { } } -#if CPUINFO_ARCH_ARM TEST(ISA, thumb) { - ASSERT_TRUE(cpuinfo_isa.thumb); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_thumb()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_thumb()); + #endif } TEST(ISA, thumb2) { - ASSERT_TRUE(cpuinfo_isa.thumb2); -} - -TEST(ISA, thumbee) { - ASSERT_FALSE(cpuinfo_isa.thumbee); -} - -TEST(ISA, jazelle) { - ASSERT_FALSE(cpuinfo_isa.jazelle); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_thumb2()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_thumb2()); + #endif } TEST(ISA, armv5e) { - ASSERT_TRUE(cpuinfo_isa.armv5e); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v5e()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v5e()); + #endif } TEST(ISA, armv6) { - ASSERT_TRUE(cpuinfo_isa.armv6); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v6()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v6()); + #endif } TEST(ISA, armv6k) { - ASSERT_TRUE(cpuinfo_isa.armv6k); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v6k()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v6k()); + #endif } TEST(ISA, armv7) { - ASSERT_TRUE(cpuinfo_isa.armv7); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v7()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v7()); + #endif } TEST(ISA, armv7mp) { - ASSERT_TRUE(cpuinfo_isa.armv7mp); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v7mp()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v7mp()); + #endif } TEST(ISA, idiv) { - ASSERT_TRUE(cpuinfo_isa.idiv); + ASSERT_TRUE(cpuinfo_has_arm_idiv()); } TEST(ISA, vfpv2) { - ASSERT_FALSE(cpuinfo_isa.vfpv2); + ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); } TEST(ISA, vfpv3) { - ASSERT_TRUE(cpuinfo_isa.vfpv3); + ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); +} + +TEST(ISA, vfpv3_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); +} + +TEST(ISA, vfpv3_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16()); } -TEST(ISA, d32) { - ASSERT_TRUE(cpuinfo_isa.d32); +TEST(ISA, vfpv3_fp16_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32()); } -TEST(ISA, fp16) { - ASSERT_TRUE(cpuinfo_isa.fp16); +TEST(ISA, vfpv4) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4()); } -TEST(ISA, fma) { - ASSERT_TRUE(cpuinfo_isa.fma); +TEST(ISA, vfpv4_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32()); } TEST(ISA, wmmx) { - ASSERT_FALSE(cpuinfo_isa.wmmx); + ASSERT_FALSE(cpuinfo_has_arm_wmmx()); } TEST(ISA, wmmx2) { - ASSERT_FALSE(cpuinfo_isa.wmmx2); + ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); } TEST(ISA, neon) { - ASSERT_TRUE(cpuinfo_isa.neon); + ASSERT_TRUE(cpuinfo_has_arm_neon()); } -#endif /* CPUINFO_ARCH_ARM */ -TEST(ISA, aes) { - ASSERT_TRUE(cpuinfo_isa.aes); +TEST(ISA, neon_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fp16()); } -TEST(ISA, sha1) { - ASSERT_TRUE(cpuinfo_isa.sha1); +TEST(ISA, neon_fma) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fma()); } -TEST(ISA, sha2) { - ASSERT_TRUE(cpuinfo_isa.sha2); +TEST(ISA, atomics) { + ASSERT_FALSE(cpuinfo_has_arm_atomics()); } -TEST(ISA, pmull) { - ASSERT_TRUE(cpuinfo_isa.pmull); +TEST(ISA, neon_rdm) { + ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); } -TEST(ISA, crc32) { - ASSERT_TRUE(cpuinfo_isa.crc32); +TEST(ISA, fp16_arith) { + ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); } -#if CPUINFO_ARCH_ARM64 -TEST(ISA, atomics) { - ASSERT_FALSE(cpuinfo_isa.atomics); +TEST(ISA, jscvt) { + ASSERT_FALSE(cpuinfo_has_arm_jscvt()); } -TEST(ISA, rdm) { - ASSERT_FALSE(cpuinfo_isa.rdm); +TEST(ISA, fcma) { + ASSERT_FALSE(cpuinfo_has_arm_fcma()); } -TEST(ISA, fp16arith) { - ASSERT_FALSE(cpuinfo_isa.fp16arith); +TEST(ISA, aes) { + ASSERT_TRUE(cpuinfo_has_arm_aes()); } -TEST(ISA, jscvt) { - ASSERT_FALSE(cpuinfo_isa.jscvt); +TEST(ISA, sha1) { + ASSERT_TRUE(cpuinfo_has_arm_sha1()); } -TEST(ISA, fcma) { - ASSERT_FALSE(cpuinfo_isa.fcma); +TEST(ISA, sha2) { + ASSERT_TRUE(cpuinfo_has_arm_sha2()); +} + +TEST(ISA, pmull) { + ASSERT_TRUE(cpuinfo_has_arm_pmull()); +} + +TEST(ISA, crc32) { + ASSERT_TRUE(cpuinfo_has_arm_crc32()); } -#endif /* CPUINFO_ARCH_ARM64 */ TEST(L1I, count) { cpuinfo_caches l1i = cpuinfo_get_l1i_cache(); diff --git a/test/pixel.cc b/test/pixel.cc index 7780196..5b8dce3 100644 --- a/test/pixel.cc +++ b/test/pixel.cc @@ -179,121 +179,153 @@ TEST(PACKAGES, core_count) { } } -#if CPUINFO_ARCH_ARM TEST(ISA, thumb) { - ASSERT_TRUE(cpuinfo_isa.thumb); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_thumb()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_thumb()); + #endif } TEST(ISA, thumb2) { - ASSERT_TRUE(cpuinfo_isa.thumb2); -} - -TEST(ISA, thumbee) { - ASSERT_FALSE(cpuinfo_isa.thumbee); -} - -TEST(ISA, jazelle) { - ASSERT_FALSE(cpuinfo_isa.jazelle); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_thumb2()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_thumb2()); + #endif } TEST(ISA, armv5e) { - ASSERT_TRUE(cpuinfo_isa.armv5e); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v5e()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v5e()); + #endif } TEST(ISA, armv6) { - ASSERT_TRUE(cpuinfo_isa.armv6); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v6()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v6()); + #endif } TEST(ISA, armv6k) { - ASSERT_TRUE(cpuinfo_isa.armv6k); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v6k()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v6k()); + #endif } TEST(ISA, armv7) { - ASSERT_TRUE(cpuinfo_isa.armv7); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v7()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v7()); + #endif } TEST(ISA, armv7mp) { - ASSERT_TRUE(cpuinfo_isa.armv7mp); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v7mp()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v7mp()); + #endif } TEST(ISA, idiv) { - ASSERT_TRUE(cpuinfo_isa.idiv); + ASSERT_TRUE(cpuinfo_has_arm_idiv()); } TEST(ISA, vfpv2) { - ASSERT_FALSE(cpuinfo_isa.vfpv2); + ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); } TEST(ISA, vfpv3) { - ASSERT_TRUE(cpuinfo_isa.vfpv3); + ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); +} + +TEST(ISA, vfpv3_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); +} + +TEST(ISA, vfpv3_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16()); } -TEST(ISA, d32) { - ASSERT_TRUE(cpuinfo_isa.d32); +TEST(ISA, vfpv3_fp16_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32()); } -TEST(ISA, fp16) { - ASSERT_TRUE(cpuinfo_isa.fp16); +TEST(ISA, vfpv4) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4()); } -TEST(ISA, fma) { - ASSERT_TRUE(cpuinfo_isa.fma); +TEST(ISA, vfpv4_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32()); } TEST(ISA, wmmx) { - ASSERT_FALSE(cpuinfo_isa.wmmx); + ASSERT_FALSE(cpuinfo_has_arm_wmmx()); } TEST(ISA, wmmx2) { - ASSERT_FALSE(cpuinfo_isa.wmmx2); + ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); } TEST(ISA, neon) { - ASSERT_TRUE(cpuinfo_isa.neon); + ASSERT_TRUE(cpuinfo_has_arm_neon()); } -#endif /* CPUINFO_ARCH_ARM */ -TEST(ISA, aes) { - ASSERT_TRUE(cpuinfo_isa.aes); +TEST(ISA, neon_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fp16()); } -TEST(ISA, sha1) { - ASSERT_TRUE(cpuinfo_isa.sha1); +TEST(ISA, neon_fma) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fma()); } -TEST(ISA, sha2) { - ASSERT_TRUE(cpuinfo_isa.sha2); +TEST(ISA, atomics) { + ASSERT_FALSE(cpuinfo_has_arm_atomics()); } -TEST(ISA, pmull) { - ASSERT_TRUE(cpuinfo_isa.pmull); +TEST(ISA, neon_rdm) { + ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); } -TEST(ISA, crc32) { - ASSERT_TRUE(cpuinfo_isa.crc32); +TEST(ISA, fp16_arith) { + ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); } -#if CPUINFO_ARCH_ARM64 -TEST(ISA, atomics) { - ASSERT_FALSE(cpuinfo_isa.atomics); +TEST(ISA, jscvt) { + ASSERT_FALSE(cpuinfo_has_arm_jscvt()); } -TEST(ISA, rdm) { - ASSERT_FALSE(cpuinfo_isa.rdm); +TEST(ISA, fcma) { + ASSERT_FALSE(cpuinfo_has_arm_fcma()); } -TEST(ISA, fp16arith) { - ASSERT_FALSE(cpuinfo_isa.fp16arith); +TEST(ISA, aes) { + ASSERT_TRUE(cpuinfo_has_arm_aes()); } -TEST(ISA, jscvt) { - ASSERT_FALSE(cpuinfo_isa.jscvt); +TEST(ISA, sha1) { + ASSERT_TRUE(cpuinfo_has_arm_sha1()); } -TEST(ISA, fcma) { - ASSERT_FALSE(cpuinfo_isa.fcma); +TEST(ISA, sha2) { + ASSERT_TRUE(cpuinfo_has_arm_sha2()); +} + +TEST(ISA, pmull) { + ASSERT_TRUE(cpuinfo_has_arm_pmull()); +} + +TEST(ISA, crc32) { + ASSERT_TRUE(cpuinfo_has_arm_crc32()); } -#endif /* CPUINFO_ARCH_ARM64 */ TEST(L1I, count) { cpuinfo_caches l1i = cpuinfo_get_l1i_cache(); diff --git a/test/xperia-c4-dual.cc b/test/xperia-c4-dual.cc index edc76f8..07c5e63 100644 --- a/test/xperia-c4-dual.cc +++ b/test/xperia-c4-dual.cc @@ -178,121 +178,153 @@ TEST(PACKAGES, core_count) { } } -#if CPUINFO_ARCH_ARM TEST(ISA, thumb) { - ASSERT_TRUE(cpuinfo_isa.thumb); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_thumb()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_thumb()); + #endif } TEST(ISA, thumb2) { - ASSERT_TRUE(cpuinfo_isa.thumb2); -} - -TEST(ISA, thumbee) { - ASSERT_FALSE(cpuinfo_isa.thumbee); -} - -TEST(ISA, jazelle) { - ASSERT_FALSE(cpuinfo_isa.jazelle); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_thumb2()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_thumb2()); + #endif } TEST(ISA, armv5e) { - ASSERT_TRUE(cpuinfo_isa.armv5e); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v5e()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v5e()); + #endif } TEST(ISA, armv6) { - ASSERT_TRUE(cpuinfo_isa.armv6); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v6()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v6()); + #endif } TEST(ISA, armv6k) { - ASSERT_TRUE(cpuinfo_isa.armv6k); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v6k()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v6k()); + #endif } TEST(ISA, armv7) { - ASSERT_TRUE(cpuinfo_isa.armv7); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v7()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v7()); + #endif } TEST(ISA, armv7mp) { - ASSERT_TRUE(cpuinfo_isa.armv7mp); + #if CPUINFO_ARCH_ARM + ASSERT_TRUE(cpuinfo_has_arm_v7mp()); + #elif CPUINFO_ARCH_ARM64 + ASSERT_FALSE(cpuinfo_has_arm_v7mp()); + #endif } TEST(ISA, idiv) { - ASSERT_TRUE(cpuinfo_isa.idiv); + ASSERT_TRUE(cpuinfo_has_arm_idiv()); } TEST(ISA, vfpv2) { - ASSERT_FALSE(cpuinfo_isa.vfpv2); + ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); } TEST(ISA, vfpv3) { - ASSERT_TRUE(cpuinfo_isa.vfpv3); + ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); +} + +TEST(ISA, vfpv3_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); +} + +TEST(ISA, vfpv3_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16()); } -TEST(ISA, d32) { - ASSERT_TRUE(cpuinfo_isa.d32); +TEST(ISA, vfpv3_fp16_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32()); } -TEST(ISA, fp16) { - ASSERT_TRUE(cpuinfo_isa.fp16); +TEST(ISA, vfpv4) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4()); } -TEST(ISA, fma) { - ASSERT_TRUE(cpuinfo_isa.fma); +TEST(ISA, vfpv4_d32) { + ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32()); } TEST(ISA, wmmx) { - ASSERT_FALSE(cpuinfo_isa.wmmx); + ASSERT_FALSE(cpuinfo_has_arm_wmmx()); } TEST(ISA, wmmx2) { - ASSERT_FALSE(cpuinfo_isa.wmmx2); + ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); } TEST(ISA, neon) { - ASSERT_TRUE(cpuinfo_isa.neon); + ASSERT_TRUE(cpuinfo_has_arm_neon()); } -#endif /* CPUINFO_ARCH_ARM */ -TEST(ISA, aes) { - ASSERT_TRUE(cpuinfo_isa.aes); +TEST(ISA, neon_fp16) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fp16()); } -TEST(ISA, sha1) { - ASSERT_TRUE(cpuinfo_isa.sha1); +TEST(ISA, neon_fma) { + ASSERT_TRUE(cpuinfo_has_arm_neon_fma()); } -TEST(ISA, sha2) { - ASSERT_TRUE(cpuinfo_isa.sha2); +TEST(ISA, atomics) { + ASSERT_FALSE(cpuinfo_has_arm_atomics()); } -TEST(ISA, pmull) { - ASSERT_TRUE(cpuinfo_isa.pmull); +TEST(ISA, neon_rdm) { + ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); } -TEST(ISA, crc32) { - ASSERT_TRUE(cpuinfo_isa.crc32); +TEST(ISA, fp16_arith) { + ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); } -#if CPUINFO_ARCH_ARM64 -TEST(ISA, atomics) { - ASSERT_FALSE(cpuinfo_isa.atomics); +TEST(ISA, jscvt) { + ASSERT_FALSE(cpuinfo_has_arm_jscvt()); } -TEST(ISA, rdm) { - ASSERT_FALSE(cpuinfo_isa.rdm); +TEST(ISA, fcma) { + ASSERT_FALSE(cpuinfo_has_arm_fcma()); } -TEST(ISA, fp16arith) { - ASSERT_FALSE(cpuinfo_isa.fp16arith); +TEST(ISA, aes) { + ASSERT_TRUE(cpuinfo_has_arm_aes()); } -TEST(ISA, jscvt) { - ASSERT_FALSE(cpuinfo_isa.jscvt); +TEST(ISA, sha1) { + ASSERT_TRUE(cpuinfo_has_arm_sha1()); } -TEST(ISA, fcma) { - ASSERT_FALSE(cpuinfo_isa.fcma); +TEST(ISA, sha2) { + ASSERT_TRUE(cpuinfo_has_arm_sha2()); +} + +TEST(ISA, pmull) { + ASSERT_TRUE(cpuinfo_has_arm_pmull()); +} + +TEST(ISA, crc32) { + ASSERT_TRUE(cpuinfo_has_arm_crc32()); } -#endif /* CPUINFO_ARCH_ARM64 */ TEST(L1I, count) { cpuinfo_caches l1i = cpuinfo_get_l1i_cache(); |