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-rw-r--r--test/mock/galaxy-s7-us.h78
-rw-r--r--test/mock/huawei-p8-lite.h36
-rw-r--r--test/mock/huawei-p9-lite.h36
-rw-r--r--test/mock/oppo-r9.h26
-rw-r--r--test/mock/xperia-c4-dual.h26
5 files changed, 99 insertions, 103 deletions
diff --git a/test/mock/galaxy-s7-us.h b/test/mock/galaxy-s7-us.h
index 7f8c4ef..f4a1a8c 100644
--- a/test/mock/galaxy-s7-us.h
+++ b/test/mock/galaxy-s7-us.h
@@ -46,46 +46,46 @@ struct cpuinfo_mock_file filesystem[] = {
#elif CPUINFO_ARCH_ARM
{
.path = "/proc/cpuinfo",
- .size = 1176,
+ .size = 1137,
.content =
- "processor\t: 0\r\n"
- "model name\t: AArch64 Processor rev 2 (aarch64)\r\n"
- "Features\t: half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt lpae evtstrm aes pmull sha1 sha2 crc32\r\n"
- "CPU implementer\t: 0x51\r\n"
- "CPU architecture: 8\r\n"
- "CPU variant\t: 0x1\r\n"
- "CPU part\t: 0x211\r\n"
- "CPU revision\t: 2\r\n"
- "\r\n"
- "processor\t: 1\r\n"
- "model name\t: AArch64 Processor rev 2 (aarch64)\r\n"
- "Features\t: half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt lpae evtstrm aes pmull sha1 sha2 crc32\r\n"
- "CPU implementer\t: 0x51\r\n"
- "CPU architecture: 8\r\n"
- "CPU variant\t: 0x1\r\n"
- "CPU part\t: 0x211\r\n"
- "CPU revision\t: 2\r\n"
- "\r\n"
- "processor\t: 2\r\n"
- "model name\t: AArch64 Processor rev 2 (aarch64)\r\n"
- "Features\t: half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt lpae evtstrm aes pmull sha1 sha2 crc32\r\n"
- "CPU implementer\t: 0x51\r\n"
- "CPU architecture: 8\r\n"
- "CPU variant\t: 0x1\r\n"
- "CPU part\t: 0x205\r\n"
- "CPU revision\t: 2\r\n"
- "\r\n"
- "processor\t: 3\r\n"
- "model name\t: AArch64 Processor rev 2 (aarch64)\r\n"
- "Features\t: half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt lpae evtstrm aes pmull sha1 sha2 crc32\r\n"
- "CPU implementer\t: 0x51\r\n"
- "CPU architecture: 8\r\n"
- "CPU variant\t: 0x1\r\n"
- "CPU part\t: 0x205\r\n"
- "CPU revision\t: 2\r\n"
- "\r\n"
- "Hardware\t: Qualcomm Technologies, Inc MSM8996\r\n"
- "Revision\t: 000f\r\n",
+ "processor\t: 0\n"
+ "model name\t: AArch64 Processor rev 2 (aarch64)\n"
+ "Features\t: half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt lpae evtstrm aes pmull sha1 sha2 crc32\n"
+ "CPU implementer\t: 0x51\n"
+ "CPU architecture: 8\n"
+ "CPU variant\t: 0x1\n"
+ "CPU part\t: 0x211\n"
+ "CPU revision\t: 2\n"
+ "\n"
+ "processor\t: 1\n"
+ "model name\t: AArch64 Processor rev 2 (aarch64)\n"
+ "Features\t: half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt lpae evtstrm aes pmull sha1 sha2 crc32\n"
+ "CPU implementer\t: 0x51\n"
+ "CPU architecture: 8\n"
+ "CPU variant\t: 0x1\n"
+ "CPU part\t: 0x211\n"
+ "CPU revision\t: 2\n"
+ "\n"
+ "processor\t: 2\n"
+ "model name\t: AArch64 Processor rev 2 (aarch64)\n"
+ "Features\t: half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt lpae evtstrm aes pmull sha1 sha2 crc32\n"
+ "CPU implementer\t: 0x51\n"
+ "CPU architecture: 8\n"
+ "CPU variant\t: 0x1\n"
+ "CPU part\t: 0x205\n"
+ "CPU revision\t: 2\n"
+ "\n"
+ "processor\t: 3\n"
+ "model name\t: AArch64 Processor rev 2 (aarch64)\n"
+ "Features\t: half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt lpae evtstrm aes pmull sha1 sha2 crc32\n"
+ "CPU implementer\t: 0x51\n"
+ "CPU architecture: 8\n"
+ "CPU variant\t: 0x1\n"
+ "CPU part\t: 0x205\n"
+ "CPU revision\t: 2\n"
+ "\n"
+ "Hardware\t: Qualcomm Technologies, Inc MSM8996\n"
+ "Revision\t: 000f",
},
#endif
{
diff --git a/test/mock/huawei-p8-lite.h b/test/mock/huawei-p8-lite.h
index ed7f3c9..d0754bf 100644
--- a/test/mock/huawei-p8-lite.h
+++ b/test/mock/huawei-p8-lite.h
@@ -25,25 +25,25 @@ struct cpuinfo_mock_file filesystem[] = {
#elif CPUINFO_ARCH_ARM
{
.path = "/proc/cpuinfo",
- .size = 413,
+ .size = 395,
.content =
- "Processor\t: AArch64 Processor rev 3 (aarch64)\r\n"
- "processor\t: 0\r\n"
- "processor\t: 1\r\n"
- "processor\t: 2\r\n"
- "processor\t: 3\r\n"
- "processor\t: 4\r\n"
- "processor\t: 5\r\n"
- "processor\t: 6\r\n"
- "processor\t: 7\r\n"
- "Features\t: fp asimd evtstrm aes pmull sha1 sha2 crc32 wp half thumb fastmult vfp edsp neon vfpv3 tlsi vfpv4 idiva idivt \r\n"
- "CPU implementer\t: 0x41\r\n"
- "CPU architecture: 8\r\n"
- "CPU variant\t: 0x0\r\n"
- "CPU part\t: 0xd03\r\n"
- "CPU revision\t: 3\r\n"
- "\r\n"
- "Hardware\t: hi6210sft\r\n",
+ "Processor\t: AArch64 Processor rev 3 (aarch64)\n"
+ "processor\t: 0\n"
+ "processor\t: 1\n"
+ "processor\t: 2\n"
+ "processor\t: 3\n"
+ "processor\t: 4\n"
+ "processor\t: 5\n"
+ "processor\t: 6\n"
+ "processor\t: 7\n"
+ "Features\t: fp asimd evtstrm aes pmull sha1 sha2 crc32 wp half thumb fastmult vfp edsp neon vfpv3 tlsi vfpv4 idiva idivt \n"
+ "CPU implementer\t: 0x41\n"
+ "CPU architecture: 8\n"
+ "CPU variant\t: 0x0\n"
+ "CPU part\t: 0xd03\n"
+ "CPU revision\t: 3\n"
+ "\n"
+ "Hardware\t: hi6210sft",
},
#endif
{
diff --git a/test/mock/huawei-p9-lite.h b/test/mock/huawei-p9-lite.h
index bed7330..e5539b8 100644
--- a/test/mock/huawei-p9-lite.h
+++ b/test/mock/huawei-p9-lite.h
@@ -25,25 +25,25 @@ struct cpuinfo_mock_file filesystem[] = {
#elif CPUINFO_ARCH_ARM
{
.path = "/proc/cpuinfo",
- .size = 410,
+ .size = 392,
.content =
- "Processor\t: AArch64 Processor rev 4 (aarch64)\r\n"
- "processor\t: 0\r\n"
- "processor\t: 1\r\n"
- "processor\t: 2\r\n"
- "processor\t: 3\r\n"
- "processor\t: 4\r\n"
- "processor\t: 5\r\n"
- "processor\t: 6\r\n"
- "processor\t: 7\r\n"
- "Features\t: fp asimd evtstrm aes pmull sha1 sha2 crc32 wp half thumb fastmult vfp edsp neon vfpv3 tlsi vfpv4 idiva idivt \r\n"
- "CPU implementer\t: 0x41\r\n"
- "CPU architecture: 8\r\n"
- "CPU variant\t: 0x0\r\n"
- "CPU part\t: 0xd03\r\n"
- "CPU revision\t: 4\r\n"
- "\r\n"
- "Hardware\t: hi6250\r\n",
+ "Processor\t: AArch64 Processor rev 4 (aarch64)\n"
+ "processor\t: 0\n"
+ "processor\t: 1\n"
+ "processor\t: 2\n"
+ "processor\t: 3\n"
+ "processor\t: 4\n"
+ "processor\t: 5\n"
+ "processor\t: 6\n"
+ "processor\t: 7\n"
+ "Features\t: fp asimd evtstrm aes pmull sha1 sha2 crc32 wp half thumb fastmult vfp edsp neon vfpv3 tlsi vfpv4 idiva idivt \n"
+ "CPU implementer\t: 0x41\n"
+ "CPU architecture: 8\n"
+ "CPU variant\t: 0x0\n"
+ "CPU part\t: 0xd03\n"
+ "CPU revision\t: 4\n"
+ "\n"
+ "Hardware\t: hi6250",
},
#endif
{
diff --git a/test/mock/oppo-r9.h b/test/mock/oppo-r9.h
index 6ea02e1..5b687a2 100644
--- a/test/mock/oppo-r9.h
+++ b/test/mock/oppo-r9.h
@@ -27,21 +27,19 @@ struct cpuinfo_mock_file filesystem[] = {
#elif CPUINFO_ARCH_ARM
{
.path = "/proc/cpuinfo",
- .size = 495,
+ .size = 303,
.content =
- "WARNING: linker: /data/local/tmp/cpuinfo-dump: unused DT entry: type 0x6ffffffe arg 0x52c\r\n"
- "WARNING: linker: /data/local/tmp/cpuinfo-dump: unused DT entry: type 0x6fffffff arg 0x1\r\n"
- "Processor\t: AArch64 Processor rev 2 (aarch64)\r\n"
- "processor\t: 0\r\n"
- "BogoMIPS\t: 26.00\r\n"
- "Features\t: fp asimd aes pmull sha1 sha2 crc32 wp half thumb fastmult vfp edsp neon vfpv3 tlsi vfpv4 idiva idivt \r\n"
- "CPU implementer\t: 0x41\r\n"
- "CPU architecture: 8\r\n"
- "CPU variant\t: 0x0\r\n"
- "CPU part\t: 0xd03\r\n"
- "CPU revision\t: 2\r\n"
- "\r\n"
- "Hardware\t: MT6755\r\n",
+ "Processor\t: AArch64 Processor rev 2 (aarch64)\n"
+ "processor\t: 0\n"
+ "BogoMIPS\t: 26.00\n"
+ "Features\t: fp asimd aes pmull sha1 sha2 crc32 wp half thumb fastmult vfp edsp neon vfpv3 tlsi vfpv4 idiva idivt \n"
+ "CPU implementer\t: 0x41\n"
+ "CPU architecture: 8\n"
+ "CPU variant\t: 0x0\n"
+ "CPU part\t: 0xd03\n"
+ "CPU revision\t: 2\n"
+ "\n"
+ "Hardware\t: MT6755",
},
#endif
{
diff --git a/test/mock/xperia-c4-dual.h b/test/mock/xperia-c4-dual.h
index 1606aaa..fe84a1f 100644
--- a/test/mock/xperia-c4-dual.h
+++ b/test/mock/xperia-c4-dual.h
@@ -19,21 +19,19 @@ struct cpuinfo_mock_file filesystem[] = {
#elif CPUINFO_ARCH_ARM
{
.path = "/proc/cpuinfo",
- .size = 495,
+ .size = 303,
.content =
- "WARNING: linker: /data/local/tmp/cpuinfo-dump: unused DT entry: type 0x6ffffffe arg 0x52c\r\n"
- "WARNING: linker: /data/local/tmp/cpuinfo-dump: unused DT entry: type 0x6fffffff arg 0x1\r\n"
- "Processor\t: AArch64 Processor rev 2 (aarch64)\r\n"
- "processor\t: 0\r\n"
- "BogoMIPS\t: 26.00\r\n"
- "Features\t: fp asimd aes pmull sha1 sha2 crc32 wp half thumb fastmult vfp edsp neon vfpv3 tlsi vfpv4 idiva idivt \r\n"
- "CPU implementer\t: 0x41\r\n"
- "CPU architecture: 8\r\n"
- "CPU variant\t: 0x0\r\n"
- "CPU part\t: 0xd03\r\n"
- "CPU revision\t: 2\r\n"
- "\r\n"
- "Hardware\t: MT6752\r\n",
+ "Processor\t: AArch64 Processor rev 2 (aarch64)\n"
+ "processor\t: 0\n"
+ "BogoMIPS\t: 26.00\n"
+ "Features\t: fp asimd aes pmull sha1 sha2 crc32 wp half thumb fastmult vfp edsp neon vfpv3 tlsi vfpv4 idiva idivt \n"
+ "CPU implementer\t: 0x41\n"
+ "CPU architecture: 8\n"
+ "CPU variant\t: 0x0\n"
+ "CPU part\t: 0xd03\n"
+ "CPU revision\t: 2\n"
+ "\n"
+ "Hardware\t: MT6752",
},
#endif
{
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-07 13:08:19 +0000