From a7e1076b681945f1ec805b7eab86b58ee0b3b00a Mon Sep 17 00:00:00 2001 From: Ashkan Aliabadi Date: Tue, 15 Dec 2020 18:28:20 -0800 Subject: Upstream cpuinfo updates as of XNNPACK:b20dcd6252740a9a62e8541144a978d23b72bb81. (#50) --- include/cpuinfo.h | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) (limited to 'include/cpuinfo.h') diff --git a/include/cpuinfo.h b/include/cpuinfo.h index e2e6564..cffa299 100644 --- a/include/cpuinfo.h +++ b/include/cpuinfo.h @@ -361,6 +361,8 @@ enum cpuinfo_uarch { cpuinfo_uarch_zen = 0x00200109, /** AMD Zen 2 microarchitecture (7 nm Ryzen and EPYC CPUs). */ cpuinfo_uarch_zen2 = 0x0020010A, + /** AMD Zen 3 microarchitecture. */ + cpuinfo_uarch_zen3 = 0x0020010B, /** NSC Geode and AMD Geode GX and LX. */ cpuinfo_uarch_geode = 0x00200200, @@ -425,6 +427,9 @@ enum cpuinfo_uarch { /** ARM Neoverse E1. */ cpuinfo_uarch_neoverse_e1 = 0x00300401, + /** ARM Cortex-X1. */ + cpuinfo_uarch_cortex_x1 = 0x00300500, + /** Qualcomm Scorpion. */ cpuinfo_uarch_scorpion = 0x00400100, /** Qualcomm Krait. */ @@ -1455,6 +1460,8 @@ static inline bool cpuinfo_has_x86_sha(void) { #endif #if CPUINFO_ARCH_ARM64 bool atomics; + bool sve; + bool sve2; #endif bool rdm; bool fp16arith; @@ -1770,6 +1777,22 @@ static inline bool cpuinfo_has_arm_crc32(void) { #endif } +static inline bool cpuinfo_has_arm_sve(void) { + #if CPUINFO_ARCH_ARM64 + return cpuinfo_isa.sve; + #else + return false; + #endif +} + +static inline bool cpuinfo_has_arm_sve2(void) { + #if CPUINFO_ARCH_ARM64 + return cpuinfo_isa.sve2; + #else + return false; + #endif +} + const struct cpuinfo_processor* CPUINFO_ABI cpuinfo_get_processors(void); const struct cpuinfo_core* CPUINFO_ABI cpuinfo_get_cores(void); const struct cpuinfo_cluster* CPUINFO_ABI cpuinfo_get_clusters(void); -- cgit v1.2.3