diff options
| author | Andrew Scull <ascull@google.com> | 2021-04-21 10:02:48 +0000 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-04-21 23:19:49 +0000 |
| commit | 0131dd35797923d5dbaed5fd6a14004b82e85611 (patch) | |
| tree | f33612ccff0b1458e597e3bc633401b08058b13f | |
| parent | 6d6efb20c0fdbf74b433668aaabbc32fe950c4b5 (diff) | |
| download | crosvm-0131dd35797923d5dbaed5fd6a14004b82e85611.tar.gz | |
aarch64: refactor register initialization
Use single purpose, immutable variables with meaningful names.
BUG=b:163789172
TEST=cargo test
Change-Id: Icc90918f6154bef8ab93358ba0651fb0ed7b041a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2843604
Reviewed-by: Andrew Walbran <qwandor@google.com>
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Auto-Submit: Andrew Scull <ascull@google.com>
Commit-Queue: Dylan Reid <dgreid@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
| -rw-r--r-- | aarch64/src/lib.rs | 28 |
1 files changed, 12 insertions, 16 deletions
diff --git a/aarch64/src/lib.rs b/aarch64/src/lib.rs index 389fa4d63..4a3a35ecf 100644 --- a/aarch64/src/lib.rs +++ b/aarch64/src/lib.rs @@ -497,31 +497,27 @@ impl AArch64 { } vcpu.init(&features).map_err(Error::VcpuInit)?; - // set up registers - let mut data: u64; - let mut reg_id: u64; - // All interrupts masked - data = PSR_D_BIT | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT | PSR_MODE_EL1H; - reg_id = arm64_core_reg!(pstate); - vcpu.set_one_reg(reg_id, data).map_err(Error::SetReg)?; + let pstate = PSR_D_BIT | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT | PSR_MODE_EL1H; + vcpu.set_one_reg(arm64_core_reg!(pstate), pstate) + .map_err(Error::SetReg)?; // Other cpus are powered off initially if vcpu_id == 0 { - if has_bios { - data = AARCH64_PHYS_MEM_START + AARCH64_BIOS_OFFSET; + let entry_addr = if has_bios { + AARCH64_PHYS_MEM_START + AARCH64_BIOS_OFFSET } else { - data = AARCH64_PHYS_MEM_START + AARCH64_KERNEL_OFFSET; - } - reg_id = arm64_core_reg!(pc); - vcpu.set_one_reg(reg_id, data).map_err(Error::SetReg)?; + AARCH64_PHYS_MEM_START + AARCH64_KERNEL_OFFSET + }; + vcpu.set_one_reg(arm64_core_reg!(pc), entry_addr) + .map_err(Error::SetReg)?; /* X0 -- fdt address */ let mem_size = guest_mem.memory_size(); - data = (AARCH64_PHYS_MEM_START + fdt_offset(mem_size, has_bios)) as u64; + let fdt_addr = (AARCH64_PHYS_MEM_START + fdt_offset(mem_size, has_bios)) as u64; // hack -- can't get this to do offsetof(regs[0]) but luckily it's at offset 0 - reg_id = arm64_core_reg!(regs); - vcpu.set_one_reg(reg_id, data).map_err(Error::SetReg)?; + vcpu.set_one_reg(arm64_core_reg!(regs), fdt_addr) + .map_err(Error::SetReg)?; } Ok(()) |