diff options
| author | John Kessenich <johnkslang@users.noreply.github.com> | 2020-02-07 16:09:58 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-02-07 16:09:58 -0700 |
| commit | 5dbc1c32182e17b8ab8e8158a802ecabaf35aad3 (patch) | |
| tree | e72620aa614263f9a9e6507dcb6907f4ad0f232b | |
| parent | dc77030acc9c6fe7ca21fff54c5a9d7b532d7da6 (diff) | |
| parent | 4b013f0fdf2e317a39b46d59131aea3a2ea46952 (diff) | |
| download | SPIRV-Headers-5dbc1c32182e17b8ab8e8158a802ecabaf35aad3.tar.gz | |
Merge pull request #142 from mkinsner/additional_loop_control_bits
Allocate three loop control bits for an upcoming Intel extension
| -rw-r--r-- | include/spirv/spir-v.xml | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/include/spirv/spir-v.xml b/include/spirv/spir-v.xml index bcffd61..2fac9c5 100644 --- a/include/spirv/spir-v.xml +++ b/include/spirv/spir-v.xml @@ -139,8 +139,8 @@ <!-- Reserved loop control bits --> <ids type="LoopControl" start="0" end="15" vendor="Khronos" comment="Reserved LoopControl bits, not available to vendors - see the SPIR-V Specification"/> - <ids type="LoopControl" start="16" end="19" vendor="Intel" comment="Contact michael.kinsner@intel.com"/> - <ids type="LoopControl" start="20" end="30" comment="Unreserved bits reservable for use by vendors"/> + <ids type="LoopControl" start="16" end="22" vendor="Intel" comment="Contact michael.kinsner@intel.com"/> + <ids type="LoopControl" start="23" end="30" comment="Unreserved bits reservable for use by vendors"/> <ids type="LoopControl" start="31" end="31" vendor="Khronos" comment="Reserved LoopControl bit, not available to vendors"/> </registry> |