From 9535009c98f9cab028bc95dbccd8d26737cd65af Mon Sep 17 00:00:00 2001 From: Miao Wang Date: Tue, 12 Jul 2016 16:29:52 -0700 Subject: Add MemoryBarrier for MIPS target - Fix the build breakage introduced by upstream change. Change-Id: Iaa408e3319ab9661feb82373b5f7fb13b09cc96f --- internal/multi_thread_gemm.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/internal/multi_thread_gemm.h b/internal/multi_thread_gemm.h index 9223a42..0aacddb 100644 --- a/internal/multi_thread_gemm.h +++ b/internal/multi_thread_gemm.h @@ -73,6 +73,8 @@ inline void WriteBarrier() { asm volatile("dmb ishst" ::: "memory"); #elif defined(GEMMLOWP_X86) asm volatile("sfence" ::: "memory"); +#elif defined(__mips__) + MemoryBarrier(); #else #error "Unsupported architecture for WriteBarrier." #endif @@ -85,6 +87,8 @@ inline void ReadBarrier() { asm volatile("dmb ishld" ::: "memory"); #elif defined(GEMMLOWP_X86) asm volatile("lfence" ::: "memory"); +#elif defined(__mips__) + MemoryBarrier(); #else #error "Unsupported architecture for ReadBarrier." #endif -- cgit v1.2.3