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authorLuís Marques <luismarques@lowrisc.org>2020-04-17 17:31:49 +0100
committerGitHub <noreply@github.com>2020-04-17 19:31:49 +0300
commitecc1685340f58f7fe6b707036bc0bb1fccabb0c1 (patch)
tree6d323bdac5fceb4bc4b628e83d8bc58b426c8a0a /src/cycleclock.h
parent8cead007830bdbe94b7cc259e873179d0ef84da6 (diff)
downloadgoogle-benchmark-ecc1685340f58f7fe6b707036bc0bb1fccabb0c1.tar.gz
Fix formatting issues introduced by a77d5f7 (#959)
Diffstat (limited to 'src/cycleclock.h')
-rw-r--r--src/cycleclock.h26
1 files changed, 13 insertions, 13 deletions
diff --git a/src/cycleclock.h b/src/cycleclock.h
index 3901da6..179c67c 100644
--- a/src/cycleclock.h
+++ b/src/cycleclock.h
@@ -86,15 +86,15 @@ inline BENCHMARK_ALWAYS_INLINE int64_t Now() {
// This returns a time-base, which is not always precisely a cycle-count.
#if defined(__powerpc64__) || defined(__ppc64__)
int64_t tb;
- asm volatile("mfspr %0, 268" : "=r" (tb));
+ asm volatile("mfspr %0, 268" : "=r"(tb));
return tb;
#else
uint32_t tbl, tbu0, tbu1;
asm volatile(
- "mftbu %0\n"
- "mftbl %1\n"
- "mftbu %2"
- : "=r"(tbu0), "=r"(tbl), "=r"(tbu1));
+ "mftbu %0\n"
+ "mftbl %1\n"
+ "mftbu %2"
+ : "=r"(tbu0), "=r"(tbl), "=r"(tbu1));
tbl &= -static_cast<int32_t>(tbu0 == tbu1);
// high 32 bits in tbu1; low 32 bits in tbl (tbu0 is no longer needed)
return (static_cast<uint64_t>(tbu1) << 32) | tbl;
@@ -179,14 +179,14 @@ inline BENCHMARK_ALWAYS_INLINE int64_t Now() {
// This asm also includes the PowerPC overflow handling strategy, as above.
// Implemented in assembly because Clang insisted on branching.
asm volatile(
- "rdcycleh %0\n"
- "rdcycle %1\n"
- "rdcycleh %2\n"
- "sub %0, %0, %2\n"
- "seqz %0, %0\n"
- "sub %0, zero, %0\n"
- "and %1, %1, %0\n"
- : "=r"(cycles_hi0), "=r"(cycles_lo), "=r"(cycles_hi1));
+ "rdcycleh %0\n"
+ "rdcycle %1\n"
+ "rdcycleh %2\n"
+ "sub %0, %0, %2\n"
+ "seqz %0, %0\n"
+ "sub %0, zero, %0\n"
+ "and %1, %1, %0\n"
+ : "=r"(cycles_hi0), "=r"(cycles_lo), "=r"(cycles_hi1));
return (static_cast<uint64_t>(cycles_hi1) << 32) | cycles_lo;
#else
uint64_t cycles;