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| author | Christopher Ferris <cferris@google.com> | 2017-01-13 13:28:52 -0800 |
|---|---|---|
| committer | Christopher Ferris <cferris@google.com> | 2017-01-25 16:22:38 -0800 |
| commit | 3318540b58f2d22ddaf211f3c8887785372e4e28 (patch) | |
| tree | 386af18b848e2dfb0d796e1da9534fe62f6db5d2 /original/uapi/linux/serial_reg.h | |
| parent | a3a54a2fc66f6e0c909f5bcd2748887f207a44e7 (diff) | |
| download | kernel-headers-3318540b58f2d22ddaf211f3c8887785372e4e28.tar.gz | |
Update to kernel headers v4.9.3.
Test: Built arm, arm64, x86, x86_64 targets.
Test: Booted on angler, and ran bionic unit tests (32 bit and 64 bit).
Change-Id: I1e1baf5e5ce74283d21140736aad64c25dbdbe4e
Diffstat (limited to 'original/uapi/linux/serial_reg.h')
| -rw-r--r-- | original/uapi/linux/serial_reg.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/original/uapi/linux/serial_reg.h b/original/uapi/linux/serial_reg.h index 1e5ac4e..b4c0484 100644 --- a/original/uapi/linux/serial_reg.h +++ b/original/uapi/linux/serial_reg.h @@ -376,5 +376,13 @@ #define UART_EXAR_TXTRG 0x0a /* Tx FIFO trigger level write-only */ #define UART_EXAR_RXTRG 0x0b /* Rx FIFO trigger level write-only */ +/* + * These are definitions for the Altera ALTR_16550_F32/F64/F128 + * Normalized from 0x100 to 0x40 because of shift by 2 (32 bit regs). + */ +#define UART_ALTR_AFR 0x40 /* Additional Features Register */ +#define UART_ALTR_EN_TXFIFO_LW 0x01 /* Enable the TX FIFO Low Watermark */ +#define UART_ALTR_TX_LOW 0x41 /* Tx FIFO Low Watermark */ + #endif /* _LINUX_SERIAL_REG_H */ |