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author | Rakesh Kumar <rakesh.kumar@ittiam.com> | 2017-11-07 22:51:30 +0000 |
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committer | android-build-merger <android-build-merger@google.com> | 2017-11-07 22:51:30 +0000 |
commit | 1d0fe6aaf99c3ef1e2d9c4c15ad49ad9180da5b5 (patch) | |
tree | 1654eb72f94c15fcda13fc52bf7cc8e1b05db214 /common/arm/ihevc_intra_pred_filters_luma_mode_19_to_25.s | |
parent | 4c7f3d573692c09ccbb56bb2fd51527686d109f5 (diff) | |
parent | 68f18ba505a4c7fb39ec1ca1f6888e95acc1ff51 (diff) | |
download | libhevc-1d0fe6aaf99c3ef1e2d9c4c15ad49ad9180da5b5.tar.gz |
Add PUSH-POP of D registers in Arm Neon 32 bit functions am: a47cb8865a am: 9525ebc765 am: 0671e4cda7 am: ff7a95abd4 am: 6acf9167da am: 85ae219fca
am: 68f18ba505
Change-Id: I3f172309ba2c249d587987bd94d5b5b0937affd3
Diffstat (limited to 'common/arm/ihevc_intra_pred_filters_luma_mode_19_to_25.s')
-rw-r--r-- | common/arm/ihevc_intra_pred_filters_luma_mode_19_to_25.s | 13 |
1 files changed, 9 insertions, 4 deletions
diff --git a/common/arm/ihevc_intra_pred_filters_luma_mode_19_to_25.s b/common/arm/ihevc_intra_pred_filters_luma_mode_19_to_25.s index af342bf..32268a2 100644 --- a/common/arm/ihevc_intra_pred_filters_luma_mode_19_to_25.s +++ b/common/arm/ihevc_intra_pred_filters_luma_mode_19_to_25.s @@ -84,10 +84,13 @@ @r2 => *pu1_dst @r3 => dst_strd -@stack contents from #40 +@stack contents from #236 @ nt @ mode +.equ nt_offset, 236 +.equ mode_offset, 240 + .text .align 4 @@ -116,13 +119,15 @@ gai4_ihevc_ang_table_addr_2: ihevc_intra_pred_luma_mode_19_to_25_a9q: stmfd sp!, {r4-r12, r14} @stack stores the values of the arguments + vpush {d8 - d15} + sub sp, sp, #132 @ref_temp[2 * max_cu_size + 1] - ldr r4,[sp,#40] @loads nt + ldr r4,[sp,#nt_offset] @loads nt ldr r7, gai4_ihevc_ang_table_addr_1 ulbl_1: add r7,r7,pc - ldr r5,[sp,#44] @mode (19 to 25) + ldr r5,[sp,#mode_offset] @mode (19 to 25) ldr r8, gai4_ihevc_inv_ang_table_addr ulbl1: add r8,r8,pc @@ -132,7 +137,6 @@ ulbl1: sub r8, r8, #48 @gai4_ihevc_inv_ang_table[mode - 12] ldr r7, [r7] @intra_pred_ang - sub sp, sp, #132 @ref_temp[2 * max_cu_size + 1] ldr r8, [r8] @inv_ang add r6, sp, r4 @ref_temp + nt @@ -644,6 +648,7 @@ core_loop_4: end_loops: add sp, sp, #132 + vpop {d8 - d15} ldmfd sp!,{r4-r12,r15} @reload the registers from sp |