diff options
Diffstat (limited to 'common/arm/ihevc_sao_edge_offset_class0_chroma.s')
| -rw-r--r-- | common/arm/ihevc_sao_edge_offset_class0_chroma.s | 24 |
1 files changed, 18 insertions, 6 deletions
diff --git a/common/arm/ihevc_sao_edge_offset_class0_chroma.s b/common/arm/ihevc_sao_edge_offset_class0_chroma.s index 1dd56f6..e11cd4f 100644 --- a/common/arm/ihevc_sao_edge_offset_class0_chroma.s +++ b/common/arm/ihevc_sao_edge_offset_class0_chroma.s @@ -60,6 +60,15 @@ @r9 => wd @r10=> ht +.equ pu1_src_top_left_offset, 104 +.equ pu1_src_top_right_offset, 108 +.equ pu1_src_bot_left_offset, 112 +.equ pu1_avail_offset, 116 +.equ pi1_sao_u_offset, 120 +.equ pi1_sao_v_offset, 124 +.equ wd_offset, 128 +.equ ht_offset, 132 + .text .p2align 2 @@ -73,20 +82,22 @@ ihevc_sao_edge_offset_class0_chroma_a9q: STMFD sp!, {r4-r12, r14} @stack stores the values of the arguments - LDR r9,[sp,#64] @Loads wd + vpush {d8 - d15} + + LDR r9,[sp,#wd_offset] @Loads wd - LDR r4,[sp,#40] @Loads pu1_src_top_left + LDR r4,[sp,#pu1_src_top_left_offset] @Loads pu1_src_top_left ADD r11,r3,r9 @pu1_src_top[wd] - LDR r10,[sp,#68] @Loads ht + LDR r10,[sp,#ht_offset] @Loads ht VMOV.I8 Q1,#2 @const_2 = vdupq_n_s8(2) LDRH r12,[r11,#-2] @pu1_src_top[wd - 1] - LDR r7,[sp,#52] @Loads pu1_avail + LDR r7,[sp,#pu1_avail_offset] @Loads pu1_avail VMOV.I16 Q2,#0 @const_min_clip = vdupq_n_s16(0) STRH r12,[r4] @*pu1_src_top_left = pu1_src_top[wd - 1] - LDR r8,[sp,#56] @Loads pi1_sao_offset_u + LDR r8,[sp,#pi1_sao_u_offset] @Loads pi1_sao_offset_u VMOV.I16 Q3,#255 @const_max_clip = vdupq_n_u16((1 << bit_depth) - 1) SUB r4,r10,#1 @(ht - 1) @@ -96,7 +107,7 @@ ulbl1: VMOV.S8 Q4,#0xFF @au1_mask = vdupq_n_s8(-1) MUL r4,r4,r1 @(ht - 1) * src_strd - LDR r5,[sp,#60] @Loads pi1_sao_offset_v + LDR r5,[sp,#pi1_sao_v_offset] @Loads pi1_sao_offset_v VLD1.8 D11,[r8] @offset_tbl = vld1_s8(pi1_sao_offset_u) ADD r4,r4,r0 @pu1_src[(ht - 1) * src_strd] @@ -423,6 +434,7 @@ PU1_SRC_LOOP_RESIDUE: BNE PU1_SRC_LOOP_RESIDUE @If not equal jump to the pu1_src loop END_LOOPS: + vpop {d8 - d15} LDMFD sp!,{r4-r12,r15} @Reload the registers from SP |