1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
|
@/******************************************************************************
@ *
@ * Copyright (C) 2018 The Android Open Source Project
@ *
@ * Licensed under the Apache License, Version 2.0 (the "License");
@ * you may not use this file except in compliance with the License.
@ * You may obtain a copy of the License at:
@ *
@ * http://www.apache.org/licenses/LICENSE-2.0
@ *
@ * Unless required by applicable law or agreed to in writing, software
@ * distributed under the License is distributed on an "AS IS" BASIS,
@ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
@ * See the License for the specific language governing permissions and
@ * limitations under the License.
@ *
@ *****************************************************************************
@ * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
@*/
.text
.p2align 2
.global ixheaacd_covariance_matrix_calc_2_armv7
ixheaacd_covariance_matrix_calc_2_armv7:
STMFD sp!, {r4-r12, r14}
AUTO_CORR_LOOP:
STR r0 , [sp, #-4]!
LDR r4 , [r1, #-4*128]
LDR r5 , [r1, #4*(64-128)]
LDR r6 , [r1]
LDR r7 , [r1, #4*64]
MOV r4, r4, ASR #3
MOV r5, r5, ASR #3
MOV r6, r6, ASR #3
MOV r7, r7, ASR #3
SMULWT r8 , r6 , r4
SMULWT r9 , r7 , r4
SMULWT r10, r6 , r5
SMLAWT r8 , r7 , r5, r8
SMULWT r11, r4 , r4
SUB r9 , r9 , r10
SMLAWT r11, r5 , r5, r11
MOV r10, r1
ADD r12, r1, #64*4
MOV r4 , r6
MOV r5 , r7
SUB r14, r3 , #2
MOVS r14, r14, LSR #1
BEQ ENDLOOP2
LOOP2:
LDR r6 , [r10, #4*128]!
LDR r7 , [r12, #4*128]!
MOV r6, r6, ASR #3
MOV r7, r7, ASR #3
SMLAWT r8 , r6 , r4, r8
SMLAWT r9 , r7 , r4, r9
SMLAWT r8 , r7 , r5, r8
SMULWT r0 , r6 , r5
SMLAWT r11, r4 , r4, r11
SUB r9 , r9 , r0
SMLAWT r11, r5 , r5, r11
LDR r4 , [r10, #4*128]!
LDR r5 , [r12, #4*128]!
MOV r4, r4, ASR #3
MOV r5, r5, ASR #3
SUBS r14, r14, #1
SMLAWT r8 , r4 , r6, r8
SMLAWT r9 , r5 , r6, r9
SMLAWT r8 , r5 , r7, r8
SMULWT r0 , r4 , r7
SMLAWT r11, r6 , r6, r11
SUB r9 , r9 , r0
SMLAWT r11, r7 , r7, r11
BNE LOOP2
ANDS r0, r3, #0x01
BEQ ENDLOOP2
ODDLOOP:
LDR r6 , [r10, #4*128]!
LDR r7 , [r12, #4*128]!
MOV r6, r6, ASR #3
MOV r7, r7, ASR #3
SMLAWT r8 , r6 , r4, r8
SMLAWT r9 , r7 , r4, r9
SMLAWT r8 , r7 , r5, r8
SMULWT r0 , r6 , r5
SMLAWT r11, r4 , r4, r11
SUB r9 , r9 , r0
SMLAWT r11, r5 , r5, r11
ENDLOOP2:
MOV r12, r11
LDR r6 , [r1, #-8*128]
LDR r7 , [r1, #4*64-8*128]
MOV r6, r6, ASR #3
MOV r7, r7, ASR #3
SMLAWT r12, r6 , r6, r12
SUB r10, r3, #2
SMLAWT r12, r7 , r7, r12
MOV r0, r10, LSL #(2+7)
ADD r0, r0, #0x100
LDR r4 , [r1, r10, LSL #(2+7)]
LDR r5 , [r1, r0]
MOV r4, r4, ASR #3
MOV r5, r5, ASR #3
SMLAWT r11, r4, r4, r11
LDR r0 , [sp], #4
SMLAWT r11, r5, r5, r11
STR r12, [r0, #4]
STR r11, [r0]
MOV r11, r8
LDR r12, [r1, #-4*128]
LDR r14, [r1, #4*(64-128)]
MOV r12, r12, ASR #3
MOV r14, r14, ASR #3
SMLAWT r11, r12, r6, r11
ADD r10, r10, #1
LDR r12, [r1, r10, LSL#(2+7)]
SMLAWT r11, r14, r7, r11
MOV r14, r10, LSL #(2+7)
ADD r14, r14, #0x100
MOV r12, r12, ASR #3
LDR r14, [r1, r14]
SMLAWT r8 , r12, r4, r8
MOV r14, r14, ASR #3
MOV r10, r9
SMLAWT r8 , r14, r5, r8
STR r11, [r0, #16]
STR r8 , [r0, #8]
SMLAWT r9 , r14, r4 , r9
SMULWT r8 , r12, r5
LDR r14, [r1, #4*(64-128)]
SUB r9 , r9 , r8
MOV r14, r14, ASR #3
LDR r12, [r1, #-4*128]
SMLAWT r10, r14, r6 , r10
MOV r12, r12, ASR #3
SMULWT r8 , r12, r7
STR r9 , [r0, #20]
SUB r10, r10, r8
STR r10, [r0, #28]
STR r1 , [sp, #-4]!
STMFD sp!, {r0, r3}
MOVS r0 , r3 , LSR #2
MOV r12, #0
MOV r3 , #0
LDR r5 , [r1, #-8*128]
LDR r7 , [r1, #-4*128]
LDR r9 , [r1, #4*(64-256)]
LDR r11, [r1, #4*(64-128)]
MOV r5, r5, ASR #3
MOV r7, r7, ASR #3
MOV r9, r9, ASR #3
MOV r11, r11, ASR #3
BEQ ENDLOOP3
LOOP3:
LDR r4 , [r1], #4*128
LDR r8 , [r1, #4*(64-128)]
MOV r4, r4, ASR #3
MOV r8, r8, ASR #3
SMLAWT r12, r4 , r5 , r12
SMLAWT r12, r8 , r9 , r12
SMULWT r14, r4 , r9
SMLAWT r3 , r8 , r5 , r3
LDR r6 , [r1], #4*128
SUB r3 , r3 , r14
LDR r10, [r1, #4*(64-128)]
MOV r6, r6, ASR #3
MOV r10, r10, ASR #3
SMLAWT r12, r6 , r7 , r12
SMLAWT r12, r10, r11, r12
SMULWT r14, r6 , r11
SMLAWT r3 , r10, r7 , r3
LDR r5 , [r1], #4*128
SUB r3 , r3 , r14
LDR r9 , [r1, #4*(64-128)]
MOV r5, r5, ASR #3
MOV r9, r9, ASR #3
SMLAWT r12, r5 , r4 , r12
SMLAWT r12, r9 , r8 , r12
SMULWT r14, r5 , r8
SMLAWT r3 , r9 , r4 , r3
LDR r7 , [r1], #4*128
SUB r3 , r3 , r14
LDR r11, [r1, #4*(64-128)]
MOV r7, r7, ASR #3
MOV r11, r11, ASR #3
SMLAWT r12, r7 , r6 , r12
SMLAWT r12, r11, r10, r12
SMULWT r14, r7 , r10
SMLAWT r3 , r11, r6 , r3
SUBS r0 , r0 , #1
SUB r3 , r3 , r14
BNE LOOP3
ENDLOOP3:
MOV r4 , r3
LDMFD sp!, {r0, r3}
ANDS r5 , r3 , #3
BEQ ENDLOOP4
LOOP4:
LDR r6 , [r1, #-8*128]
LDR r10, [r1, #4*(64-256)]
LDR r7 , [r1], #4*128
LDR r11, [r1, #4*(64-128)]
MOV r6, r6, ASR #3
MOV r7, r7, ASR #3
MOV r10, r10, ASR #3
MOV r11, r11, ASR #3
SMLAWT r12, r7 , r6 , r12
SMLAWT r12, r11, r10, r12
SMULWT r14, r7 , r10
SMLAWT r4 , r11, r6 , r4
SUBSNE r5 , r5 , #1
SUB r4 , r4 , r14
BNE LOOP4
ENDLOOP4:
STR r12, [r0, #12]
STR r4 , [r0, #24]
LDR r1 , [sp], #4
SUBS R2, R2, #1
ADD r0, r0, #4*9
ADD r1, r1, #4
BGT AUTO_CORR_LOOP
END_OF_AUT0:
LDMFD sp!, {r4-r12, r15}
|
