diff options
Diffstat (limited to 'source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp')
| -rw-r--r-- | source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp | 92 |
1 files changed, 25 insertions, 67 deletions
diff --git a/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp b/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp index d11cc1ed1..85bc4a61c 100644 --- a/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp +++ b/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp @@ -776,10 +776,7 @@ bool EmulateInstructionARM::WriteBits32UnknownToMemory(addr_t address) { uint32_t random_data = rand(); const uint32_t addr_byte_size = GetAddressByteSize(); - if (!MemAWrite(context, address, random_data, addr_byte_size)) - return false; - - return true; + return MemAWrite(context, address, random_data, addr_byte_size); } // Write "bits (32) UNKNOWN" to register n. Helper function for many ARM @@ -3340,10 +3337,7 @@ bool EmulateInstructionARM::EmulateCMNImm(const uint32_t opcode, EmulateInstruction::Context context; context.type = EmulateInstruction::eContextImmediate; context.SetNoArgs(); - if (!WriteFlags(context, res.result, res.carry_out, res.overflow)) - return false; - - return true; + return WriteFlags(context, res.result, res.carry_out, res.overflow); } // Compare Negative (register) adds a register value and an optionally-shifted @@ -3410,10 +3404,7 @@ bool EmulateInstructionARM::EmulateCMNReg(const uint32_t opcode, EmulateInstruction::Context context; context.type = EmulateInstruction::eContextImmediate; context.SetNoArgs(); - if (!WriteFlags(context, res.result, res.carry_out, res.overflow)) - return false; - - return true; + return WriteFlags(context, res.result, res.carry_out, res.overflow); } // Compare (immediate) subtracts an immediate value from a register value. It @@ -3463,10 +3454,7 @@ bool EmulateInstructionARM::EmulateCMPImm(const uint32_t opcode, EmulateInstruction::Context context; context.type = EmulateInstruction::eContextImmediate; context.SetNoArgs(); - if (!WriteFlags(context, res.result, res.carry_out, res.overflow)) - return false; - - return true; + return WriteFlags(context, res.result, res.carry_out, res.overflow); } // Compare (register) subtracts an optionally-shifted register value from a @@ -3542,10 +3530,7 @@ bool EmulateInstructionARM::EmulateCMPReg(const uint32_t opcode, EmulateInstruction::Context context; context.type = EmulateInstruction::eContextImmediate; context.SetNoArgs(); - if (!WriteFlags(context, res.result, res.carry_out, res.overflow)) - return false; - - return true; + return WriteFlags(context, res.result, res.carry_out, res.overflow); } // Arithmetic Shift Right (immediate) shifts a register value right by an @@ -9245,11 +9230,8 @@ bool EmulateInstructionARM::EmulateRSBImm(const uint32_t opcode, context.type = EmulateInstruction::eContextImmediate; context.SetNoArgs(); - if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, - res.carry_out, res.overflow)) - return false; - - return true; + return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, + res.carry_out, res.overflow); } // Reverse Subtract (register) subtracts a register value from an optionally- @@ -9326,11 +9308,8 @@ bool EmulateInstructionARM::EmulateRSBReg(const uint32_t opcode, EmulateInstruction::Context context; context.type = EmulateInstruction::eContextImmediate; context.SetNoArgs(); - if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, - res.carry_out, res.overflow)) - return false; - - return true; + return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, + res.carry_out, res.overflow); } // Reverse Subtract with Carry (immediate) subtracts a register value and the @@ -9388,11 +9367,8 @@ bool EmulateInstructionARM::EmulateRSCImm(const uint32_t opcode, context.type = EmulateInstruction::eContextImmediate; context.SetNoArgs(); - if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, - res.carry_out, res.overflow)) - return false; - - return true; + return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, + res.carry_out, res.overflow); } // Reverse Subtract with Carry (register) subtracts a register value and the @@ -9460,11 +9436,8 @@ bool EmulateInstructionARM::EmulateRSCReg(const uint32_t opcode, EmulateInstruction::Context context; context.type = EmulateInstruction::eContextImmediate; context.SetNoArgs(); - if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, - res.carry_out, res.overflow)) - return false; - - return true; + return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, + res.carry_out, res.overflow); } // Subtract with Carry (immediate) subtracts an immediate value and the value @@ -9531,11 +9504,8 @@ bool EmulateInstructionARM::EmulateSBCImm(const uint32_t opcode, context.type = EmulateInstruction::eContextImmediate; context.SetNoArgs(); - if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, - res.carry_out, res.overflow)) - return false; - - return true; + return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, + res.carry_out, res.overflow); } // Subtract with Carry (register) subtracts an optionally-shifted register @@ -9620,11 +9590,8 @@ bool EmulateInstructionARM::EmulateSBCReg(const uint32_t opcode, EmulateInstruction::Context context; context.type = EmulateInstruction::eContextImmediate; context.SetNoArgs(); - if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, - res.carry_out, res.overflow)) - return false; - - return true; + return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, + res.carry_out, res.overflow); } // This instruction subtracts an immediate value from a register value, and @@ -9713,11 +9680,8 @@ bool EmulateInstructionARM::EmulateSUBImmThumb(const uint32_t opcode, context.type = EmulateInstruction::eContextImmediate; context.SetNoArgs(); - if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, - res.carry_out, res.overflow)) - return false; - - return true; + return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, + res.carry_out, res.overflow); } // This instruction subtracts an immediate value from a register value, and @@ -14153,11 +14117,8 @@ bool EmulateInstructionARM::BranchWritePC(const Context &context, else target = addr & 0xfffffffe; - if (!WriteRegisterUnsigned(context, eRegisterKindGeneric, - LLDB_REGNUM_GENERIC_PC, target)) - return false; - - return true; + return WriteRegisterUnsigned(context, eRegisterKindGeneric, + LLDB_REGNUM_GENERIC_PC, target); } // As a side effect, BXWritePC sets context.arg2 to eModeARM or eModeThumb by @@ -14191,11 +14152,8 @@ bool EmulateInstructionARM::BXWritePC(Context &context, uint32_t addr) { LLDB_REGNUM_GENERIC_FLAGS, m_new_inst_cpsr)) return false; } - if (!WriteRegisterUnsigned(context, eRegisterKindGeneric, - LLDB_REGNUM_GENERIC_PC, target)) - return false; - - return true; + return WriteRegisterUnsigned(context, eRegisterKindGeneric, + LLDB_REGNUM_GENERIC_PC, target); } // Dispatches to either BXWritePC or BranchWritePC based on architecture @@ -14408,14 +14366,14 @@ bool EmulateInstructionARM::EvaluateInstruction(uint32_t evaluate_options) { evaluate_options & eEmulateInstructionOptionIgnoreConditions; bool success = false; - if (m_opcode_cpsr == 0 || m_ignore_conditions == false) { + if (m_opcode_cpsr == 0 || !m_ignore_conditions) { m_opcode_cpsr = ReadRegisterUnsigned(eRegisterKindDWARF, dwarf_cpsr, 0, &success); } // Only return false if we are unable to read the CPSR if we care about // conditions - if (success == false && m_ignore_conditions == false) + if (!success && !m_ignore_conditions) return false; uint32_t orig_pc_value = 0; |