diff options
Diffstat (limited to 'source/Plugins/Process')
14 files changed, 1109 insertions, 281 deletions
diff --git a/source/Plugins/Process/Linux/NativeRegisterContextLinux.cpp b/source/Plugins/Process/Linux/NativeRegisterContextLinux.cpp index 9628b4e6f..df0a008ff 100644 --- a/source/Plugins/Process/Linux/NativeRegisterContextLinux.cpp +++ b/source/Plugins/Process/Linux/NativeRegisterContextLinux.cpp @@ -136,7 +136,7 @@ NativeRegisterContextLinux::ReadFPR() { void* buf = GetFPRBuffer(); if (!buf) - return Error("GPR buffer is NULL"); + return Error("FPR buffer is NULL"); size_t buf_size = GetFPRSize(); return DoReadFPR(buf, buf_size); @@ -147,7 +147,7 @@ NativeRegisterContextLinux::WriteFPR() { void* buf = GetFPRBuffer(); if (!buf) - return Error("GPR buffer is NULL"); + return Error("FPR buffer is NULL"); size_t buf_size = GetFPRSize(); return DoWriteFPR(buf, buf_size); diff --git a/source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.cpp b/source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.cpp index 917f13515..4be535f8a 100644 --- a/source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.cpp +++ b/source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.cpp @@ -25,6 +25,10 @@ #include "Plugins/Process/Linux/Procfs.h" #include "Plugins/Process/Utility/RegisterContextLinux_mips64.h" #include "Plugins/Process/Utility/RegisterContextLinux_mips.h" +#define NT_MIPS_MSA 0x600 +#define CONFIG5_FRE (1 << 8) +#define SR_FR (1 << 26) +#define NUM_REGISTERS 32 #include <sys/ptrace.h> #include <asm/ptrace.h> @@ -118,12 +122,13 @@ namespace gpr_sp_mips, gpr_r30_mips, gpr_ra_mips, + gpr_sr_mips, gpr_mullo_mips, gpr_mulhi_mips, - gpr_pc_mips, gpr_badvaddr_mips, - gpr_sr_mips, gpr_cause_mips, + gpr_pc_mips, + gpr_config5_mips, LLDB_INVALID_REGNUM // register sets need to end with this flag }; @@ -168,12 +173,60 @@ namespace fpr_f31_mips, fpr_fcsr_mips, fpr_fir_mips, + fpr_config5_mips, LLDB_INVALID_REGNUM // register sets need to end with this flag }; static_assert((sizeof(g_fp_regnums_mips) / sizeof(g_fp_regnums_mips[0])) - 1 == k_num_fpr_registers_mips, "g_fp_regnums_mips has wrong number of register infos"); + // mips MSA registers. + const uint32_t + g_msa_regnums_mips[] = + { + msa_w0_mips, + msa_w1_mips, + msa_w2_mips, + msa_w3_mips, + msa_w4_mips, + msa_w5_mips, + msa_w6_mips, + msa_w7_mips, + msa_w8_mips, + msa_w9_mips, + msa_w10_mips, + msa_w11_mips, + msa_w12_mips, + msa_w13_mips, + msa_w14_mips, + msa_w15_mips, + msa_w16_mips, + msa_w17_mips, + msa_w18_mips, + msa_w19_mips, + msa_w20_mips, + msa_w21_mips, + msa_w22_mips, + msa_w23_mips, + msa_w24_mips, + msa_w25_mips, + msa_w26_mips, + msa_w27_mips, + msa_w28_mips, + msa_w29_mips, + msa_w30_mips, + msa_w31_mips, + msa_fcsr_mips, + msa_fir_mips, + msa_mcsr_mips, + msa_mir_mips, + msa_config5_mips, + LLDB_INVALID_REGNUM // register sets need to end with this flag + }; + + static_assert((sizeof(g_msa_regnums_mips) / sizeof(g_msa_regnums_mips[0])) - 1 == k_num_msa_registers_mips, + "g_msa_regnums_mips has wrong number of register infos"); + // mips64 general purpose registers. const uint32_t g_gp_regnums_mips64[] = @@ -210,14 +263,13 @@ namespace gpr_sp_mips64, gpr_r30_mips64, gpr_ra_mips64, + gpr_sr_mips64, gpr_mullo_mips64, gpr_mulhi_mips64, - gpr_pc_mips64, gpr_badvaddr_mips64, - gpr_sr_mips64, gpr_cause_mips64, - gpr_ic_mips64, - gpr_dummy_mips64, + gpr_pc_mips64, + gpr_config5_mips64, LLDB_INVALID_REGNUM // register sets need to end with this flag }; @@ -262,16 +314,64 @@ namespace fpr_f31_mips64, fpr_fcsr_mips64, fpr_fir_mips64, + fpr_config5_mips64, LLDB_INVALID_REGNUM // register sets need to end with this flag }; static_assert((sizeof(g_fp_regnums_mips64) / sizeof(g_fp_regnums_mips64[0])) - 1 == k_num_fpr_registers_mips64, "g_fp_regnums_mips64 has wrong number of register infos"); + // mips64 MSA registers. + const uint32_t + g_msa_regnums_mips64[] = + { + msa_w0_mips64, + msa_w1_mips64, + msa_w2_mips64, + msa_w3_mips64, + msa_w4_mips64, + msa_w5_mips64, + msa_w6_mips64, + msa_w7_mips64, + msa_w8_mips64, + msa_w9_mips64, + msa_w10_mips64, + msa_w11_mips64, + msa_w12_mips64, + msa_w13_mips64, + msa_w14_mips64, + msa_w15_mips64, + msa_w16_mips64, + msa_w17_mips64, + msa_w18_mips64, + msa_w19_mips64, + msa_w20_mips64, + msa_w21_mips64, + msa_w22_mips64, + msa_w23_mips64, + msa_w24_mips64, + msa_w25_mips64, + msa_w26_mips64, + msa_w27_mips64, + msa_w28_mips64, + msa_w29_mips64, + msa_w30_mips64, + msa_w31_mips64, + msa_fcsr_mips64, + msa_fir_mips64, + msa_mcsr_mips64, + msa_mir_mips64, + msa_config5_mips64, + LLDB_INVALID_REGNUM // register sets need to end with this flag + }; + + static_assert((sizeof(g_msa_regnums_mips64) / sizeof(g_msa_regnums_mips64[0])) - 1 == k_num_msa_registers_mips64, + "g_msa_regnums_mips64 has wrong number of register infos"); + // Number of register sets provided by this context. enum { - k_num_register_sets = 2 + k_num_register_sets = 3 }; // Register sets for mips. @@ -279,7 +379,8 @@ namespace g_reg_sets_mips[k_num_register_sets] = { { "General Purpose Registers", "gpr", k_num_gpr_registers_mips, g_gp_regnums_mips }, - { "Floating Point Registers", "fpu", k_num_fpr_registers_mips, g_fp_regnums_mips } + { "Floating Point Registers", "fpu", k_num_fpr_registers_mips, g_fp_regnums_mips }, + { "MSA Registers", "msa", k_num_msa_registers_mips, g_msa_regnums_mips } }; // Register sets for mips64. @@ -287,7 +388,8 @@ namespace g_reg_sets_mips64[k_num_register_sets] = { { "General Purpose Registers", "gpr", k_num_gpr_registers_mips64, g_gp_regnums_mips64 }, - { "Floating Point Registers", "fpu", k_num_fpr_registers_mips64, g_fp_regnums_mips64 } + { "Floating Point Registers", "fpu", k_num_fpr_registers_mips64, g_fp_regnums_mips64 }, + { "MSA Registers", "msa", k_num_msa_registers_mips64, g_msa_regnums_mips64 }, }; } // end of anonymous namespace @@ -300,7 +402,7 @@ NativeRegisterContextLinux::CreateHostNativeRegisterContextLinux(const ArchSpec& return new NativeRegisterContextLinux_mips64(target_arch, native_thread, concrete_frame_idx); } -#define REG_CONTEXT_SIZE (GetRegisterInfoInterface ().GetGPRSize () + sizeof(FPR_mips)) +#define REG_CONTEXT_SIZE (GetRegisterInfoInterface ().GetGPRSize () + sizeof(FPR_linux_mips) + sizeof(MSA_linux_mips)) // ---------------------------------------------------------------------------- // NativeRegisterContextLinux_mips64 members. @@ -338,6 +440,8 @@ NativeRegisterContextLinux_mips64::NativeRegisterContextLinux_mips64 (const Arch m_reg_info.last_gpr = k_last_gpr_mips; m_reg_info.first_fpr = k_first_fpr_mips; m_reg_info.last_fpr = k_last_fpr_mips; + m_reg_info.first_msa = k_first_msa_mips; + m_reg_info.last_msa = k_last_msa_mips; break; case llvm::Triple::mips64: case llvm::Triple::mips64el: @@ -347,18 +451,27 @@ NativeRegisterContextLinux_mips64::NativeRegisterContextLinux_mips64 (const Arch m_reg_info.last_gpr = k_last_gpr_mips64; m_reg_info.first_fpr = k_first_fpr_mips64; m_reg_info.last_fpr = k_last_fpr_mips64; + m_reg_info.first_msa = k_first_msa_mips64; + m_reg_info.last_msa = k_last_msa_mips64; break; default: assert(false && "Unhandled target architecture."); break; } - // Clear out the FPR state. - ::memset(&m_fpr, 0, sizeof(FPR_mips)); + // Initialize m_iovec to point to the buffer and buffer size + // using the conventions of Berkeley style UIO structures, as required + // by PTRACE extensions. + m_iovec.iov_base = &m_msa; + m_iovec.iov_len = sizeof(MSA_linux_mips); // init h/w watchpoint addr map for (int index = 0;index <= MAX_NUM_WP; index++) hw_addr_map[index] = LLDB_INVALID_ADDRESS; + + ::memset(&m_gpr, 0, sizeof(GPR_linux_mips)); + ::memset(&m_fpr, 0, sizeof(FPR_linux_mips)); + ::memset(&m_msa, 0, sizeof(MSA_linux_mips)); } uint32_t @@ -460,16 +573,38 @@ NativeRegisterContextLinux_mips64::ReadRegister (const RegisterInfo *reg_info, R return error; } - if (IsFPR(reg)) + if (IsMSA(reg) && !IsMSAAvailable()) + { + error.SetErrorString ("MSA not available on this processor"); + return error; + } + + if (IsMSA(reg) || IsFPR(reg)) { - error = ReadFPR(); + uint8_t *src; + type128 int128; + + error = ReadCP1(); + if (!error.Success()) { - error.SetErrorString ("failed to read floating point register"); + error.SetErrorString ("failed to read co-processor 1 register"); return error; } - assert (reg_info->byte_offset < sizeof(FPR_mips)); - uint8_t *src = (uint8_t *)&m_fpr + reg_info->byte_offset; + + if (IsFPR(reg)) + { + assert (reg_info->byte_offset < sizeof(UserArea)); + src = (uint8_t *)&m_fpr + reg_info->byte_offset - (sizeof(m_gpr)); + } + else + { + assert (reg_info->byte_offset < sizeof(UserArea)); + src = (uint8_t *)&m_msa + reg_info->byte_offset - (sizeof(m_gpr) + sizeof(m_fpr)); + } + int128.x[0] = *(uint64_t *)src; + int128.x[1] = *(uint64_t *)(src + 8); + llvm::APInt rhs = llvm::APInt(128, 2, int128.x); switch (reg_info->byte_size) { case 4: @@ -478,6 +613,9 @@ NativeRegisterContextLinux_mips64::ReadRegister (const RegisterInfo *reg_info, R case 8: reg_value.SetUInt64(*(uint64_t *)src); break; + case 16: + reg_value.SetUInt128(rhs); + break; default: assert(false && "Unhandled data size."); error.SetErrorStringWithFormat ("unhandled byte size: %" PRIu32, reg_info->byte_size); @@ -511,10 +649,32 @@ NativeRegisterContextLinux_mips64::WriteRegister (const RegisterInfo *reg_info, if (reg_index == LLDB_INVALID_REGNUM) return Error ("no lldb regnum for %s", reg_info && reg_info->name ? reg_info->name : "<unknown register>"); - if (IsFPR(reg_index)) + if (IsMSA(reg_index) && !IsMSAAvailable()) + { + error.SetErrorString ("MSA not available on this processor"); + return error; + } + + if (IsFPR(reg_index) || IsMSA(reg_index)) { - assert (reg_info->byte_offset < sizeof(FPR_mips)); - uint8_t *dst = (uint8_t *)&m_fpr + reg_info->byte_offset; + uint8_t *dst; + const uint64_t *src; + + // Initialise the FP and MSA buffers by reading all co-processor 1 registers + ReadCP1(); + + if (IsFPR(reg_index)) + { + assert (reg_info->byte_offset < sizeof(UserArea)); + dst = (uint8_t *)&m_fpr + reg_info->byte_offset - (sizeof(m_gpr)); + } + else + { + assert (reg_info->byte_offset < sizeof(UserArea)); + dst = (uint8_t *)&m_msa + reg_info->byte_offset - (sizeof(m_gpr) + sizeof(m_fpr)); + } + llvm::APInt lhs; + llvm::APInt fail_value = llvm::APInt::getMaxValue(128); switch (reg_info->byte_size) { case 4: @@ -523,15 +683,21 @@ NativeRegisterContextLinux_mips64::WriteRegister (const RegisterInfo *reg_info, case 8: *(uint64_t *)dst = reg_value.GetAsUInt64(); break; + case 16: + lhs = reg_value.GetAsUInt128(fail_value); + src = lhs.getRawData(); + *(uint64_t *)dst = *src; + *(uint64_t *)(dst + 8) = *(src + 1); + break; default: assert(false && "Unhandled data size."); error.SetErrorStringWithFormat ("unhandled byte size: %" PRIu32, reg_info->byte_size); break; } - error = WriteFPR(); + error = WriteCP1(); if (!error.Success()) { - error.SetErrorString ("failed to write floating point register"); + error.SetErrorString ("failed to write co-processor 1 register"); return error; } } @@ -562,10 +728,10 @@ NativeRegisterContextLinux_mips64::ReadAllRegisterValues (lldb::DataBufferSP &da return error; } - error = ReadFPR(); + error = ReadCP1(); if (!error.Success()) { - error.SetErrorString ("ReadFPR() failed"); + error.SetErrorString ("ReadCP1() failed"); return error; } @@ -576,10 +742,13 @@ NativeRegisterContextLinux_mips64::ReadAllRegisterValues (lldb::DataBufferSP &da return error; } - ::memcpy (dst, &m_gpr_mips64, GetRegisterInfoInterface ().GetGPRSize ()); + ::memcpy (dst, &m_gpr, GetRegisterInfoInterface ().GetGPRSize ()); dst += GetRegisterInfoInterface ().GetGPRSize (); - ::memcpy (dst, &m_fpr, sizeof(FPR_mips)); + ::memcpy (dst, &m_fpr, GetFPRSize ()); + dst += GetFPRSize (); + + ::memcpy (dst, &m_msa, sizeof(MSA_linux_mips)); return error; } @@ -608,10 +777,14 @@ NativeRegisterContextLinux_mips64::WriteAllRegisterValues (const lldb::DataBuffe error.SetErrorStringWithFormat ("NativeRegisterContextLinux_mips64::%s DataBuffer::GetBytes() returned a null pointer", __FUNCTION__); return error; } - ::memcpy (&m_gpr_mips64, src, GetRegisterInfoInterface ().GetGPRSize ()); + + ::memcpy (&m_gpr, src, GetRegisterInfoInterface ().GetGPRSize ()); src += GetRegisterInfoInterface ().GetGPRSize (); - ::memcpy (&m_fpr, src, sizeof(FPR_mips)); + ::memcpy (&m_fpr, src, GetFPRSize ()); + src += GetFPRSize (); + + ::memcpy (&m_msa, src, sizeof(MSA_linux_mips)); error = WriteGPR(); if (!error.Success()) @@ -620,10 +793,10 @@ NativeRegisterContextLinux_mips64::WriteAllRegisterValues (const lldb::DataBuffe return error; } - error = WriteFPR(); + error = WriteCP1(); if (!error.Success()) { - error.SetErrorStringWithFormat ("NativeRegisterContextLinux_mips64::%s WriteFPR() failed", __FUNCTION__); + error.SetErrorStringWithFormat ("NativeRegisterContextLinux_mips64::%s WriteCP1() failed", __FUNCTION__); return error; } @@ -631,22 +804,47 @@ NativeRegisterContextLinux_mips64::WriteAllRegisterValues (const lldb::DataBuffe } Error -NativeRegisterContextLinux_mips64::ReadFPR() +NativeRegisterContextLinux_mips64::ReadCP1() { - void* buf = GetFPRBuffer(); - if (!buf) - return Error("FPR buffer is NULL"); + Error error; + + uint8_t *src, *dst; - Error error = NativeRegisterContextLinux::ReadFPR(); + lldb::ByteOrder byte_order = GetByteOrder(); - if (IsFR0()) + uint32_t IsBigEndian = (byte_order == lldb::eByteOrderBig); + + if (IsMSAAvailable()) { - for (int i = 0; i < 16; i++) + error = NativeRegisterContextLinux::ReadRegisterSet(&m_iovec, sizeof(MSA_linux_mips), NT_MIPS_MSA); + src = (uint8_t *)&m_msa + (IsBigEndian * 8); + dst = (uint8_t *)&m_fpr; + for ( int i = 0; i < NUM_REGISTERS; i++) + { + // Copy fp values from msa buffer fetched via ptrace + *(uint64_t *) dst = *(uint64_t *) src; + src = src + 16; + dst = dst + 8; + } + m_fpr.fir = m_msa.fir; + m_fpr.fcsr = m_msa.fcsr; + m_fpr.config5 = m_msa.config5; + } + else + { + error = NativeRegisterContextLinux::ReadFPR(); + } + + if (IsFR0() || IsFRE()) + { + src = (uint8_t *)&m_fpr + 4 + (IsBigEndian * 4); + dst = (uint8_t *)&m_fpr + 8 + (IsBigEndian * 4); + for (int i = 0; i < (NUM_REGISTERS / 2); i++) { // copy odd single from top of neighbouring even double - uint8_t * src = (uint8_t *)buf + 4 + (i * 16); - uint8_t * dst = (uint8_t *)buf + 8 + (i * 16); *(uint32_t *) dst = *(uint32_t *) src; + src = src + 16; + dst = dst + 16; } } @@ -654,37 +852,77 @@ NativeRegisterContextLinux_mips64::ReadFPR() } Error -NativeRegisterContextLinux_mips64::WriteFPR() +NativeRegisterContextLinux_mips64::WriteCP1() { - void* buf = GetFPRBuffer(); - if (!buf) - return Error("FPR buffer is NULL"); + Error error; + + uint8_t *src, *dst; + + lldb::ByteOrder byte_order = GetByteOrder(); + + uint32_t IsBigEndian = (byte_order == lldb::eByteOrderBig); - if (IsFR0()) + if (IsFR0() || IsFRE()) { - for (int i = 0; i < 16; i++) - { + src = (uint8_t *)&m_fpr + 8 + (IsBigEndian * 4); + dst = (uint8_t *)&m_fpr + 4 + (IsBigEndian * 4); + for (int i = 0; i < (NUM_REGISTERS / 2); i++) + { // copy odd single to top of neighbouring even double - uint8_t * src = (uint8_t *)buf + 8 + (i * 16); - uint8_t * dst = (uint8_t *)buf + 4 + (i * 16); *(uint32_t *) dst = *(uint32_t *) src; - } + src = src + 16; + dst = dst + 16; + } + } + + if (IsMSAAvailable()) + { + dst = (uint8_t *)&m_msa + (IsBigEndian * 8); + src = (uint8_t *)&m_fpr; + for (int i = 0; i < NUM_REGISTERS; i++) + { + // Copy fp values to msa buffer for ptrace + *(uint64_t *) dst = *(uint64_t *) src; + dst = dst + 16; + src = src + 8; + } + m_msa.fir = m_fpr.fir; + m_msa.fcsr = m_fpr.fcsr; + m_msa.config5 = m_fpr.config5; + error = NativeRegisterContextLinux::WriteRegisterSet(&m_iovec, sizeof(MSA_linux_mips), NT_MIPS_MSA); + } + else + { + error = NativeRegisterContextLinux::WriteFPR(); } - return NativeRegisterContextLinux::WriteFPR(); + return error; } bool NativeRegisterContextLinux_mips64::IsFR0() { - const RegisterInfo *const reg_info_p = GetRegisterInfoAtIndex (36); // Status Register is at index 36 of the register array + const RegisterInfo *const reg_info_p = GetRegisterInfoAtIndex (gpr_sr_mips64); RegisterValue reg_value; ReadRegister (reg_info_p, reg_value); uint64_t value = reg_value.GetAsUInt64(); - return (!(value & 0x4000000)); + return (!(value & SR_FR)); +} + +bool +NativeRegisterContextLinux_mips64::IsFRE() +{ + const RegisterInfo *const reg_info_p = GetRegisterInfoAtIndex (gpr_config5_mips64); + + RegisterValue reg_value; + ReadRegister (reg_info_p, reg_value); + + uint64_t config5 = reg_value.GetAsUInt64(); + + return (config5 & CONFIG5_FRE); } bool @@ -869,6 +1107,25 @@ GetVacantWatchIndex (struct pt_watch_regs *regs, lldb::addr_t addr, uint32_t siz return 0; } +bool +NativeRegisterContextLinux_mips64::IsMSA(uint32_t reg_index) const +{ + return (m_reg_info.first_msa <= reg_index && reg_index <= m_reg_info.last_msa); +} + +bool +NativeRegisterContextLinux_mips64::IsMSAAvailable() +{ + Error error = NativeRegisterContextLinux::ReadRegisterSet(&m_msa, sizeof(MSA_linux_mips), NT_MIPS_MSA); + + if (error.Success() && m_msa.mir) + { + return true; + } + + return false; +} + Error NativeRegisterContextLinux_mips64::IsWatchpointHit (uint32_t wp_index, bool &is_hit) { @@ -1028,13 +1285,14 @@ NativeRegisterContextLinux_mips64::DoReadRegisterValue(uint32_t offset, uint32_t size, RegisterValue &value) { - elf_gregset_t regs; + GPR_linux_mips regs; + ::memset(®s, 0, sizeof(GPR_linux_mips)); Error error = NativeProcessLinux::PtraceWrapper(PTRACE_GETREGS, m_thread.GetID(), NULL, ®s, sizeof regs); if (error.Success()) { lldb_private::ArchSpec arch; if (m_thread.GetProcess()->GetArchitecture(arch)) - value.SetBytes((void *)(((unsigned char *)(regs)) + offset), 8, arch.GetByteOrder()); + value.SetBytes((void *)(((unsigned char *)(®s)) + offset), 8, arch.GetByteOrder()); else error.SetErrorString("failed to get architecture"); } diff --git a/source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.h b/source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.h index 9a2e89f5b..9f21bef25 100644 --- a/source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.h +++ b/source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.h @@ -13,8 +13,8 @@ #define lldb_NativeRegisterContextLinux_mips64_h #include "Plugins/Process/Linux/NativeRegisterContextLinux.h" -#include "Plugins/Process/Utility/RegisterContext_mips64.h" -#include "Plugins/Process/Utility/lldb-mips64-register-enums.h" +#include "Plugins/Process/Utility/RegisterContext_mips.h" +#include "Plugins/Process/Utility/lldb-mips-linux-register-enums.h" #define MAX_NUM_WP 8 @@ -52,10 +52,10 @@ namespace process_linux { WriteAllRegisterValues (const lldb::DataBufferSP &data_sp) override; Error - ReadFPR() override; + ReadCP1(); Error - WriteFPR() override; + WriteCP1(); Error IsWatchpointHit (uint32_t wp_index, bool &is_hit) override; @@ -108,16 +108,25 @@ namespace process_linux { IsFR0(); bool + IsFRE(); + + bool IsFPR(uint32_t reg_index) const; + bool + IsMSA(uint32_t reg_index) const; + + bool + IsMSAAvailable(); + void* - GetGPRBuffer() override { return &m_gpr_mips64; } + GetGPRBuffer() override { return &m_gpr; } void* GetFPRBuffer() override { return &m_fpr; } size_t - GetFPRSize() override { return sizeof(FPR_mips); } + GetFPRSize() override { return sizeof(FPR_linux_mips); } private: // Info about register ranges. @@ -130,15 +139,21 @@ namespace process_linux { uint32_t last_gpr; uint32_t first_fpr; uint32_t last_fpr; + uint32_t first_msa; + uint32_t last_msa; }; RegInfo m_reg_info; - uint64_t m_gpr_mips64[k_num_gpr_registers_mips64]; + GPR_linux_mips m_gpr; - FPR_mips m_fpr; + FPR_linux_mips m_fpr; + + MSA_linux_mips m_msa; lldb::addr_t hw_addr_map[MAX_NUM_WP]; + + IOVEC_mips m_iovec; }; } // namespace process_linux diff --git a/source/Plugins/Process/Utility/RegisterContextFreeBSD_mips64.cpp b/source/Plugins/Process/Utility/RegisterContextFreeBSD_mips64.cpp index c31b0ee7d..53fa4169b 100644 --- a/source/Plugins/Process/Utility/RegisterContextFreeBSD_mips64.cpp +++ b/source/Plugins/Process/Utility/RegisterContextFreeBSD_mips64.cpp @@ -57,7 +57,7 @@ typedef struct _GPR uint64_t pc; uint64_t ic; uint64_t dummy; -} GPR; +} GPR_freebsd_mips; //--------------------------------------------------------------------------- // Include RegisterInfos_mips64 to declare our g_register_infos_mips64 structure. @@ -74,7 +74,7 @@ RegisterContextFreeBSD_mips64::RegisterContextFreeBSD_mips64(const ArchSpec &tar size_t RegisterContextFreeBSD_mips64::GetGPRSize() const { - return sizeof(GPR); + return sizeof(GPR_freebsd_mips); } const RegisterInfo * diff --git a/source/Plugins/Process/Utility/RegisterContextLinux_mips.cpp b/source/Plugins/Process/Utility/RegisterContextLinux_mips.cpp index 948437f51..cf1e7f508 100644 --- a/source/Plugins/Process/Utility/RegisterContextLinux_mips.cpp +++ b/source/Plugins/Process/Utility/RegisterContextLinux_mips.cpp @@ -10,59 +10,17 @@ #include <vector> #include <stddef.h> -// For GDB, GCC and DWARF Register numbers #include "RegisterContextLinux_mips.h" // Internal codes for mips registers -#include "lldb-mips64-register-enums.h" -#include "RegisterContext_mips64.h" +#include "lldb-mips-linux-register-enums.h" + +// For GP and FP buffers +#include "RegisterContext_mips.h" using namespace lldb_private; using namespace lldb; -// GP registers -typedef struct _GPR -{ - uint32_t zero; - uint32_t r1; - uint32_t r2; - uint32_t r3; - uint32_t r4; - uint32_t r5; - uint32_t r6; - uint32_t r7; - uint32_t r8; - uint32_t r9; - uint32_t r10; - uint32_t r11; - uint32_t r12; - uint32_t r13; - uint32_t r14; - uint32_t r15; - uint32_t r16; - uint32_t r17; - uint32_t r18; - uint32_t r19; - uint32_t r20; - uint32_t r21; - uint32_t r22; - uint32_t r23; - uint32_t r24; - uint32_t r25; - uint32_t r26; - uint32_t r27; - uint32_t gp; - uint32_t sp; - uint32_t r30; - uint32_t ra; - uint32_t mullo; - uint32_t mulhi; - uint32_t pc; - uint32_t badvaddr; - uint32_t sr; - uint32_t cause; -} GPR; - //--------------------------------------------------------------------------- // Include RegisterInfos_mips to declare our g_register_infos_mips structure. //--------------------------------------------------------------------------- @@ -78,7 +36,7 @@ RegisterContextLinux_mips::RegisterContextLinux_mips(const ArchSpec &target_arch size_t RegisterContextLinux_mips::GetGPRSize() const { - return sizeof(GPR); + return sizeof(GPR_linux_mips); } const RegisterInfo * @@ -100,3 +58,9 @@ RegisterContextLinux_mips::GetRegisterCount () const { return static_cast<uint32_t> (sizeof (g_register_infos_mips) / sizeof (g_register_infos_mips [0])); } + +uint32_t +RegisterContextLinux_mips::GetUserRegisterCount () const +{ + return static_cast<uint32_t> (k_num_user_registers_mips); +} diff --git a/source/Plugins/Process/Utility/RegisterContextLinux_mips.h b/source/Plugins/Process/Utility/RegisterContextLinux_mips.h index 815473e76..bcc2d002c 100644 --- a/source/Plugins/Process/Utility/RegisterContextLinux_mips.h +++ b/source/Plugins/Process/Utility/RegisterContextLinux_mips.h @@ -27,6 +27,9 @@ public: uint32_t GetRegisterCount () const override; + + uint32_t + GetUserRegisterCount () const override; }; #endif diff --git a/source/Plugins/Process/Utility/RegisterContextLinux_mips64.cpp b/source/Plugins/Process/Utility/RegisterContextLinux_mips64.cpp index a762930e8..dd577034f 100644 --- a/source/Plugins/Process/Utility/RegisterContextLinux_mips64.cpp +++ b/source/Plugins/Process/Utility/RegisterContextLinux_mips64.cpp @@ -12,66 +12,24 @@ #include <vector> #include <stddef.h> -// For GDB, GCC and DWARF Register numbers #include "RegisterContextLinux_mips64.h" -// Internal codes for all mips64 registers -#include "lldb-mips64-register-enums.h" -#include "RegisterContext_mips64.h" +// For GP and FP buffers +#include "RegisterContext_mips.h" + +// Internal codes for all mips32 and mips64 registers +#include "lldb-mips-linux-register-enums.h" using namespace lldb; using namespace lldb_private; -// GP registers -typedef struct _GPR -{ - uint64_t zero; - uint64_t r1; - uint64_t r2; - uint64_t r3; - uint64_t r4; - uint64_t r5; - uint64_t r6; - uint64_t r7; - uint64_t r8; - uint64_t r9; - uint64_t r10; - uint64_t r11; - uint64_t r12; - uint64_t r13; - uint64_t r14; - uint64_t r15; - uint64_t r16; - uint64_t r17; - uint64_t r18; - uint64_t r19; - uint64_t r20; - uint64_t r21; - uint64_t r22; - uint64_t r23; - uint64_t r24; - uint64_t r25; - uint64_t r26; - uint64_t r27; - uint64_t gp; - uint64_t sp; - uint64_t r30; - uint64_t ra; - uint64_t mullo; - uint64_t mulhi; - uint64_t pc; - uint64_t badvaddr; - uint64_t sr; - uint64_t cause; - uint64_t ic; - uint64_t dummy; -} GPR; - //--------------------------------------------------------------------------- // Include RegisterInfos_mips64 to declare our g_register_infos_mips64 structure. //--------------------------------------------------------------------------- #define DECLARE_REGISTER_INFOS_MIPS64_STRUCT +#define LINUX_MIPS64 #include "RegisterInfos_mips64.h" +#undef LINUX_MIPS64 #undef DECLARE_REGISTER_INFOS_MIPS64_STRUCT //--------------------------------------------------------------------------- @@ -115,17 +73,35 @@ GetRegisterInfoCount (const ArchSpec &target_arch) } } +uint32_t +GetUserRegisterInfoCount (const ArchSpec &target_arch) +{ + switch (target_arch.GetMachine()) + { + case llvm::Triple::mips: + case llvm::Triple::mipsel: + return static_cast<uint32_t> (k_num_user_registers_mips); + case llvm::Triple::mips64el: + case llvm::Triple::mips64: + return static_cast<uint32_t> (k_num_user_registers_mips64); + default: + assert(false && "Unhandled target architecture."); + return 0; + } +} + RegisterContextLinux_mips64::RegisterContextLinux_mips64(const ArchSpec &target_arch) : lldb_private::RegisterInfoInterface(target_arch), m_register_info_p (GetRegisterInfoPtr (target_arch)), - m_register_info_count (GetRegisterInfoCount (target_arch)) + m_register_info_count (GetRegisterInfoCount (target_arch)), + m_user_register_count (GetUserRegisterInfoCount (target_arch)) { } size_t RegisterContextLinux_mips64::GetGPRSize() const { - return sizeof(GPR); + return sizeof(GPR_linux_mips); } const RegisterInfo * @@ -140,4 +116,10 @@ RegisterContextLinux_mips64::GetRegisterCount () const return m_register_info_count; } +uint32_t +RegisterContextLinux_mips64::GetUserRegisterCount () const +{ + return m_user_register_count; +} + #endif diff --git a/source/Plugins/Process/Utility/RegisterContextLinux_mips64.h b/source/Plugins/Process/Utility/RegisterContextLinux_mips64.h index 546d148eb..86c662c52 100644 --- a/source/Plugins/Process/Utility/RegisterContextLinux_mips64.h +++ b/source/Plugins/Process/Utility/RegisterContextLinux_mips64.h @@ -30,9 +30,13 @@ public: uint32_t GetRegisterCount () const override; + uint32_t + GetUserRegisterCount () const override; + private: const lldb_private::RegisterInfo *m_register_info_p; uint32_t m_register_info_count; + uint32_t m_user_register_count; }; #endif diff --git a/source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.h b/source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.h index 2a61685f1..612a03466 100644 --- a/source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.h +++ b/source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.h @@ -12,8 +12,8 @@ #include "lldb/Core/Log.h" #include "RegisterContextPOSIX.h" -#include "RegisterContext_mips64.h" -#include "lldb-mips64-register-enums.h" +#include "RegisterContext_mips.h" +#include "lldb-mips-freebsd-register-enums.h" using namespace lldb_private; diff --git a/source/Plugins/Process/Utility/RegisterContext_mips64.h b/source/Plugins/Process/Utility/RegisterContext_mips.h index 96ce2a0ac..871ad066e 100644 --- a/source/Plugins/Process/Utility/RegisterContext_mips64.h +++ b/source/Plugins/Process/Utility/RegisterContext_mips.h @@ -1,4 +1,4 @@ -//===-- RegisterContext_mips64.h --------------------------------*- C++ -*-===// +//===-- RegisterContext_mips.h --------------------------------*- C++ -*-===// // // The LLVM Compiler Infrastructure // @@ -10,6 +10,10 @@ #ifndef liblldb_RegisterContext_mips64_H_ #define liblldb_RegisterContext_mips64_H_ +#if defined(__mips64) + #define ENABLE_128_BIT_SUPPORT 1 +#endif + // GCC and DWARF Register numbers (eRegisterKindGCC & eRegisterKindDWARF) enum { @@ -46,12 +50,12 @@ enum gcc_dwarf_sp_mips, gcc_dwarf_r30_mips, gcc_dwarf_ra_mips, + gcc_dwarf_sr_mips, gcc_dwarf_lo_mips, gcc_dwarf_hi_mips, - gcc_dwarf_pc_mips, gcc_dwarf_bad_mips, - gcc_dwarf_sr_mips, gcc_dwarf_cause_mips, + gcc_dwarf_pc_mips, gcc_dwarf_f0_mips, gcc_dwarf_f1_mips, gcc_dwarf_f2_mips, @@ -86,6 +90,41 @@ enum gcc_dwarf_f31_mips, gcc_dwarf_fcsr_mips, gcc_dwarf_fir_mips, + gcc_dwarf_w0_mips, + gcc_dwarf_w1_mips, + gcc_dwarf_w2_mips, + gcc_dwarf_w3_mips, + gcc_dwarf_w4_mips, + gcc_dwarf_w5_mips, + gcc_dwarf_w6_mips, + gcc_dwarf_w7_mips, + gcc_dwarf_w8_mips, + gcc_dwarf_w9_mips, + gcc_dwarf_w10_mips, + gcc_dwarf_w11_mips, + gcc_dwarf_w12_mips, + gcc_dwarf_w13_mips, + gcc_dwarf_w14_mips, + gcc_dwarf_w15_mips, + gcc_dwarf_w16_mips, + gcc_dwarf_w17_mips, + gcc_dwarf_w18_mips, + gcc_dwarf_w19_mips, + gcc_dwarf_w20_mips, + gcc_dwarf_w21_mips, + gcc_dwarf_w22_mips, + gcc_dwarf_w23_mips, + gcc_dwarf_w24_mips, + gcc_dwarf_w25_mips, + gcc_dwarf_w26_mips, + gcc_dwarf_w27_mips, + gcc_dwarf_w28_mips, + gcc_dwarf_w29_mips, + gcc_dwarf_w30_mips, + gcc_dwarf_w31_mips, + gcc_dwarf_mcsr_mips, + gcc_dwarf_mir_mips, + gcc_dwarf_config5_mips, gcc_dwarf_ic_mips, gcc_dwarf_dummy_mips }; @@ -165,7 +204,42 @@ enum gcc_dwarf_fcsr_mips64, gcc_dwarf_fir_mips64, gcc_dwarf_ic_mips64, - gcc_dwarf_dummy_mips64 + gcc_dwarf_dummy_mips64, + gcc_dwarf_w0_mips64, + gcc_dwarf_w1_mips64, + gcc_dwarf_w2_mips64, + gcc_dwarf_w3_mips64, + gcc_dwarf_w4_mips64, + gcc_dwarf_w5_mips64, + gcc_dwarf_w6_mips64, + gcc_dwarf_w7_mips64, + gcc_dwarf_w8_mips64, + gcc_dwarf_w9_mips64, + gcc_dwarf_w10_mips64, + gcc_dwarf_w11_mips64, + gcc_dwarf_w12_mips64, + gcc_dwarf_w13_mips64, + gcc_dwarf_w14_mips64, + gcc_dwarf_w15_mips64, + gcc_dwarf_w16_mips64, + gcc_dwarf_w17_mips64, + gcc_dwarf_w18_mips64, + gcc_dwarf_w19_mips64, + gcc_dwarf_w20_mips64, + gcc_dwarf_w21_mips64, + gcc_dwarf_w22_mips64, + gcc_dwarf_w23_mips64, + gcc_dwarf_w24_mips64, + gcc_dwarf_w25_mips64, + gcc_dwarf_w26_mips64, + gcc_dwarf_w27_mips64, + gcc_dwarf_w28_mips64, + gcc_dwarf_w29_mips64, + gcc_dwarf_w30_mips64, + gcc_dwarf_w31_mips64, + gcc_dwarf_mcsr_mips64, + gcc_dwarf_mir_mips64, + gcc_dwarf_config5_mips64, }; // GDB Register numbers (eRegisterKindGDB) @@ -203,12 +277,12 @@ enum gdb_sp_mips, gdb_r30_mips, gdb_ra_mips, + gdb_sr_mips, gdb_lo_mips, gdb_hi_mips, - gdb_pc_mips, gdb_bad_mips, - gdb_sr_mips, gdb_cause_mips, + gdb_pc_mips, gdb_f0_mips, gdb_f1_mips, gdb_f2_mips, @@ -243,6 +317,41 @@ enum gdb_f31_mips, gdb_fcsr_mips, gdb_fir_mips, + gdb_w0_mips, + gdb_w1_mips, + gdb_w2_mips, + gdb_w3_mips, + gdb_w4_mips, + gdb_w5_mips, + gdb_w6_mips, + gdb_w7_mips, + gdb_w8_mips, + gdb_w9_mips, + gdb_w10_mips, + gdb_w11_mips, + gdb_w12_mips, + gdb_w13_mips, + gdb_w14_mips, + gdb_w15_mips, + gdb_w16_mips, + gdb_w17_mips, + gdb_w18_mips, + gdb_w19_mips, + gdb_w20_mips, + gdb_w21_mips, + gdb_w22_mips, + gdb_w23_mips, + gdb_w24_mips, + gdb_w25_mips, + gdb_w26_mips, + gdb_w27_mips, + gdb_w28_mips, + gdb_w29_mips, + gdb_w30_mips, + gdb_w31_mips, + gdb_mcsr_mips, + gdb_mir_mips, + gdb_config5_mips, gdb_ic_mips, gdb_dummy_mips }; @@ -322,15 +431,184 @@ enum gdb_fcsr_mips64, gdb_fir_mips64, gdb_ic_mips64, - gdb_dummy_mips64 + gdb_dummy_mips64, + gdb_w0_mips64, + gdb_w1_mips64, + gdb_w2_mips64, + gdb_w3_mips64, + gdb_w4_mips64, + gdb_w5_mips64, + gdb_w6_mips64, + gdb_w7_mips64, + gdb_w8_mips64, + gdb_w9_mips64, + gdb_w10_mips64, + gdb_w11_mips64, + gdb_w12_mips64, + gdb_w13_mips64, + gdb_w14_mips64, + gdb_w15_mips64, + gdb_w16_mips64, + gdb_w17_mips64, + gdb_w18_mips64, + gdb_w19_mips64, + gdb_w20_mips64, + gdb_w21_mips64, + gdb_w22_mips64, + gdb_w23_mips64, + gdb_w24_mips64, + gdb_w25_mips64, + gdb_w26_mips64, + gdb_w27_mips64, + gdb_w28_mips64, + gdb_w29_mips64, + gdb_w30_mips64, + gdb_w31_mips64, + gdb_mcsr_mips64, + gdb_mir_mips64, + gdb_config5_mips64, +}; + +struct IOVEC_mips +{ + void *iov_base; + size_t iov_len; +}; + +// GP registers +struct GPR_linux_mips +{ + uint64_t zero; + uint64_t r1; + uint64_t r2; + uint64_t r3; + uint64_t r4; + uint64_t r5; + uint64_t r6; + uint64_t r7; + uint64_t r8; + uint64_t r9; + uint64_t r10; + uint64_t r11; + uint64_t r12; + uint64_t r13; + uint64_t r14; + uint64_t r15; + uint64_t r16; + uint64_t r17; + uint64_t r18; + uint64_t r19; + uint64_t r20; + uint64_t r21; + uint64_t r22; + uint64_t r23; + uint64_t r24; + uint64_t r25; + uint64_t r26; + uint64_t r27; + uint64_t gp; + uint64_t sp; + uint64_t r30; + uint64_t ra; + uint64_t mullo; + uint64_t mulhi; + uint64_t pc; + uint64_t badvaddr; + uint64_t sr; + uint64_t cause; + uint64_t config5; +}; + +struct FPR_linux_mips +{ + uint64_t f0; + uint64_t f1; + uint64_t f2; + uint64_t f3; + uint64_t f4; + uint64_t f5; + uint64_t f6; + uint64_t f7; + uint64_t f8; + uint64_t f9; + uint64_t f10; + uint64_t f11; + uint64_t f12; + uint64_t f13; + uint64_t f14; + uint64_t f15; + uint64_t f16; + uint64_t f17; + uint64_t f18; + uint64_t f19; + uint64_t f20; + uint64_t f21; + uint64_t f22; + uint64_t f23; + uint64_t f24; + uint64_t f25; + uint64_t f26; + uint64_t f27; + uint64_t f28; + uint64_t f29; + uint64_t f30; + uint64_t f31; + uint32_t fcsr; + uint32_t fir; + uint32_t config5; +}; + +struct MSAReg +{ + uint8_t byte[16]; +}; + +struct MSA_linux_mips +{ + MSAReg w0; + MSAReg w1; + MSAReg w2; + MSAReg w3; + MSAReg w4; + MSAReg w5; + MSAReg w6; + MSAReg w7; + MSAReg w8; + MSAReg w9; + MSAReg w10; + MSAReg w11; + MSAReg w12; + MSAReg w13; + MSAReg w14; + MSAReg w15; + MSAReg w16; + MSAReg w17; + MSAReg w18; + MSAReg w19; + MSAReg w20; + MSAReg w21; + MSAReg w22; + MSAReg w23; + MSAReg w24; + MSAReg w25; + MSAReg w26; + MSAReg w27; + MSAReg w28; + MSAReg w29; + MSAReg w30; + MSAReg w31; + uint32_t fcsr; /* FPU control status register */ + uint32_t fir; /* FPU implementaion revision */ + uint32_t mcsr; /* MSA control status register */ + uint32_t mir; /* MSA implementation revision */ + uint32_t config5; /* Config5 register */ }; -// FP registers -struct FPR_mips +struct UserArea { - uint64_t fp_reg[32]; - uint32_t fcsr; /* FPU status register */ - uint32_t fir; /* FPU control register */ + GPR_linux_mips gpr; // General purpose registers. + FPR_linux_mips fpr; // Floating point registers. + MSA_linux_mips msa; // MSA registers. }; #endif // liblldb_RegisterContext_mips64_H_ diff --git a/source/Plugins/Process/Utility/RegisterInfos_mips.h b/source/Plugins/Process/Utility/RegisterInfos_mips.h index 0956b2ca9..83ce6f0d4 100644 --- a/source/Plugins/Process/Utility/RegisterInfos_mips.h +++ b/source/Plugins/Process/Utility/RegisterInfos_mips.h @@ -14,24 +14,35 @@ // Computes the offset of the given GPR in the user data area. #define GPR_OFFSET(regname) \ - (LLVM_EXTENSION offsetof(GPR, regname)) + (LLVM_EXTENSION offsetof(UserArea, gpr) + \ + LLVM_EXTENSION offsetof(GPR_linux_mips, regname)) // Computes the offset of the given FPR in the extended data area. #define FPR_OFFSET(regname) \ - (LLVM_EXTENSION offsetof(FPR_mips, regname)) + (LLVM_EXTENSION offsetof(UserArea, fpr) + \ + LLVM_EXTENSION offsetof(FPR_linux_mips, regname)) + +// Computes the offset of the given MSA in the extended data area. +#define MSA_OFFSET(regname) \ + (LLVM_EXTENSION offsetof(UserArea, msa) + \ + LLVM_EXTENSION offsetof(MSA_linux_mips, regname)) // Note that the size and offset will be updated by platform-specific classes. #define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4) \ - { #reg, alt, sizeof(((GPR*)NULL)->reg), GPR_OFFSET(reg), eEncodingUint, \ + { #reg, alt, sizeof(((GPR_linux_mips*)NULL)->reg) / 2, GPR_OFFSET(reg), eEncodingUint, \ eFormatHex, { kind1, kind2, kind3, kind4, gpr_##reg##_mips }, NULL, NULL } -#define DEFINE_FPR(member, reg, alt, kind1, kind2, kind3, kind4) \ - { #reg, alt, sizeof(((FPR_mips*)NULL)->member) / 2, FPR_OFFSET(member), eEncodingUint, \ +#define DEFINE_FPR(reg, alt, kind1, kind2, kind3, kind4) \ + { #reg, alt, sizeof(((FPR_linux_mips*)NULL)->reg), FPR_OFFSET(reg), eEncodingUint, \ eFormatHex, { kind1, kind2, kind3, kind4, fpr_##reg##_mips }, NULL, NULL } -#define DEFINE_FPR_INFO(member, reg, alt, kind1, kind2, kind3, kind4) \ - { #reg, alt, sizeof(((FPR_mips*)NULL)->member), FPR_OFFSET(member), eEncodingUint, \ - eFormatHex, { kind1, kind2, kind3, kind4, fpr_##reg##_mips }, NULL, NULL } +#define DEFINE_MSA(reg, alt, kind1, kind2, kind3, kind4) \ + { #reg, alt, sizeof(((MSA_linux_mips*)0)->reg), MSA_OFFSET(reg), eEncodingVector, \ + eFormatVectorOfUInt8, { kind1, kind2, kind3, kind4, msa_##reg##_mips }, NULL, NULL } + +#define DEFINE_MSA_INFO(reg, alt, kind1, kind2, kind3, kind4) \ + { #reg, alt, sizeof(((MSA_linux_mips*)0)->reg), MSA_OFFSET(reg), eEncodingUint, \ + eFormatHex, { kind1, kind2, kind3, kind4, msa_##reg##_mips }, NULL, NULL } // RegisterKind: GCC, DWARF, Generic, GDB, LLDB @@ -70,53 +81,95 @@ g_register_infos_mips[] = DEFINE_GPR (sp, "sp", gcc_dwarf_sp_mips, gcc_dwarf_sp_mips, LLDB_REGNUM_GENERIC_SP, gdb_sp_mips), DEFINE_GPR (r30, "fp", gcc_dwarf_r30_mips, gcc_dwarf_r30_mips, LLDB_REGNUM_GENERIC_FP, gdb_r30_mips), DEFINE_GPR (ra, "ra", gcc_dwarf_ra_mips, gcc_dwarf_ra_mips, LLDB_REGNUM_GENERIC_RA, gdb_ra_mips), + DEFINE_GPR (sr, "status", gcc_dwarf_sr_mips, gcc_dwarf_sr_mips, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM), DEFINE_GPR (mullo, NULL, gcc_dwarf_lo_mips, gcc_dwarf_lo_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), DEFINE_GPR (mulhi, NULL, gcc_dwarf_hi_mips, gcc_dwarf_hi_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR (pc, NULL, gcc_dwarf_pc_mips, gcc_dwarf_pc_mips, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM), DEFINE_GPR (badvaddr, NULL, gcc_dwarf_bad_mips, gcc_dwarf_bad_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR (sr, "status", gcc_dwarf_sr_mips, gcc_dwarf_sr_mips, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM), DEFINE_GPR (cause, NULL, gcc_dwarf_cause_mips, gcc_dwarf_cause_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_FPR (fp_reg[0], f0, NULL, gcc_dwarf_f0_mips, gcc_dwarf_f0_mips, LLDB_INVALID_REGNUM, gdb_f0_mips), - DEFINE_FPR (fp_reg[1], f1, NULL, gcc_dwarf_f1_mips, gcc_dwarf_f1_mips, LLDB_INVALID_REGNUM, gdb_f1_mips), - DEFINE_FPR (fp_reg[2], f2, NULL, gcc_dwarf_f2_mips, gcc_dwarf_f2_mips, LLDB_INVALID_REGNUM, gdb_f2_mips), - DEFINE_FPR (fp_reg[3], f3, NULL, gcc_dwarf_f3_mips, gcc_dwarf_f3_mips, LLDB_INVALID_REGNUM, gdb_f3_mips), - DEFINE_FPR (fp_reg[4], f4, NULL, gcc_dwarf_f4_mips, gcc_dwarf_f4_mips, LLDB_INVALID_REGNUM, gdb_f4_mips), - DEFINE_FPR (fp_reg[5], f5, NULL, gcc_dwarf_f5_mips, gcc_dwarf_f5_mips, LLDB_INVALID_REGNUM, gdb_f5_mips), - DEFINE_FPR (fp_reg[6], f6, NULL, gcc_dwarf_f6_mips, gcc_dwarf_f6_mips, LLDB_INVALID_REGNUM, gdb_f6_mips), - DEFINE_FPR (fp_reg[7], f7, NULL, gcc_dwarf_f7_mips, gcc_dwarf_f7_mips, LLDB_INVALID_REGNUM, gdb_f7_mips), - DEFINE_FPR (fp_reg[8], f8, NULL, gcc_dwarf_f8_mips, gcc_dwarf_f8_mips, LLDB_INVALID_REGNUM, gdb_f8_mips), - DEFINE_FPR (fp_reg[9], f9, NULL, gcc_dwarf_f9_mips, gcc_dwarf_f9_mips, LLDB_INVALID_REGNUM, gdb_f9_mips), - DEFINE_FPR (fp_reg[10], f10, NULL, gcc_dwarf_f10_mips, gcc_dwarf_f10_mips, LLDB_INVALID_REGNUM, gdb_f10_mips), - DEFINE_FPR (fp_reg[11], f11, NULL, gcc_dwarf_f11_mips, gcc_dwarf_f11_mips, LLDB_INVALID_REGNUM, gdb_f11_mips), - DEFINE_FPR (fp_reg[12], f12, NULL, gcc_dwarf_f12_mips, gcc_dwarf_f12_mips, LLDB_INVALID_REGNUM, gdb_f12_mips), - DEFINE_FPR (fp_reg[13], f13, NULL, gcc_dwarf_f13_mips, gcc_dwarf_f13_mips, LLDB_INVALID_REGNUM, gdb_f13_mips), - DEFINE_FPR (fp_reg[14], f14, NULL, gcc_dwarf_f14_mips, gcc_dwarf_f14_mips, LLDB_INVALID_REGNUM, gdb_f14_mips), - DEFINE_FPR (fp_reg[15], f15, NULL, gcc_dwarf_f15_mips, gcc_dwarf_f15_mips, LLDB_INVALID_REGNUM, gdb_f15_mips), - DEFINE_FPR (fp_reg[16], f16, NULL, gcc_dwarf_f16_mips, gcc_dwarf_f16_mips, LLDB_INVALID_REGNUM, gdb_f16_mips), - DEFINE_FPR (fp_reg[17], f17, NULL, gcc_dwarf_f17_mips, gcc_dwarf_f17_mips, LLDB_INVALID_REGNUM, gdb_f17_mips), - DEFINE_FPR (fp_reg[18], f18, NULL, gcc_dwarf_f18_mips, gcc_dwarf_f18_mips, LLDB_INVALID_REGNUM, gdb_f18_mips), - DEFINE_FPR (fp_reg[19], f19, NULL, gcc_dwarf_f19_mips, gcc_dwarf_f19_mips, LLDB_INVALID_REGNUM, gdb_f19_mips), - DEFINE_FPR (fp_reg[20], f20, NULL, gcc_dwarf_f20_mips, gcc_dwarf_f20_mips, LLDB_INVALID_REGNUM, gdb_f20_mips), - DEFINE_FPR (fp_reg[21], f21, NULL, gcc_dwarf_f21_mips, gcc_dwarf_f21_mips, LLDB_INVALID_REGNUM, gdb_f21_mips), - DEFINE_FPR (fp_reg[22], f22, NULL, gcc_dwarf_f22_mips, gcc_dwarf_f22_mips, LLDB_INVALID_REGNUM, gdb_f22_mips), - DEFINE_FPR (fp_reg[23], f23, NULL, gcc_dwarf_f23_mips, gcc_dwarf_f23_mips, LLDB_INVALID_REGNUM, gdb_f23_mips), - DEFINE_FPR (fp_reg[24], f24, NULL, gcc_dwarf_f24_mips, gcc_dwarf_f24_mips, LLDB_INVALID_REGNUM, gdb_f24_mips), - DEFINE_FPR (fp_reg[25], f25, NULL, gcc_dwarf_f25_mips, gcc_dwarf_f25_mips, LLDB_INVALID_REGNUM, gdb_f25_mips), - DEFINE_FPR (fp_reg[26], f26, NULL, gcc_dwarf_f26_mips, gcc_dwarf_f26_mips, LLDB_INVALID_REGNUM, gdb_f26_mips), - DEFINE_FPR (fp_reg[27], f27, NULL, gcc_dwarf_f27_mips, gcc_dwarf_f27_mips, LLDB_INVALID_REGNUM, gdb_f27_mips), - DEFINE_FPR (fp_reg[28], f28, NULL, gcc_dwarf_f28_mips, gcc_dwarf_f28_mips, LLDB_INVALID_REGNUM, gdb_f28_mips), - DEFINE_FPR (fp_reg[29], f29, NULL, gcc_dwarf_f29_mips, gcc_dwarf_f29_mips, LLDB_INVALID_REGNUM, gdb_f29_mips), - DEFINE_FPR (fp_reg[30], f30, NULL, gcc_dwarf_f30_mips, gcc_dwarf_f30_mips, LLDB_INVALID_REGNUM, gdb_f30_mips), - DEFINE_FPR (fp_reg[31], f31, NULL, gcc_dwarf_f31_mips, gcc_dwarf_f31_mips, LLDB_INVALID_REGNUM, gdb_f31_mips), - DEFINE_FPR_INFO (fcsr, fcsr, NULL, gcc_dwarf_fcsr_mips, gcc_dwarf_fcsr_mips, LLDB_INVALID_REGNUM, gdb_fcsr_mips), - DEFINE_FPR_INFO (fir, fir, NULL, gcc_dwarf_fir_mips, gcc_dwarf_fir_mips, LLDB_INVALID_REGNUM, gdb_fir_mips) + DEFINE_GPR (pc, NULL, gcc_dwarf_pc_mips, gcc_dwarf_pc_mips, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM), + DEFINE_GPR (config5, NULL, gcc_dwarf_config5_mips, gcc_dwarf_config5_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f0, NULL, gcc_dwarf_f0_mips, gcc_dwarf_f0_mips, LLDB_INVALID_REGNUM, gdb_f0_mips), + DEFINE_FPR (f1, NULL, gcc_dwarf_f1_mips, gcc_dwarf_f1_mips, LLDB_INVALID_REGNUM, gdb_f1_mips), + DEFINE_FPR (f2, NULL, gcc_dwarf_f2_mips, gcc_dwarf_f2_mips, LLDB_INVALID_REGNUM, gdb_f2_mips), + DEFINE_FPR (f3, NULL, gcc_dwarf_f3_mips, gcc_dwarf_f3_mips, LLDB_INVALID_REGNUM, gdb_f3_mips), + DEFINE_FPR (f4, NULL, gcc_dwarf_f4_mips, gcc_dwarf_f4_mips, LLDB_INVALID_REGNUM, gdb_f4_mips), + DEFINE_FPR (f5, NULL, gcc_dwarf_f5_mips, gcc_dwarf_f5_mips, LLDB_INVALID_REGNUM, gdb_f5_mips), + DEFINE_FPR (f6, NULL, gcc_dwarf_f6_mips, gcc_dwarf_f6_mips, LLDB_INVALID_REGNUM, gdb_f6_mips), + DEFINE_FPR (f7, NULL, gcc_dwarf_f7_mips, gcc_dwarf_f7_mips, LLDB_INVALID_REGNUM, gdb_f7_mips), + DEFINE_FPR (f8, NULL, gcc_dwarf_f8_mips, gcc_dwarf_f8_mips, LLDB_INVALID_REGNUM, gdb_f8_mips), + DEFINE_FPR (f9, NULL, gcc_dwarf_f9_mips, gcc_dwarf_f9_mips, LLDB_INVALID_REGNUM, gdb_f9_mips), + DEFINE_FPR (f10, NULL, gcc_dwarf_f10_mips, gcc_dwarf_f10_mips, LLDB_INVALID_REGNUM, gdb_f10_mips), + DEFINE_FPR (f11, NULL, gcc_dwarf_f11_mips, gcc_dwarf_f11_mips, LLDB_INVALID_REGNUM, gdb_f11_mips), + DEFINE_FPR (f12, NULL, gcc_dwarf_f12_mips, gcc_dwarf_f12_mips, LLDB_INVALID_REGNUM, gdb_f12_mips), + DEFINE_FPR (f13, NULL, gcc_dwarf_f13_mips, gcc_dwarf_f13_mips, LLDB_INVALID_REGNUM, gdb_f13_mips), + DEFINE_FPR (f14, NULL, gcc_dwarf_f14_mips, gcc_dwarf_f14_mips, LLDB_INVALID_REGNUM, gdb_f14_mips), + DEFINE_FPR (f15, NULL, gcc_dwarf_f15_mips, gcc_dwarf_f15_mips, LLDB_INVALID_REGNUM, gdb_f15_mips), + DEFINE_FPR (f16, NULL, gcc_dwarf_f16_mips, gcc_dwarf_f16_mips, LLDB_INVALID_REGNUM, gdb_f16_mips), + DEFINE_FPR (f17, NULL, gcc_dwarf_f17_mips, gcc_dwarf_f17_mips, LLDB_INVALID_REGNUM, gdb_f17_mips), + DEFINE_FPR (f18, NULL, gcc_dwarf_f18_mips, gcc_dwarf_f18_mips, LLDB_INVALID_REGNUM, gdb_f18_mips), + DEFINE_FPR (f19, NULL, gcc_dwarf_f19_mips, gcc_dwarf_f19_mips, LLDB_INVALID_REGNUM, gdb_f19_mips), + DEFINE_FPR (f20, NULL, gcc_dwarf_f20_mips, gcc_dwarf_f20_mips, LLDB_INVALID_REGNUM, gdb_f20_mips), + DEFINE_FPR (f21, NULL, gcc_dwarf_f21_mips, gcc_dwarf_f21_mips, LLDB_INVALID_REGNUM, gdb_f21_mips), + DEFINE_FPR (f22, NULL, gcc_dwarf_f22_mips, gcc_dwarf_f22_mips, LLDB_INVALID_REGNUM, gdb_f22_mips), + DEFINE_FPR (f23, NULL, gcc_dwarf_f23_mips, gcc_dwarf_f23_mips, LLDB_INVALID_REGNUM, gdb_f23_mips), + DEFINE_FPR (f24, NULL, gcc_dwarf_f24_mips, gcc_dwarf_f24_mips, LLDB_INVALID_REGNUM, gdb_f24_mips), + DEFINE_FPR (f25, NULL, gcc_dwarf_f25_mips, gcc_dwarf_f25_mips, LLDB_INVALID_REGNUM, gdb_f25_mips), + DEFINE_FPR (f26, NULL, gcc_dwarf_f26_mips, gcc_dwarf_f26_mips, LLDB_INVALID_REGNUM, gdb_f26_mips), + DEFINE_FPR (f27, NULL, gcc_dwarf_f27_mips, gcc_dwarf_f27_mips, LLDB_INVALID_REGNUM, gdb_f27_mips), + DEFINE_FPR (f28, NULL, gcc_dwarf_f28_mips, gcc_dwarf_f28_mips, LLDB_INVALID_REGNUM, gdb_f28_mips), + DEFINE_FPR (f29, NULL, gcc_dwarf_f29_mips, gcc_dwarf_f29_mips, LLDB_INVALID_REGNUM, gdb_f29_mips), + DEFINE_FPR (f30, NULL, gcc_dwarf_f30_mips, gcc_dwarf_f30_mips, LLDB_INVALID_REGNUM, gdb_f30_mips), + DEFINE_FPR (f31, NULL, gcc_dwarf_f31_mips, gcc_dwarf_f31_mips, LLDB_INVALID_REGNUM, gdb_f31_mips), + DEFINE_FPR (fcsr, NULL, gcc_dwarf_fcsr_mips, gcc_dwarf_fcsr_mips, LLDB_INVALID_REGNUM, gdb_fcsr_mips), + DEFINE_FPR (fir, NULL, gcc_dwarf_fir_mips, gcc_dwarf_fir_mips, LLDB_INVALID_REGNUM, gdb_fir_mips), + DEFINE_FPR (config5, NULL, gcc_dwarf_config5_mips, gcc_dwarf_config5_mips, LLDB_INVALID_REGNUM, gdb_config5_mips), + DEFINE_MSA (w0, NULL, gcc_dwarf_w0_mips, gcc_dwarf_w0_mips, LLDB_INVALID_REGNUM, gdb_w0_mips), + DEFINE_MSA (w1, NULL, gcc_dwarf_w1_mips, gcc_dwarf_w1_mips, LLDB_INVALID_REGNUM, gdb_w1_mips), + DEFINE_MSA (w2, NULL, gcc_dwarf_w2_mips, gcc_dwarf_w2_mips, LLDB_INVALID_REGNUM, gdb_w2_mips), + DEFINE_MSA (w3, NULL, gcc_dwarf_w3_mips, gcc_dwarf_w3_mips, LLDB_INVALID_REGNUM, gdb_w3_mips), + DEFINE_MSA (w4, NULL, gcc_dwarf_w4_mips, gcc_dwarf_w4_mips, LLDB_INVALID_REGNUM, gdb_w4_mips), + DEFINE_MSA (w5, NULL, gcc_dwarf_w5_mips, gcc_dwarf_w5_mips, LLDB_INVALID_REGNUM, gdb_w5_mips), + DEFINE_MSA (w6, NULL, gcc_dwarf_w6_mips, gcc_dwarf_w6_mips, LLDB_INVALID_REGNUM, gdb_w6_mips), + DEFINE_MSA (w7, NULL, gcc_dwarf_w7_mips, gcc_dwarf_w7_mips, LLDB_INVALID_REGNUM, gdb_w7_mips), + DEFINE_MSA (w8, NULL, gcc_dwarf_w8_mips, gcc_dwarf_w8_mips, LLDB_INVALID_REGNUM, gdb_w8_mips), + DEFINE_MSA (w9, NULL, gcc_dwarf_w9_mips, gcc_dwarf_w9_mips, LLDB_INVALID_REGNUM, gdb_w9_mips), + DEFINE_MSA (w10, NULL, gcc_dwarf_w10_mips, gcc_dwarf_w10_mips, LLDB_INVALID_REGNUM, gdb_w10_mips), + DEFINE_MSA (w11, NULL, gcc_dwarf_w11_mips, gcc_dwarf_w11_mips, LLDB_INVALID_REGNUM, gdb_w11_mips), + DEFINE_MSA (w12, NULL, gcc_dwarf_w12_mips, gcc_dwarf_w12_mips, LLDB_INVALID_REGNUM, gdb_w12_mips), + DEFINE_MSA (w13, NULL, gcc_dwarf_w13_mips, gcc_dwarf_w13_mips, LLDB_INVALID_REGNUM, gdb_w13_mips), + DEFINE_MSA (w14, NULL, gcc_dwarf_w14_mips, gcc_dwarf_w14_mips, LLDB_INVALID_REGNUM, gdb_w14_mips), + DEFINE_MSA (w15, NULL, gcc_dwarf_w15_mips, gcc_dwarf_w15_mips, LLDB_INVALID_REGNUM, gdb_w15_mips), + DEFINE_MSA (w16, NULL, gcc_dwarf_w16_mips, gcc_dwarf_w16_mips, LLDB_INVALID_REGNUM, gdb_w16_mips), + DEFINE_MSA (w17, NULL, gcc_dwarf_w17_mips, gcc_dwarf_w17_mips, LLDB_INVALID_REGNUM, gdb_w17_mips), + DEFINE_MSA (w18, NULL, gcc_dwarf_w18_mips, gcc_dwarf_w18_mips, LLDB_INVALID_REGNUM, gdb_w18_mips), + DEFINE_MSA (w19, NULL, gcc_dwarf_w19_mips, gcc_dwarf_w19_mips, LLDB_INVALID_REGNUM, gdb_w19_mips), + DEFINE_MSA (w20, NULL, gcc_dwarf_w10_mips, gcc_dwarf_w20_mips, LLDB_INVALID_REGNUM, gdb_w20_mips), + DEFINE_MSA (w21, NULL, gcc_dwarf_w21_mips, gcc_dwarf_w21_mips, LLDB_INVALID_REGNUM, gdb_w21_mips), + DEFINE_MSA (w22, NULL, gcc_dwarf_w22_mips, gcc_dwarf_w22_mips, LLDB_INVALID_REGNUM, gdb_w22_mips), + DEFINE_MSA (w23, NULL, gcc_dwarf_w23_mips, gcc_dwarf_w23_mips, LLDB_INVALID_REGNUM, gdb_w23_mips), + DEFINE_MSA (w24, NULL, gcc_dwarf_w24_mips, gcc_dwarf_w24_mips, LLDB_INVALID_REGNUM, gdb_w24_mips), + DEFINE_MSA (w25, NULL, gcc_dwarf_w25_mips, gcc_dwarf_w25_mips, LLDB_INVALID_REGNUM, gdb_w25_mips), + DEFINE_MSA (w26, NULL, gcc_dwarf_w26_mips, gcc_dwarf_w26_mips, LLDB_INVALID_REGNUM, gdb_w26_mips), + DEFINE_MSA (w27, NULL, gcc_dwarf_w27_mips, gcc_dwarf_w27_mips, LLDB_INVALID_REGNUM, gdb_w27_mips), + DEFINE_MSA (w28, NULL, gcc_dwarf_w28_mips, gcc_dwarf_w28_mips, LLDB_INVALID_REGNUM, gdb_w28_mips), + DEFINE_MSA (w29, NULL, gcc_dwarf_w29_mips, gcc_dwarf_w29_mips, LLDB_INVALID_REGNUM, gdb_w29_mips), + DEFINE_MSA (w30, NULL, gcc_dwarf_w30_mips, gcc_dwarf_w30_mips, LLDB_INVALID_REGNUM, gdb_w30_mips), + DEFINE_MSA (w31, NULL, gcc_dwarf_w31_mips, gcc_dwarf_w31_mips, LLDB_INVALID_REGNUM, gdb_w31_mips), + DEFINE_MSA_INFO (mcsr, NULL, gcc_dwarf_mcsr_mips, gcc_dwarf_mcsr_mips, LLDB_INVALID_REGNUM, gdb_mcsr_mips), + DEFINE_MSA_INFO (mir, NULL, gcc_dwarf_mir_mips, gcc_dwarf_mir_mips, LLDB_INVALID_REGNUM, gdb_mir_mips), + DEFINE_MSA_INFO (fcsr, NULL, gcc_dwarf_fcsr_mips, gcc_dwarf_fcsr_mips, LLDB_INVALID_REGNUM, gdb_fcsr_mips), + DEFINE_MSA_INFO (fir, NULL, gcc_dwarf_fir_mips, gcc_dwarf_fir_mips, LLDB_INVALID_REGNUM, gdb_fir_mips), + DEFINE_MSA_INFO (config5, NULL, gcc_dwarf_config5_mips, gcc_dwarf_config5_mips, LLDB_INVALID_REGNUM, gdb_config5_mips) }; static_assert((sizeof(g_register_infos_mips) / sizeof(g_register_infos_mips[0])) == k_num_registers_mips, "g_register_infos_mips has wrong number of register infos"); #undef GPR_OFFSET #undef FPR_OFFSET +#undef MSA_OFFSET #undef DEFINE_GPR #undef DEFINE_FPR +#undef DEFINE_MSA +#undef DEFINE_MSA_INFO #endif // DECLARE_REGISTER_INFOS_MIPS_STRUCT diff --git a/source/Plugins/Process/Utility/RegisterInfos_mips64.h b/source/Plugins/Process/Utility/RegisterInfos_mips64.h index e03aea4e3..101842e66 100644 --- a/source/Plugins/Process/Utility/RegisterInfos_mips64.h +++ b/source/Plugins/Process/Utility/RegisterInfos_mips64.h @@ -13,28 +13,59 @@ #ifdef DECLARE_REGISTER_INFOS_MIPS64_STRUCT // Computes the offset of the given GPR in the user data area. -#define GPR_OFFSET(regname) \ - (LLVM_EXTENSION offsetof(GPR, regname)) +#ifdef LINUX_MIPS64 + #define GPR_OFFSET(regname) \ + (LLVM_EXTENSION offsetof(UserArea, gpr) + \ + LLVM_EXTENSION offsetof(GPR_linux_mips, regname)) +#else + #define GPR_OFFSET(regname) \ + (LLVM_EXTENSION offsetof(GPR_freebsd_mips, regname)) +#endif // Computes the offset of the given FPR in the extended data area. #define FPR_OFFSET(regname) \ - LLVM_EXTENSION offsetof(FPR_mips, regname) \ + (LLVM_EXTENSION offsetof(UserArea, fpr) + \ + LLVM_EXTENSION offsetof(FPR_linux_mips, regname)) + +// Computes the offset of the given MSA in the extended data area. +#define MSA_OFFSET(regname) \ + (LLVM_EXTENSION offsetof(UserArea, msa) + \ + LLVM_EXTENSION offsetof(MSA_linux_mips, regname)) // RegisterKind: GCC, DWARF, Generic, GDB, LLDB // Note that the size and offset will be updated by platform-specific classes. -#define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4) \ - { #reg, alt, sizeof(((GPR*)0)->reg), GPR_OFFSET(reg), eEncodingUint, \ +#ifdef LINUX_MIPS64 + #define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4) \ + { #reg, alt, sizeof(((GPR_linux_mips*)0)->reg), GPR_OFFSET(reg), eEncodingUint, \ + eFormatHex, { kind1, kind2, kind3, kind4, gpr_##reg##_mips64 }, NULL, NULL } +#else + #define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4) \ + { #reg, alt, sizeof(((GPR_freebsd_mips*)0)->reg), GPR_OFFSET(reg), eEncodingUint, \ + eFormatHex, { kind1, kind2, kind3, kind4, gpr_##reg##_mips64 }, NULL, NULL } +#endif + +#define DEFINE_GPR_INFO(reg, alt, kind1, kind2, kind3, kind4) \ + { #reg, alt, sizeof(((GPR_linux_mips*)0)->reg) / 2, GPR_OFFSET(reg), eEncodingUint, \ eFormatHex, { kind1, kind2, kind3, kind4, gpr_##reg##_mips64 }, NULL, NULL } -#define DEFINE_FPR(member, reg, alt, kind1, kind2, kind3, kind4) \ - { #reg, alt, sizeof(((FPR_mips*)0)->member), FPR_OFFSET(member), eEncodingUint, \ +#define DEFINE_FPR(reg, alt, kind1, kind2, kind3, kind4) \ + { #reg, alt, sizeof(((FPR_linux_mips*)0)->reg), FPR_OFFSET(reg), eEncodingUint, \ eFormatHex, { kind1, kind2, kind3, kind4, fpr_##reg##_mips64 }, NULL, NULL } +#define DEFINE_MSA(reg, alt, kind1, kind2, kind3, kind4) \ + { #reg, alt, sizeof(((MSA_linux_mips*)0)->reg), MSA_OFFSET(reg), eEncodingVector, \ + eFormatVectorOfUInt8, { kind1, kind2, kind3, kind4, msa_##reg##_mips64 }, NULL, NULL } + +#define DEFINE_MSA_INFO(reg, alt, kind1, kind2, kind3, kind4) \ + { #reg, alt, sizeof(((MSA_linux_mips*)0)->reg), MSA_OFFSET(reg), eEncodingUint, \ + eFormatHex, { kind1, kind2, kind3, kind4, msa_##reg##_mips64 }, NULL, NULL } + static RegisterInfo g_register_infos_mips64[] = { // General purpose registers. GCC, DWARF, Generic, GDB +#ifndef LINUX_MIPS64 DEFINE_GPR(zero, "r0", gcc_dwarf_zero_mips64, gcc_dwarf_zero_mips64, LLDB_INVALID_REGNUM, gdb_zero_mips64), DEFINE_GPR(r1, NULL, gcc_dwarf_r1_mips64, gcc_dwarf_r1_mips64, LLDB_INVALID_REGNUM, gdb_r1_mips64), DEFINE_GPR(r2, NULL, gcc_dwarf_r2_mips64, gcc_dwarf_r2_mips64, LLDB_INVALID_REGNUM, gdb_r2_mips64), @@ -67,56 +98,140 @@ g_register_infos_mips64[] = DEFINE_GPR(sp, "r29", gcc_dwarf_sp_mips64, gcc_dwarf_sp_mips64, LLDB_REGNUM_GENERIC_SP, gdb_sp_mips64), DEFINE_GPR(r30, NULL, gcc_dwarf_r30_mips64, gcc_dwarf_r30_mips64, LLDB_REGNUM_GENERIC_FP, gdb_r30_mips64), DEFINE_GPR(ra, "r31", gcc_dwarf_ra_mips64, gcc_dwarf_ra_mips64, LLDB_REGNUM_GENERIC_RA, gdb_ra_mips64), + DEFINE_GPR(sr, NULL, gcc_dwarf_sr_mips64, gcc_dwarf_sr_mips64, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM), DEFINE_GPR(mullo, NULL, gcc_dwarf_lo_mips64, gcc_dwarf_lo_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), DEFINE_GPR(mulhi, NULL, gcc_dwarf_hi_mips64, gcc_dwarf_hi_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR(pc, "pc", gcc_dwarf_pc_mips64, gcc_dwarf_pc_mips64, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM), DEFINE_GPR(badvaddr, NULL, gcc_dwarf_bad_mips64, gcc_dwarf_bad_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_GPR(sr, NULL, gcc_dwarf_sr_mips64, gcc_dwarf_sr_mips64, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM), DEFINE_GPR(cause, NULL, gcc_dwarf_cause_mips64, gcc_dwarf_cause_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(pc, "pc", gcc_dwarf_pc_mips64, gcc_dwarf_pc_mips64, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM), DEFINE_GPR(ic, NULL, gcc_dwarf_ic_mips64, gcc_dwarf_ic_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), DEFINE_GPR(dummy, NULL, gcc_dwarf_dummy_mips64, gcc_dwarf_dummy_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), +#else - DEFINE_FPR (fp_reg[0], f0, NULL, gcc_dwarf_f0_mips64, gcc_dwarf_f0_mips64, LLDB_INVALID_REGNUM, gdb_f0_mips64), - DEFINE_FPR (fp_reg[1], f1, NULL, gcc_dwarf_f1_mips64, gcc_dwarf_f1_mips64, LLDB_INVALID_REGNUM, gdb_f1_mips64), - DEFINE_FPR (fp_reg[2], f2, NULL, gcc_dwarf_f2_mips64, gcc_dwarf_f2_mips64, LLDB_INVALID_REGNUM, gdb_f2_mips64), - DEFINE_FPR (fp_reg[3], f3, NULL, gcc_dwarf_f3_mips64, gcc_dwarf_f3_mips64, LLDB_INVALID_REGNUM, gdb_f3_mips64), - DEFINE_FPR (fp_reg[4], f4, NULL, gcc_dwarf_f4_mips64, gcc_dwarf_f4_mips64, LLDB_INVALID_REGNUM, gdb_f4_mips64), - DEFINE_FPR (fp_reg[5], f5, NULL, gcc_dwarf_f5_mips64, gcc_dwarf_f5_mips64, LLDB_INVALID_REGNUM, gdb_f5_mips64), - DEFINE_FPR (fp_reg[6], f6, NULL, gcc_dwarf_f6_mips64, gcc_dwarf_f6_mips64, LLDB_INVALID_REGNUM, gdb_f6_mips64), - DEFINE_FPR (fp_reg[7], f7, NULL, gcc_dwarf_f7_mips64, gcc_dwarf_f7_mips64, LLDB_INVALID_REGNUM, gdb_f7_mips64), - DEFINE_FPR (fp_reg[8], f8, NULL, gcc_dwarf_f8_mips64, gcc_dwarf_f8_mips64, LLDB_INVALID_REGNUM, gdb_f8_mips64), - DEFINE_FPR (fp_reg[9], f9, NULL, gcc_dwarf_f9_mips64, gcc_dwarf_f9_mips64, LLDB_INVALID_REGNUM, gdb_f9_mips64), - DEFINE_FPR (fp_reg[10], f10, NULL, gcc_dwarf_f10_mips64, gcc_dwarf_f10_mips64, LLDB_INVALID_REGNUM, gdb_f10_mips64), - DEFINE_FPR (fp_reg[11], f11, NULL, gcc_dwarf_f11_mips64, gcc_dwarf_f11_mips64, LLDB_INVALID_REGNUM, gdb_f11_mips64), - DEFINE_FPR (fp_reg[12], f12, NULL, gcc_dwarf_f12_mips64, gcc_dwarf_f12_mips64, LLDB_INVALID_REGNUM, gdb_f12_mips64), - DEFINE_FPR (fp_reg[13], f13, NULL, gcc_dwarf_f13_mips64, gcc_dwarf_f13_mips64, LLDB_INVALID_REGNUM, gdb_f13_mips64), - DEFINE_FPR (fp_reg[14], f14, NULL, gcc_dwarf_f14_mips64, gcc_dwarf_f14_mips64, LLDB_INVALID_REGNUM, gdb_f14_mips64), - DEFINE_FPR (fp_reg[15], f15, NULL, gcc_dwarf_f15_mips64, gcc_dwarf_f15_mips64, LLDB_INVALID_REGNUM, gdb_f15_mips64), - DEFINE_FPR (fp_reg[16], f16, NULL, gcc_dwarf_f16_mips64, gcc_dwarf_f16_mips64, LLDB_INVALID_REGNUM, gdb_f16_mips64), - DEFINE_FPR (fp_reg[17], f17, NULL, gcc_dwarf_f17_mips64, gcc_dwarf_f17_mips64, LLDB_INVALID_REGNUM, gdb_f17_mips64), - DEFINE_FPR (fp_reg[18], f18, NULL, gcc_dwarf_f18_mips64, gcc_dwarf_f18_mips64, LLDB_INVALID_REGNUM, gdb_f18_mips64), - DEFINE_FPR (fp_reg[19], f19, NULL, gcc_dwarf_f19_mips64, gcc_dwarf_f19_mips64, LLDB_INVALID_REGNUM, gdb_f19_mips64), - DEFINE_FPR (fp_reg[20], f20, NULL, gcc_dwarf_f20_mips64, gcc_dwarf_f20_mips64, LLDB_INVALID_REGNUM, gdb_f20_mips64), - DEFINE_FPR (fp_reg[21], f21, NULL, gcc_dwarf_f21_mips64, gcc_dwarf_f21_mips64, LLDB_INVALID_REGNUM, gdb_f21_mips64), - DEFINE_FPR (fp_reg[22], f22, NULL, gcc_dwarf_f22_mips64, gcc_dwarf_f22_mips64, LLDB_INVALID_REGNUM, gdb_f22_mips64), - DEFINE_FPR (fp_reg[23], f23, NULL, gcc_dwarf_f23_mips64, gcc_dwarf_f23_mips64, LLDB_INVALID_REGNUM, gdb_f23_mips64), - DEFINE_FPR (fp_reg[24], f24, NULL, gcc_dwarf_f24_mips64, gcc_dwarf_f24_mips64, LLDB_INVALID_REGNUM, gdb_f24_mips64), - DEFINE_FPR (fp_reg[25], f25, NULL, gcc_dwarf_f25_mips64, gcc_dwarf_f25_mips64, LLDB_INVALID_REGNUM, gdb_f25_mips64), - DEFINE_FPR (fp_reg[26], f26, NULL, gcc_dwarf_f26_mips64, gcc_dwarf_f26_mips64, LLDB_INVALID_REGNUM, gdb_f26_mips64), - DEFINE_FPR (fp_reg[27], f27, NULL, gcc_dwarf_f27_mips64, gcc_dwarf_f27_mips64, LLDB_INVALID_REGNUM, gdb_f27_mips64), - DEFINE_FPR (fp_reg[28], f28, NULL, gcc_dwarf_f28_mips64, gcc_dwarf_f28_mips64, LLDB_INVALID_REGNUM, gdb_f28_mips64), - DEFINE_FPR (fp_reg[29], f29, NULL, gcc_dwarf_f29_mips64, gcc_dwarf_f29_mips64, LLDB_INVALID_REGNUM, gdb_f29_mips64), - DEFINE_FPR (fp_reg[30], f30, NULL, gcc_dwarf_f30_mips64, gcc_dwarf_f30_mips64, LLDB_INVALID_REGNUM, gdb_f30_mips64), - DEFINE_FPR (fp_reg[31], f31, NULL, gcc_dwarf_f31_mips64, gcc_dwarf_f31_mips64, LLDB_INVALID_REGNUM, gdb_f31_mips64), - DEFINE_FPR (fcsr, fcsr, NULL, gcc_dwarf_fcsr_mips64, gcc_dwarf_fcsr_mips64, LLDB_INVALID_REGNUM, gdb_fcsr_mips64), - DEFINE_FPR (fir, fir, NULL, gcc_dwarf_fir_mips64, gcc_dwarf_fir_mips64, LLDB_INVALID_REGNUM, gdb_fir_mips64) + DEFINE_GPR(zero, "r0", gcc_dwarf_zero_mips64, gcc_dwarf_zero_mips64, LLDB_INVALID_REGNUM, gdb_zero_mips64), + DEFINE_GPR(r1, NULL, gcc_dwarf_r1_mips64, gcc_dwarf_r1_mips64, LLDB_INVALID_REGNUM, gdb_r1_mips64), + DEFINE_GPR(r2, NULL, gcc_dwarf_r2_mips64, gcc_dwarf_r2_mips64, LLDB_INVALID_REGNUM, gdb_r2_mips64), + DEFINE_GPR(r3, NULL, gcc_dwarf_r3_mips64, gcc_dwarf_r3_mips64, LLDB_INVALID_REGNUM, gdb_r3_mips64), + DEFINE_GPR(r4, NULL, gcc_dwarf_r4_mips64, gcc_dwarf_r4_mips64, LLDB_REGNUM_GENERIC_ARG1, gdb_r4_mips64), + DEFINE_GPR(r5, NULL, gcc_dwarf_r5_mips64, gcc_dwarf_r5_mips64, LLDB_REGNUM_GENERIC_ARG2, gdb_r5_mips64), + DEFINE_GPR(r6, NULL, gcc_dwarf_r6_mips64, gcc_dwarf_r6_mips64, LLDB_REGNUM_GENERIC_ARG3, gdb_r6_mips64), + DEFINE_GPR(r7, NULL, gcc_dwarf_r7_mips64, gcc_dwarf_r7_mips64, LLDB_REGNUM_GENERIC_ARG4, gdb_r7_mips64), + DEFINE_GPR(r8, NULL, gcc_dwarf_r8_mips64, gcc_dwarf_r8_mips64, LLDB_REGNUM_GENERIC_ARG5, gdb_r8_mips64), + DEFINE_GPR(r9, NULL, gcc_dwarf_r9_mips64, gcc_dwarf_r9_mips64, LLDB_REGNUM_GENERIC_ARG6, gdb_r9_mips64), + DEFINE_GPR(r10, NULL, gcc_dwarf_r10_mips64, gcc_dwarf_r10_mips64, LLDB_REGNUM_GENERIC_ARG7, gdb_r10_mips64), + DEFINE_GPR(r11, NULL, gcc_dwarf_r11_mips64, gcc_dwarf_r11_mips64, LLDB_REGNUM_GENERIC_ARG8, gdb_r11_mips64), + DEFINE_GPR(r12, NULL, gcc_dwarf_r12_mips64, gcc_dwarf_r12_mips64, LLDB_INVALID_REGNUM, gdb_r12_mips64), + DEFINE_GPR(r13, NULL, gcc_dwarf_r13_mips64, gcc_dwarf_r13_mips64, LLDB_INVALID_REGNUM, gdb_r13_mips64), + DEFINE_GPR(r14, NULL, gcc_dwarf_r14_mips64, gcc_dwarf_r14_mips64, LLDB_INVALID_REGNUM, gdb_r14_mips64), + DEFINE_GPR(r15, NULL, gcc_dwarf_r15_mips64, gcc_dwarf_r15_mips64, LLDB_INVALID_REGNUM, gdb_r15_mips64), + DEFINE_GPR(r16, NULL, gcc_dwarf_r16_mips64, gcc_dwarf_r16_mips64, LLDB_INVALID_REGNUM, gdb_r16_mips64), + DEFINE_GPR(r17, NULL, gcc_dwarf_r17_mips64, gcc_dwarf_r17_mips64, LLDB_INVALID_REGNUM, gdb_r17_mips64), + DEFINE_GPR(r18, NULL, gcc_dwarf_r18_mips64, gcc_dwarf_r18_mips64, LLDB_INVALID_REGNUM, gdb_r18_mips64), + DEFINE_GPR(r19, NULL, gcc_dwarf_r19_mips64, gcc_dwarf_r19_mips64, LLDB_INVALID_REGNUM, gdb_r19_mips64), + DEFINE_GPR(r20, NULL, gcc_dwarf_r20_mips64, gcc_dwarf_r20_mips64, LLDB_INVALID_REGNUM, gdb_r20_mips64), + DEFINE_GPR(r21, NULL, gcc_dwarf_r21_mips64, gcc_dwarf_r21_mips64, LLDB_INVALID_REGNUM, gdb_r21_mips64), + DEFINE_GPR(r22, NULL, gcc_dwarf_r22_mips64, gcc_dwarf_r22_mips64, LLDB_INVALID_REGNUM, gdb_r22_mips64), + DEFINE_GPR(r23, NULL, gcc_dwarf_r23_mips64, gcc_dwarf_r23_mips64, LLDB_INVALID_REGNUM, gdb_r23_mips64), + DEFINE_GPR(r24, NULL, gcc_dwarf_r24_mips64, gcc_dwarf_r24_mips64, LLDB_INVALID_REGNUM, gdb_r24_mips64), + DEFINE_GPR(r25, NULL, gcc_dwarf_r25_mips64, gcc_dwarf_r25_mips64, LLDB_INVALID_REGNUM, gdb_r25_mips64), + DEFINE_GPR(r26, NULL, gcc_dwarf_r26_mips64, gcc_dwarf_r26_mips64, LLDB_INVALID_REGNUM, gdb_r26_mips64), + DEFINE_GPR(r27, NULL, gcc_dwarf_r27_mips64, gcc_dwarf_r27_mips64, LLDB_INVALID_REGNUM, gdb_r27_mips64), + DEFINE_GPR(gp, "r28", gcc_dwarf_gp_mips64, gcc_dwarf_gp_mips64, LLDB_INVALID_REGNUM, gdb_gp_mips64), + DEFINE_GPR(sp, "r29", gcc_dwarf_sp_mips64, gcc_dwarf_sp_mips64, LLDB_REGNUM_GENERIC_SP, gdb_sp_mips64), + DEFINE_GPR(r30, NULL, gcc_dwarf_r30_mips64, gcc_dwarf_r30_mips64, LLDB_REGNUM_GENERIC_FP, gdb_r30_mips64), + DEFINE_GPR(ra, "r31", gcc_dwarf_ra_mips64, gcc_dwarf_ra_mips64, LLDB_REGNUM_GENERIC_RA, gdb_ra_mips64), + DEFINE_GPR_INFO(sr, NULL, gcc_dwarf_sr_mips64, gcc_dwarf_sr_mips64, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM), + DEFINE_GPR(mullo, NULL, gcc_dwarf_lo_mips64, gcc_dwarf_lo_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(mulhi, NULL, gcc_dwarf_hi_mips64, gcc_dwarf_hi_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(badvaddr, NULL, gcc_dwarf_bad_mips64, gcc_dwarf_bad_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR_INFO(cause, NULL, gcc_dwarf_cause_mips64, gcc_dwarf_cause_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_GPR(pc, "pc", gcc_dwarf_pc_mips64, gcc_dwarf_pc_mips64, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM), + DEFINE_GPR_INFO(config5, NULL, gcc_dwarf_config5_mips64, gcc_dwarf_config5_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), + DEFINE_FPR (f0, NULL, gcc_dwarf_f0_mips64, gcc_dwarf_f0_mips64, LLDB_INVALID_REGNUM, gdb_f0_mips64), + DEFINE_FPR (f1, NULL, gcc_dwarf_f1_mips64, gcc_dwarf_f1_mips64, LLDB_INVALID_REGNUM, gdb_f1_mips64), + DEFINE_FPR (f2, NULL, gcc_dwarf_f2_mips64, gcc_dwarf_f2_mips64, LLDB_INVALID_REGNUM, gdb_f2_mips64), + DEFINE_FPR (f3, NULL, gcc_dwarf_f3_mips64, gcc_dwarf_f3_mips64, LLDB_INVALID_REGNUM, gdb_f3_mips64), + DEFINE_FPR (f4, NULL, gcc_dwarf_f4_mips64, gcc_dwarf_f4_mips64, LLDB_INVALID_REGNUM, gdb_f4_mips64), + DEFINE_FPR (f5, NULL, gcc_dwarf_f5_mips64, gcc_dwarf_f5_mips64, LLDB_INVALID_REGNUM, gdb_f5_mips64), + DEFINE_FPR (f6, NULL, gcc_dwarf_f6_mips64, gcc_dwarf_f6_mips64, LLDB_INVALID_REGNUM, gdb_f6_mips64), + DEFINE_FPR (f7, NULL, gcc_dwarf_f7_mips64, gcc_dwarf_f7_mips64, LLDB_INVALID_REGNUM, gdb_f7_mips64), + DEFINE_FPR (f8, NULL, gcc_dwarf_f8_mips64, gcc_dwarf_f8_mips64, LLDB_INVALID_REGNUM, gdb_f8_mips64), + DEFINE_FPR (f9, NULL, gcc_dwarf_f9_mips64, gcc_dwarf_f9_mips64, LLDB_INVALID_REGNUM, gdb_f9_mips64), + DEFINE_FPR (f10, NULL, gcc_dwarf_f10_mips64, gcc_dwarf_f10_mips64, LLDB_INVALID_REGNUM, gdb_f10_mips64), + DEFINE_FPR (f11, NULL, gcc_dwarf_f11_mips64, gcc_dwarf_f11_mips64, LLDB_INVALID_REGNUM, gdb_f11_mips64), + DEFINE_FPR (f12, NULL, gcc_dwarf_f12_mips64, gcc_dwarf_f12_mips64, LLDB_INVALID_REGNUM, gdb_f12_mips64), + DEFINE_FPR (f13, NULL, gcc_dwarf_f13_mips64, gcc_dwarf_f13_mips64, LLDB_INVALID_REGNUM, gdb_f13_mips64), + DEFINE_FPR (f14, NULL, gcc_dwarf_f14_mips64, gcc_dwarf_f14_mips64, LLDB_INVALID_REGNUM, gdb_f14_mips64), + DEFINE_FPR (f15, NULL, gcc_dwarf_f15_mips64, gcc_dwarf_f15_mips64, LLDB_INVALID_REGNUM, gdb_f15_mips64), + DEFINE_FPR (f16, NULL, gcc_dwarf_f16_mips64, gcc_dwarf_f16_mips64, LLDB_INVALID_REGNUM, gdb_f16_mips64), + DEFINE_FPR (f17, NULL, gcc_dwarf_f17_mips64, gcc_dwarf_f17_mips64, LLDB_INVALID_REGNUM, gdb_f17_mips64), + DEFINE_FPR (f18, NULL, gcc_dwarf_f18_mips64, gcc_dwarf_f18_mips64, LLDB_INVALID_REGNUM, gdb_f18_mips64), + DEFINE_FPR (f19, NULL, gcc_dwarf_f19_mips64, gcc_dwarf_f19_mips64, LLDB_INVALID_REGNUM, gdb_f19_mips64), + DEFINE_FPR (f20, NULL, gcc_dwarf_f20_mips64, gcc_dwarf_f20_mips64, LLDB_INVALID_REGNUM, gdb_f20_mips64), + DEFINE_FPR (f21, NULL, gcc_dwarf_f21_mips64, gcc_dwarf_f21_mips64, LLDB_INVALID_REGNUM, gdb_f21_mips64), + DEFINE_FPR (f22, NULL, gcc_dwarf_f22_mips64, gcc_dwarf_f22_mips64, LLDB_INVALID_REGNUM, gdb_f22_mips64), + DEFINE_FPR (f23, NULL, gcc_dwarf_f23_mips64, gcc_dwarf_f23_mips64, LLDB_INVALID_REGNUM, gdb_f23_mips64), + DEFINE_FPR (f24, NULL, gcc_dwarf_f24_mips64, gcc_dwarf_f24_mips64, LLDB_INVALID_REGNUM, gdb_f24_mips64), + DEFINE_FPR (f25, NULL, gcc_dwarf_f25_mips64, gcc_dwarf_f25_mips64, LLDB_INVALID_REGNUM, gdb_f25_mips64), + DEFINE_FPR (f26, NULL, gcc_dwarf_f26_mips64, gcc_dwarf_f26_mips64, LLDB_INVALID_REGNUM, gdb_f26_mips64), + DEFINE_FPR (f27, NULL, gcc_dwarf_f27_mips64, gcc_dwarf_f27_mips64, LLDB_INVALID_REGNUM, gdb_f27_mips64), + DEFINE_FPR (f28, NULL, gcc_dwarf_f28_mips64, gcc_dwarf_f28_mips64, LLDB_INVALID_REGNUM, gdb_f28_mips64), + DEFINE_FPR (f29, NULL, gcc_dwarf_f29_mips64, gcc_dwarf_f29_mips64, LLDB_INVALID_REGNUM, gdb_f29_mips64), + DEFINE_FPR (f30, NULL, gcc_dwarf_f30_mips64, gcc_dwarf_f30_mips64, LLDB_INVALID_REGNUM, gdb_f30_mips64), + DEFINE_FPR (f31, NULL, gcc_dwarf_f31_mips64, gcc_dwarf_f31_mips64, LLDB_INVALID_REGNUM, gdb_f31_mips64), + DEFINE_FPR (fcsr, NULL, gcc_dwarf_fcsr_mips64, gcc_dwarf_fcsr_mips64, LLDB_INVALID_REGNUM, gdb_fcsr_mips64), + DEFINE_FPR (fir, NULL, gcc_dwarf_fir_mips64, gcc_dwarf_fir_mips64, LLDB_INVALID_REGNUM, gdb_fir_mips64), + DEFINE_FPR (config5, NULL, gcc_dwarf_config5_mips64, gcc_dwarf_config5_mips64, LLDB_INVALID_REGNUM, gdb_config5_mips64), + DEFINE_MSA (w0, NULL, gcc_dwarf_w0_mips64, gcc_dwarf_w0_mips64, LLDB_INVALID_REGNUM, gdb_w0_mips64), + DEFINE_MSA (w1, NULL, gcc_dwarf_w1_mips64, gcc_dwarf_w1_mips64, LLDB_INVALID_REGNUM, gdb_w1_mips64), + DEFINE_MSA (w2, NULL, gcc_dwarf_w2_mips64, gcc_dwarf_w2_mips64, LLDB_INVALID_REGNUM, gdb_w2_mips64), + DEFINE_MSA (w3, NULL, gcc_dwarf_w3_mips64, gcc_dwarf_w3_mips64, LLDB_INVALID_REGNUM, gdb_w3_mips64), + DEFINE_MSA (w4, NULL, gcc_dwarf_w4_mips64, gcc_dwarf_w4_mips64, LLDB_INVALID_REGNUM, gdb_w4_mips64), + DEFINE_MSA (w5, NULL, gcc_dwarf_w5_mips64, gcc_dwarf_w5_mips64, LLDB_INVALID_REGNUM, gdb_w5_mips64), + DEFINE_MSA (w6, NULL, gcc_dwarf_w6_mips64, gcc_dwarf_w6_mips64, LLDB_INVALID_REGNUM, gdb_w6_mips64), + DEFINE_MSA (w7, NULL, gcc_dwarf_w7_mips64, gcc_dwarf_w7_mips64, LLDB_INVALID_REGNUM, gdb_w7_mips64), + DEFINE_MSA (w8, NULL, gcc_dwarf_w8_mips64, gcc_dwarf_w8_mips64, LLDB_INVALID_REGNUM, gdb_w8_mips64), + DEFINE_MSA (w9, NULL, gcc_dwarf_w9_mips64, gcc_dwarf_w9_mips64, LLDB_INVALID_REGNUM, gdb_w9_mips64), + DEFINE_MSA (w10, NULL, gcc_dwarf_w10_mips64, gcc_dwarf_w10_mips64, LLDB_INVALID_REGNUM, gdb_w10_mips64), + DEFINE_MSA (w11, NULL, gcc_dwarf_w11_mips64, gcc_dwarf_w11_mips64, LLDB_INVALID_REGNUM, gdb_w11_mips64), + DEFINE_MSA (w12, NULL, gcc_dwarf_w12_mips64, gcc_dwarf_w12_mips64, LLDB_INVALID_REGNUM, gdb_w12_mips64), + DEFINE_MSA (w13, NULL, gcc_dwarf_w13_mips64, gcc_dwarf_w13_mips64, LLDB_INVALID_REGNUM, gdb_w13_mips64), + DEFINE_MSA (w14, NULL, gcc_dwarf_w14_mips64, gcc_dwarf_w14_mips64, LLDB_INVALID_REGNUM, gdb_w14_mips64), + DEFINE_MSA (w15, NULL, gcc_dwarf_w15_mips64, gcc_dwarf_w15_mips64, LLDB_INVALID_REGNUM, gdb_w15_mips64), + DEFINE_MSA (w16, NULL, gcc_dwarf_w16_mips64, gcc_dwarf_w16_mips64, LLDB_INVALID_REGNUM, gdb_w16_mips64), + DEFINE_MSA (w17, NULL, gcc_dwarf_w17_mips64, gcc_dwarf_w17_mips64, LLDB_INVALID_REGNUM, gdb_w17_mips64), + DEFINE_MSA (w18, NULL, gcc_dwarf_w18_mips64, gcc_dwarf_w18_mips64, LLDB_INVALID_REGNUM, gdb_w18_mips64), + DEFINE_MSA (w19, NULL, gcc_dwarf_w19_mips64, gcc_dwarf_w19_mips64, LLDB_INVALID_REGNUM, gdb_w19_mips64), + DEFINE_MSA (w20, NULL, gcc_dwarf_w10_mips64, gcc_dwarf_w20_mips64, LLDB_INVALID_REGNUM, gdb_w20_mips64), + DEFINE_MSA (w21, NULL, gcc_dwarf_w21_mips64, gcc_dwarf_w21_mips64, LLDB_INVALID_REGNUM, gdb_w21_mips64), + DEFINE_MSA (w22, NULL, gcc_dwarf_w22_mips64, gcc_dwarf_w22_mips64, LLDB_INVALID_REGNUM, gdb_w22_mips64), + DEFINE_MSA (w23, NULL, gcc_dwarf_w23_mips64, gcc_dwarf_w23_mips64, LLDB_INVALID_REGNUM, gdb_w23_mips64), + DEFINE_MSA (w24, NULL, gcc_dwarf_w24_mips64, gcc_dwarf_w24_mips64, LLDB_INVALID_REGNUM, gdb_w24_mips64), + DEFINE_MSA (w25, NULL, gcc_dwarf_w25_mips64, gcc_dwarf_w25_mips64, LLDB_INVALID_REGNUM, gdb_w25_mips64), + DEFINE_MSA (w26, NULL, gcc_dwarf_w26_mips64, gcc_dwarf_w26_mips64, LLDB_INVALID_REGNUM, gdb_w26_mips64), + DEFINE_MSA (w27, NULL, gcc_dwarf_w27_mips64, gcc_dwarf_w27_mips64, LLDB_INVALID_REGNUM, gdb_w27_mips64), + DEFINE_MSA (w28, NULL, gcc_dwarf_w28_mips64, gcc_dwarf_w28_mips64, LLDB_INVALID_REGNUM, gdb_w28_mips64), + DEFINE_MSA (w29, NULL, gcc_dwarf_w29_mips64, gcc_dwarf_w29_mips64, LLDB_INVALID_REGNUM, gdb_w29_mips64), + DEFINE_MSA (w30, NULL, gcc_dwarf_w30_mips64, gcc_dwarf_w30_mips64, LLDB_INVALID_REGNUM, gdb_w30_mips64), + DEFINE_MSA (w31, NULL, gcc_dwarf_w31_mips64, gcc_dwarf_w31_mips64, LLDB_INVALID_REGNUM, gdb_w31_mips64), + DEFINE_MSA_INFO (mcsr, NULL, gcc_dwarf_mcsr_mips64, gcc_dwarf_mcsr_mips64, LLDB_INVALID_REGNUM, gdb_mcsr_mips64), + DEFINE_MSA_INFO (mir, NULL, gcc_dwarf_mir_mips64, gcc_dwarf_mir_mips64, LLDB_INVALID_REGNUM, gdb_mir_mips64), + DEFINE_MSA_INFO (fcsr, NULL, gcc_dwarf_fcsr_mips64, gcc_dwarf_fcsr_mips64, LLDB_INVALID_REGNUM, gdb_fcsr_mips64), + DEFINE_MSA_INFO (fir, NULL, gcc_dwarf_fir_mips64, gcc_dwarf_fir_mips64, LLDB_INVALID_REGNUM, gdb_fir_mips64), + DEFINE_MSA_INFO (config5, NULL, gcc_dwarf_config5_mips64, gcc_dwarf_config5_mips64, LLDB_INVALID_REGNUM, gdb_config5_mips64) +#endif }; + static_assert((sizeof(g_register_infos_mips64) / sizeof(g_register_infos_mips64[0])) == k_num_registers_mips64, "g_register_infos_mips64 has wrong number of register infos"); #undef DEFINE_GPR +#undef DEFINE_GPR_INFO #undef DEFINE_FPR +#undef DEFINE_MSA +#undef DEFINE_MSA_INFO #undef GPR_OFFSET #undef FPR_OFFSET +#undef MSA_OFFSET #endif // DECLARE_REGISTER_INFOS_MIPS64_STRUCT diff --git a/source/Plugins/Process/Utility/lldb-mips-freebsd-register-enums.h b/source/Plugins/Process/Utility/lldb-mips-freebsd-register-enums.h new file mode 100644 index 000000000..69dc9efac --- /dev/null +++ b/source/Plugins/Process/Utility/lldb-mips-freebsd-register-enums.h @@ -0,0 +1,70 @@ +//===-- lldb-mips-frebsd-register-enums.h -------------------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef lldb_mips_freebsd_register_enums_h +#define lldb_mips_freebsd_register_enums_h + +namespace lldb_private +{ + // LLDB register codes (e.g. RegisterKind == eRegisterKindLLDB) + + //--------------------------------------------------------------------------- + // Internal codes for all mips registers. + //--------------------------------------------------------------------------- + enum + { + k_first_gpr_mips64, + gpr_zero_mips64 = k_first_gpr_mips64, + gpr_r1_mips64, + gpr_r2_mips64, + gpr_r3_mips64, + gpr_r4_mips64, + gpr_r5_mips64, + gpr_r6_mips64, + gpr_r7_mips64, + gpr_r8_mips64, + gpr_r9_mips64, + gpr_r10_mips64, + gpr_r11_mips64, + gpr_r12_mips64, + gpr_r13_mips64, + gpr_r14_mips64, + gpr_r15_mips64, + gpr_r16_mips64, + gpr_r17_mips64, + gpr_r18_mips64, + gpr_r19_mips64, + gpr_r20_mips64, + gpr_r21_mips64, + gpr_r22_mips64, + gpr_r23_mips64, + gpr_r24_mips64, + gpr_r25_mips64, + gpr_r26_mips64, + gpr_r27_mips64, + gpr_gp_mips64, + gpr_sp_mips64, + gpr_r30_mips64, + gpr_ra_mips64, + gpr_sr_mips64, + gpr_mullo_mips64, + gpr_mulhi_mips64, + gpr_badvaddr_mips64, + gpr_cause_mips64, + gpr_pc_mips64, + gpr_ic_mips64, + gpr_dummy_mips64, + k_last_gpr_mips64 = gpr_dummy_mips64, + + k_num_registers_mips64, + + k_num_gpr_registers_mips64 = k_last_gpr_mips64 - k_first_gpr_mips64 + 1 + }; +} +#endif // #ifndef lldb_mips_freebsd_register_enums_h diff --git a/source/Plugins/Process/Utility/lldb-mips64-register-enums.h b/source/Plugins/Process/Utility/lldb-mips-linux-register-enums.h index e8c93a6ec..6c00025ed 100644 --- a/source/Plugins/Process/Utility/lldb-mips64-register-enums.h +++ b/source/Plugins/Process/Utility/lldb-mips-linux-register-enums.h @@ -1,4 +1,4 @@ -//===-- lldb-mips64-register-enums.h -------------------------------*- C++ -*-===// +//===-- lldb-mips-linux-register-enums.h -------------------------------*- C++ -*-===// // // The LLVM Compiler Infrastructure // @@ -7,8 +7,8 @@ // //===----------------------------------------------------------------------===// -#ifndef lldb_mips64_register_enums_h -#define lldb_mips64_register_enums_h +#ifndef lldb_mips_linux_register_enums_h +#define lldb_mips_linux_register_enums_h namespace lldb_private { @@ -52,14 +52,15 @@ namespace lldb_private gpr_sp_mips, gpr_r30_mips, gpr_ra_mips, + gpr_sr_mips, gpr_mullo_mips, gpr_mulhi_mips, - gpr_pc_mips, gpr_badvaddr_mips, - gpr_sr_mips, gpr_cause_mips, + gpr_pc_mips, + gpr_config5_mips, - k_last_gpr_mips = gpr_cause_mips, + k_last_gpr_mips = gpr_config5_mips, k_first_fpr_mips, fpr_f0_mips = k_first_fpr_mips, @@ -96,12 +97,55 @@ namespace lldb_private fpr_f31_mips, fpr_fcsr_mips, fpr_fir_mips, - k_last_fpr_mips = fpr_fir_mips, + fpr_config5_mips, + k_last_fpr_mips = fpr_config5_mips, + + k_first_msa_mips, + msa_w0_mips = k_first_msa_mips, + msa_w1_mips, + msa_w2_mips, + msa_w3_mips, + msa_w4_mips, + msa_w5_mips, + msa_w6_mips, + msa_w7_mips, + msa_w8_mips, + msa_w9_mips, + msa_w10_mips, + msa_w11_mips, + msa_w12_mips, + msa_w13_mips, + msa_w14_mips, + msa_w15_mips, + msa_w16_mips, + msa_w17_mips, + msa_w18_mips, + msa_w19_mips, + msa_w20_mips, + msa_w21_mips, + msa_w22_mips, + msa_w23_mips, + msa_w24_mips, + msa_w25_mips, + msa_w26_mips, + msa_w27_mips, + msa_w28_mips, + msa_w29_mips, + msa_w30_mips, + msa_w31_mips, + msa_fcsr_mips, + msa_fir_mips, + msa_mcsr_mips, + msa_mir_mips, + msa_config5_mips, + k_last_msa_mips = msa_config5_mips, k_num_registers_mips, + k_num_gpr_registers_mips = k_last_gpr_mips - k_first_gpr_mips + 1, k_num_fpr_registers_mips = k_last_fpr_mips - k_first_fpr_mips + 1, - k_num_user_registers_mips = k_num_gpr_registers_mips + k_num_fpr_registers_mips, + k_num_msa_registers_mips = k_last_msa_mips - k_first_msa_mips + 1, + k_num_user_registers_mips = k_num_gpr_registers_mips + k_num_fpr_registers_mips + k_num_msa_registers_mips }; //--------------------------------------------------------------------------- @@ -142,16 +186,14 @@ namespace lldb_private gpr_sp_mips64, gpr_r30_mips64, gpr_ra_mips64, + gpr_sr_mips64, gpr_mullo_mips64, gpr_mulhi_mips64, - gpr_pc_mips64, gpr_badvaddr_mips64, - gpr_sr_mips64, gpr_cause_mips64, - gpr_ic_mips64, - gpr_dummy_mips64, - - k_last_gpr_mips64 = gpr_dummy_mips64, + gpr_pc_mips64, + gpr_config5_mips64, + k_last_gpr_mips64 = gpr_config5_mips64, k_first_fpr_mips64, fpr_f0_mips64 = k_first_fpr_mips64, @@ -188,12 +230,56 @@ namespace lldb_private fpr_f31_mips64, fpr_fcsr_mips64, fpr_fir_mips64, - k_last_fpr_mips64 = fpr_fir_mips64, + fpr_config5_mips64, + k_last_fpr_mips64 = fpr_config5_mips64, + + k_first_msa_mips64, + msa_w0_mips64 = k_first_msa_mips64, + msa_w1_mips64, + msa_w2_mips64, + msa_w3_mips64, + msa_w4_mips64, + msa_w5_mips64, + msa_w6_mips64, + msa_w7_mips64, + msa_w8_mips64, + msa_w9_mips64, + msa_w10_mips64, + msa_w11_mips64, + msa_w12_mips64, + msa_w13_mips64, + msa_w14_mips64, + msa_w15_mips64, + msa_w16_mips64, + msa_w17_mips64, + msa_w18_mips64, + msa_w19_mips64, + msa_w20_mips64, + msa_w21_mips64, + msa_w22_mips64, + msa_w23_mips64, + msa_w24_mips64, + msa_w25_mips64, + msa_w26_mips64, + msa_w27_mips64, + msa_w28_mips64, + msa_w29_mips64, + msa_w30_mips64, + msa_w31_mips64, + msa_fcsr_mips64, + msa_fir_mips64, + msa_mcsr_mips64, + msa_mir_mips64, + msa_config5_mips64, + k_last_msa_mips64 = msa_config5_mips64, k_num_registers_mips64, + k_num_gpr_registers_mips64 = k_last_gpr_mips64 - k_first_gpr_mips64 + 1, k_num_fpr_registers_mips64 = k_last_fpr_mips64 - k_first_fpr_mips64 + 1, + k_num_msa_registers_mips64 = k_last_msa_mips64 - k_first_msa_mips64 + 1, + k_num_user_registers_mips64 = k_num_gpr_registers_mips64 + k_num_fpr_registers_mips64 + k_num_msa_registers_mips64 }; } -#endif // #ifndef fpr_mips64_register_enums_h +#endif // #ifndef lldb_mips_linux_register_enums_h |