1 files changed, 13 insertions, 0 deletions
diff --git a/source/Target/ThreadPlanStepRange.cpp b/source/Target/ThreadPlanStepRange.cpp
index e2820790e..da25348c2 100644
--- a/source/Target/ThreadPlanStepRange.cpp
+++ b/source/Target/ThreadPlanStepRange.cpp
@@ -66,6 +66,16 @@ ThreadPlanStepRange::ThreadPlanStepRange (ThreadPlanKind kind,
 ThreadPlanStepRange::~ThreadPlanStepRange ()
 {
     ClearNextBranchBreakpoint();
+    
+    size_t num_instruction_ranges = m_instruction_ranges.size();
+    
+    // FIXME: The DisassemblerLLVMC has a reference cycle and won't go away if it has any active instructions.
+    // I'll fix that but for now, just clear the list and it will go away nicely.
+    for (size_t i = 0; i < num_instruction_ranges; i++)
+    {
+        if (m_instruction_ranges[i])
+            m_instruction_ranges[i]->GetInstructionList().Clear();
+    }
 }
 
 void
@@ -99,6 +109,9 @@ ThreadPlanStepRange::AddRange(const AddressRange &new_range)
     // condense the ranges if they overlap, though I don't think it is likely
     // to be very important.
     m_address_ranges.push_back (new_range);
+    
+    // Fill the slot for this address range with an empty DisassemblerSP in the instruction ranges. I want the
+    // indices to match, but I don't want to do the work to disassemble this range if I don't step into it.
     m_instruction_ranges.push_back (DisassemblerSP());
 }