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| author | I-Jui (Ray) Sung <ijsung@google.com> | 2017-06-09 22:40:50 +0000 |
|---|---|---|
| committer | Pirama Arumuga Nainar <pirama@google.com> | 2017-06-12 15:04:41 -0700 |
| commit | fb02226681115c57e17e1f5dbf9e06a540bb59af (patch) | |
| tree | e6f17789b64f54221e99c30b5f4efaa3e3a8a1c0 /lib/Target | |
| parent | 0f6f4eb94feae550aea6822fd56eff292ca10d46 (diff) | |
| download | llvm-fb02226681115c57e17e1f5dbf9e06a540bb59af.tar.gz | |
[AArch64] Add fallback in FastISel fp16 conversions
Summary:
- Fix assertion failures on F16 to/from int types in FastISel by falling
back to regular ISel
- Add a testcase of various conversion cases with FastISel (-O0)
Reviewers: kristof.beyls, jmolloy, SjoerdMeijer
Reviewed By: SjoerdMeijer
Subscribers: SjoerdMeijer, llvm-commits, srhines, pirama, aemerson, rengolin, javed.absar, kristof.beyls
Differential Revision: https://reviews.llvm.org/D33734
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305127 91177308-0d34-0410-b5e6-96231b3b80d8
(cherry picked from commit dedc24f891c1b93171865ed5e9c3a75d82a600c7)
Change-Id: Id45a99255124b518f221b6ad8016198277b923cb
Diffstat (limited to 'lib/Target')
| -rw-r--r-- | lib/Target/AArch64/AArch64FastISel.cpp | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/lib/Target/AArch64/AArch64FastISel.cpp b/lib/Target/AArch64/AArch64FastISel.cpp index ce8eb0a2d868..3a09c4b82732 100644 --- a/lib/Target/AArch64/AArch64FastISel.cpp +++ b/lib/Target/AArch64/AArch64FastISel.cpp @@ -2748,7 +2748,7 @@ bool AArch64FastISel::selectFPToInt(const Instruction *I, bool Signed) { return false; EVT SrcVT = TLI.getValueType(DL, I->getOperand(0)->getType(), true); - if (SrcVT == MVT::f128) + if (SrcVT == MVT::f128 || SrcVT == MVT::f16) return false; unsigned Opc; @@ -2775,8 +2775,12 @@ bool AArch64FastISel::selectIntToFP(const Instruction *I, bool Signed) { MVT DestVT; if (!isTypeLegal(I->getType(), DestVT) || DestVT.isVector()) return false; - assert ((DestVT == MVT::f32 || DestVT == MVT::f64) && - "Unexpected value type."); + // Let regular ISEL handle FP16 + if (DestVT == MVT::f16) + return false; + + assert((DestVT == MVT::f32 || DestVT == MVT::f64) && + "Unexpected value type."); unsigned SrcReg = getRegForValue(I->getOperand(0)); if (!SrcReg) |