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2014-09-12Legalizer: Use the scalar bit width when promoting bit counting instrs onBenjamin Kramer
vectors. e.g. when promoting ctlz from <2 x i32> to <2 x i64> we have to fixup the result by 32 bits, not 64. PR20917. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217671 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-26Add support for scalarizing cttz_zero_undefPetar Jovanovic
Follow up to r214266. Add missing case in ScalarizeVectorResult() for cttz_zero_undef. Differential Revision: http://reviews.llvm.org/D4813 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215330 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-26Add support for scalarizing ctlz_zero_undefPetar Jovanovic
Fix the missing case in ScalarizeVectorResult() that was exposed with libclcore.bc in Android. Differential Revision: http://reviews.llvm.org/D4645 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214266 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-12Merge "Fixes the build when NDEBUG is not defined."Stephen Hines
2014-07-21Update LLVM for rebase to r212749.Stephen Hines
Includes a cherry-pick of: r212948 - fixes a small issue with atomic calls Change-Id: Ib97bd980b59f18142a69506400911a6009d9df18
2014-07-19Fixes the build when NDEBUG is not defined.Dan Albert
Symbols from the added file are needed in the Debug() block on line 927 of lib/ExecutionEngine/JIT/JITEmitter.cpp. Change-Id: I17a02b8f26066232cc9b5d60bdd683a566a955a5
2014-06-06Adds the ability to run the llvm test suite in-tree.Chris Wailes
This was accomplished by building additional tools and hand-generating several files that are auto-generated by the configuration system when LLVM is built out-of-tree. The LTO, Interpreter, and DebugInfo libraries are now being compiled, and several source files were added to existing compilation targets. To run these tests you must first run build/envsetup.sh and have used lunch to select a target. You can then launch the test script by running: cd $ANDROID_BUILD_TOP/external/llvm && ./android_test.sh Bug: 15433215 Change-Id: I43d87de0a4620cdd46c8d0f825dd4428e8409702
2014-06-04Updated the makefiles to use AArch64 name.Chris Wailes
The makefiles had previously used the name Arm64 for the AArch64 libraries. This patch changes all of makefiles to use the correct name for the backend. Change-Id: Ida062b1173b719b6d2519618827c3a67ede8b479
2014-05-29Update LLVM for 3.5 rebase (r209712).Stephen Hines
Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
2014-04-24Update to LLVM 3.5a.Stephen Hines
Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
2014-04-17Remove the -O1 WAR for SROA.cpp compilation.Stephen Hines
Bug: 8047767 Change-Id: I036af8d0578f723d3f5cb07f1d26b3c6895d8690
2014-03-14Make LLVM build on AArch64.Tim Murray
bug 13343378 Change-Id: I4152d2437a144645fa0b5a425b7bfdcb3a2a5594
2014-02-18am b7485134: am 449fc261: Merge "llvm: convert makefiles to support multilib ↵Colin Cross
build" * commit 'b7485134a2cbecc47904988b4cfde24019ac4fa1': llvm: convert makefiles to support multilib build
2014-02-13Update LLVM for merge to 3.4.Stephen Hines
Update config.h files. Add RS SubtargetFeature for +long64 on ARM devices. Adjust Android.mk for added/removed files: + Delinearization.cpp - PathNumbering.cpp - PathProfileInfo.cpp - PathProfileVerifier.cpp - ProfileDataLoader.cpp - ProfileDataLoaderPass.cpp - ProfileEstimatorPass.cpp - ProfileInfo.cpp - ProfileInfoLoader.cpp - ProfileInfoLoaderPass.cpp - ProfileVerifierPass.cpp + LiveRegUnits.cpp - ShrinkWrapping.cpp + StackMaps.cpp - StrongPHIElimination.cpp + DIEHash.cpp + LegacyPassManager.cpp + ELF.cpp + Unicode.cpp - MipsOptimizeMathLibCalls.cpp - MipsELFStreamer.cpp + MipsTargetStreamer.cpp - EdgeProfiling.cpp + DataFlowSanitizer.cpp + DebugIR.cpp - OptimalEdgeProfiling.cpp - PathProfiling.cpp - ProfilingUtils.cpp - BasicBlockPlacement.cpp + LoopRerollPass.cpp + PartiallyInlineLibCalls.cpp + SampleProfile.cpp + GlobalStatus.cpp Change-Id: I17dcf0bf53a1720acd8226ae3e30d84993562a91
2014-02-11Merge remote-tracking branch 'upstream/release_34' into merge-20140211Stephen Hines
Conflicts: lib/Linker/LinkModules.cpp lib/Support/Unix/Signals.inc Change-Id: Ia54f291fa5dc828052d2412736e8495c1282aa64
2014-02-06llvm: convert makefiles to support multilib buildColin Cross
Convert makefiles to allow for building two architectures at the same time. This will also cause make checkbuild to build the target libraries for all supported architectures. Change-Id: Ia5e6fe5b1186a67753faafd3532ed4cb280a8b10
2013-12-24Merging r197483:Bill Wendling
------------------------------------------------------------------------ r197483 | yrnkrn | 2013-12-17 00:40:11 -0800 (Tue, 17 Dec 2013) | 8 lines There are no __register_frame and __deregister_frame functions when using structured exception handling (SEH) on Windows 64. http://llvm-reviews.chandlerc.com/D2378 Patch by Jonathan Liu! ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@197944 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-20Merging r197492:Bill Wendling
------------------------------------------------------------------------ r197492 | dyatkovskiy | 2013-12-17 04:07:33 -0800 (Tue, 17 Dec 2013) | 26 lines Fix for PR18045: http://llvm.org/bugs/show_bug.cgi?id=18045 Short issue description: For X86 machines with sse < sse4.1 we got failures for some particular load/store vector sequences: $ clang-trunk -m32 -O2 test-case.c fatal error: error in backend: Cannot select: 0x4200920: v4i32,ch = load 0x41d6ab0, 0x4205850, 0x41dcb10<LD16[getelementptr inbounds ([4 x i32]* @e, i32 0, i32 0)](align=4)> [ORD=82] [ID=58] 0x4205850: i32 = X86ISD::Wrapper 0x41d5490 [ORD=26] [ID=43] 0x41d5490: i32 = TargetGlobalAddress<[4 x i32]* @e> 0 [ORD=26] [ID=23] 0x41dcb10: i32 = undef [ID=2] The reason is that EltsFromConsecutiveLoads could emit such load instruction both before and after legalize stage. Though this instruction is not legal for machines with SSSE3 and lower. The fix: In EltsFromConsecutiveLoads, if we have passed legalize stage, we check whether nodes it emits are legal. P.S.: If you get failure in time from 12:00 and till 22:00 (UTC-8), perhaps I'll slow with response, so you better reject this commit. Thanks! ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@197779 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-20Merging r197718:Bill Wendling
------------------------------------------------------------------------ r197718 | hans | 2013-12-19 12:32:44 -0800 (Thu, 19 Dec 2013) | 10 lines Make sys::ThreadLocal<> zero-initialized on non-thread builds (PR18205) According to the docs, ThreadLocal<>::get() should return NULL if no object has been set. This patch makes that the case also for non-thread builds and adds a very basic unit test to check it. (This was causing PR18205 because PrettyStackTraceHead didn't get zero- initialized and we'd crash trying to read past the end of that list. We didn't notice this so much on Linux since we'd crash after printing all the entries, but on Mac we print into a SmallString, and would crash before printing that.) ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@197778 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-17Merging r197449:Bill Wendling
------------------------------------------------------------------------ r197449 | arnolds | 2013-12-16 17:11:01 -0800 (Mon, 16 Dec 2013) | 7 lines LoopVectorizer: Don't if-convert constant expressions that can trap A phi node operand or an instruction operand could be a constant expression that can trap (division). Check that we don't vectorize such cases. PR16729 radar://15653590 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@197453 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-15Merging r197047:Bill Wendling
------------------------------------------------------------------------ r197047 | d0k | 2013-12-11 08:36:09 -0800 (Wed, 11 Dec 2013) | 3 lines SelectionDAG: Fix a typo. Found by "cppcheck". PR18208. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@197355 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-15Merging r197216:Bill Wendling
------------------------------------------------------------------------ r197216 | chandlerc | 2013-12-13 00:00:01 -0800 (Fri, 13 Dec 2013) | 9 lines [inliner] Fix PR18206 by preventing inlining functions that call setjmp through an invoke instruction. The original patch for this was written by Mark Seaborn, but I've reworked his test case into the existing returns_twice test case and implemented the fix by the prior refactoring to actually run the cost analysis over invoke instructions, and then here fixing our detection of the returns_twice attribute to work for both calls and invokes. We never noticed because we never saw an invoke. =[ ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@197352 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-15Merging r197215:Bill Wendling
------------------------------------------------------------------------ r197215 | chandlerc | 2013-12-12 23:59:56 -0800 (Thu, 12 Dec 2013) | 24 lines [inliner] Completely change (and fix) how the inline cost analysis handles terminator instructions. The inline cost analysis inheritted some pretty rough handling of terminator insts from the original cost analysis, and then made it much, much worse by factoring all of the important analyses into a separate instruction visitor. That instruction visitor never visited the terminator. This works fine for things like conditional branches, but for many other things we simply computed The Wrong Value. First example are unconditional branches, which should be free but were counted as full cost. This is most significant for conditional branches where the condition simplifies and folds during inlining. We paid a 1 instruction tax on every branch in a straight line specialized path. =[ Oh, we also claimed that the unreachable instruction had cost. But it gets worse. Let's consider invoke. We never applied the call penalty. We never accounted for the cost of the arguments. Nope. Worse still, we didn't handle the *correctness* constraints of not inlining recursive invokes, or exception throwing returns_twice functions. Oops. See PR18206. Sadly, PR18206 requires yet another fix, but this refactoring is at least a huge step in that direction. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@197351 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-14Merging r197178:Bill Wendling
------------------------------------------------------------------------ r197178 | hfinkel | 2013-12-12 12:45:24 -0800 (Thu, 12 Dec 2013) | 9 lines Fix a use-after-free error in GlobalOpt CleanupConstantGlobalUsers GlobalOpt's CleanupConstantGlobalUsers function uses a worklist array to manage constant users to be visited. The pointers in this array need to be weak handles because when we delete a constant array, we may also be holding a pointer to one of its elements (or an element of one of its elements if we're dealing with an array of arrays) in the worklist. Fixes PR17347. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@197322 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-14Merging r197228:Bill Wendling
------------------------------------------------------------------------ r197228 | d0k | 2013-12-13 05:40:24 -0800 (Fri, 13 Dec 2013) | 8 lines X86: When lowering shl_parts, don't emit shift amounts larger than the bit width. While it's safe for the X86-specific shift nodes, dag combining will kill generic nodes. Insert an AND to make it safe, isel will nuke it as x86's shift instructions have an implicit AND. Fixes PR16108, which contains a contraption to hit this case in between constant folders. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@197321 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-12Merging r-197100:Bill Wendling
------------------------------------------------------------------------ r197100 | hfinkel | 2013-12-11 16:23:29 -0800 (Wed, 11 Dec 2013) | 1 line Remove unused multiclass from PPCInstrInfo.td ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@197131 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-12Merging r197100:Bill Wendling
------------------------------------------------------------------------ r197100 | hfinkel | 2013-12-11 16:23:29 -0800 (Wed, 11 Dec 2013) | 1 line Remove unused multiclass from PPCInstrInfo.td ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@197130 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-12Merging r197089:Bill Wendling
------------------------------------------------------------------------ r197089 | hfinkel | 2013-12-11 15:12:25 -0800 (Wed, 11 Dec 2013) | 6 lines Fix the PPC subsumes-predicate check For one predicate to subsume another, they must both check the same condition register. Failure to check this prerequisite was causing miscompiles. Fixes PR18003. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@197126 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-10Merging r196858:Bill Wendling
------------------------------------------------------------------------ r196858 | nadav | 2013-12-09 17:13:59 -0800 (Mon, 09 Dec 2013) | 1 line Fix PR18162 - Incorrect assertion assumed that the SDValue resno is zero. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196886 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-10Merging r196806:Bill Wendling
------------------------------------------------------------------------ r196806 | apazos | 2013-12-09 11:29:14 -0800 (Mon, 09 Dec 2013) | 11 lines Fix pattern match for movi with 0D result Patch by Jiangning Liu. With some test case changes: - intrinsic test added to the existing /test/CodeGen/AArch64/neon-aba-abd.ll. - New test cases to cover movi 1D scenario without using the intrinsic in test/CodeGen/AArch64/neon-mov.ll. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196872 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-09Merging r196172:Manman Ren
------------------------------------------------------------------------ r196172 | mren | 2013-12-02 16:12:14 -0800 (Mon, 02 Dec 2013) | 4 lines Debug Info: rename getDebugInfoVersionFromModule to getDebugMetadataVersionFromModule. Suggested by Eric. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196823 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-09Merging r196158:Manman Ren
------------------------------------------------------------------------ r196158 | mren | 2013-12-02 13:29:56 -0800 (Mon, 02 Dec 2013) | 12 lines Debug Info: drop debug info via upgrading path if version number does not match. Add a helper function getDebugInfoVersionFromModule to return the debug info version number for a module. "Verifier/module-flags-1.ll" checks for verification errors. It will seg fault when calling getDebugInfoVersionFromModule because of the incorrect format for module flags in the testing case. We make getModuleFlagsMetadata more robust by checking for error conditions. PR17982 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196822 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-09Merging r195505:Manman Ren
------------------------------------------------------------------------ r195505 | mren | 2013-11-22 14:06:31 -0800 (Fri, 22 Nov 2013) | 8 lines Debug Info: move StripDebugInfo from StripSymbols.cpp to DebugInfo.cpp. We can share the implementation between StripSymbols and dropping debug info for metadata versions that do not match. Also update the comments to match the implementation. A follow-on patch will drop the "Debug Info Version" module flag in StripDebugInfo. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196816 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-09Merge rest of r196210. Some bits strayed into r196701, turning 3.4 red. ThisTim Northover
should fix the issue. ------------------------------------------------------------------------ r196210 | haoliu | 2013-12-03 06:06:55 +0000 (Tue, 03 Dec 2013) | 3 lines [AArch64]Add missing floating point convert, round and misc intrinsics. E.g. int64x1_t vcvt_s64_f64(float64x1_t a) -> FCVTZS Dd, Dn ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196772 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-09Merge r196725 (conflicts on same API as before):Tim Northover
------------------------------------------------------------------------ r196725 | tnorthover | 2013-12-08 15:56:50 +0000 (Sun, 08 Dec 2013) | 19 lines ARM: fix folding of stack-adjustment (yet again). When trying to eliminate an "sub sp, sp, #N" instruction by folding it into an existing push/pop using dummy registers, we need to account for the fact that this might affect precisely how "fp" gets set in the prologue. We were attempting this, but assuming that *whenever* we performed a fold it would make a difference. This is false, for example, in: push {r4, r7, lr} add fp, sp, #4 vpush {d8} sub sp, sp, #8 we can fold the "sub" into the "vpush", forming "vpush {d7, d8}". However, in that case the "add fp" instruction mustn't change, which we were getting wrong before. Should fix PR18160. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196769 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-09Merging r196751:Bill Wendling
------------------------------------------------------------------------ r196751 | venkatra | 2013-12-08 20:02:15 -0800 (Sun, 08 Dec 2013) | 3 lines [Sparc]: Implement getSetCCResultType() in SparcTargetLowering so that umulo/smulo can be lowered on sparcv9 without an assertion error. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196766 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-09Merging r196755:Bill Wendling
------------------------------------------------------------------------ r196755 | venkatra | 2013-12-08 21:13:25 -0800 (Sun, 08 Dec 2013) | 2 lines [SPARCV9]: Adjust the resultant pointer of DYNAMIC_STACKALLOC with the stack BIAS on sparcV9. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196764 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-09Merging r196735:Bill Wendling
------------------------------------------------------------------------ r196735 | venkatra | 2013-12-08 14:06:07 -0800 (Sun, 08 Dec 2013) | 3 lines [SparcV9]: Expand MULHU/MULHS:i64 and UMUL_LOHI/SMUL_LOHI:i64 on sparcv9. This fixes PR18150. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196744 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-08Merging r196493. Simple conflict due to change API of updatedTim Northover
function. git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196717 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-08Merging r196638:Bill Wendling
------------------------------------------------------------------------ r196638 | arsenm | 2013-12-06 18:58:45 -0800 (Fri, 06 Dec 2013) | 1 line Fix assert with copy from global through addrspacecast ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196709 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-08Merging r196637:Bill Wendling
------------------------------------------------------------------------ r196637 | arsenm | 2013-12-06 18:58:41 -0800 (Fri, 06 Dec 2013) | 1 line Add getBitCastOrAddrSpaceCast ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196707 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-08--- Reverse-merging r196668 into '.':Bill Wendling
U lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp U test/Transforms/InstCombine/addrspacecast.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196705 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-08Merging r196588:Bill Wendling
------------------------------------------------------------------------ r196588 | weimingz | 2013-12-06 09:56:48 -0800 (Fri, 06 Dec 2013) | 7 lines Bug 18149: [AArch32] VSel instructions has no ARMCC field The current peephole optimizing for compare inst assumes an instr that uses CPSR has an MO for ARM Cond code.However, for VSEL instructions (vseqeq, vselgt, vselgt, vselvs), there is no such operand nor do they support the modification of Cond Code. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196704 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-08Merging r196533:Bill Wendling
------------------------------------------------------------------------ r196533 | apazos | 2013-12-05 13:07:49 -0800 (Thu, 05 Dec 2013) | 3 lines Implemented vget/vset_lane_f16 intrinsics ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196701 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-08Merging r196456:Bill Wendling
------------------------------------------------------------------------ r196456 | jiangning | 2013-12-04 18:12:01 -0800 (Wed, 04 Dec 2013) | 2 lines For AArch64, add missing register cost calculation for big value types like v4i64 and v8i64. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196700 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-08Merging r196362:Bill Wendling
------------------------------------------------------------------------ r196362 | kevinqin | 2013-12-04 00:02:34 -0800 (Wed, 04 Dec 2013) | 1 line [AArch64 Neon] Add ACLE intrinsic vceqz_f64. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196699 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-08Merging r196360:Bill Wendling
------------------------------------------------------------------------ r196360 | kevinqin | 2013-12-03 23:53:28 -0800 (Tue, 03 Dec 2013) | 1 line [AArch64 NEON] Add missing compare intrinsics. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196697 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-08Merging r196208:Bill Wendling
------------------------------------------------------------------------ r196208 | haoliu | 2013-12-02 21:58:30 -0800 (Mon, 02 Dec 2013) | 3 lines AArch64: add missing ACLE intrinsics mapping to general arithmetic operation from VFP instructions. E.g. float64x1_t vadd_f64(float64x1_t a, float64x1_t b) -> FADD Dd, Dn, Dm. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196693 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-08Merging r196198:Bill Wendling
------------------------------------------------------------------------ r196198 | haoliu | 2013-12-02 19:39:47 -0800 (Mon, 02 Dec 2013) | 3 lines AArch64: Add missing scalar pair intrinsics. E.g. "float32_t vaddv_f32(float32x2_t a)" to be matched into "faddp s0, v1.2s". ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196691 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-08Merging r196192:Bill Wendling
------------------------------------------------------------------------ r196192 | jiangning | 2013-12-02 17:33:52 -0800 (Mon, 02 Dec 2013) | 2 lines Add some missing pattern matches for AArch64 Neon intrinsics like vuqadd_s64 and friends. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196690 91177308-0d34-0410-b5e6-96231b3b80d8
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