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//- WebAssembly.td - Describe the WebAssembly Target Machine --*- tablegen -*-//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
///
/// \file
/// \brief This is a target description file for the WebAssembly architecture,
/// which is also known as "wasm".
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
// Target-independent interfaces which we are implementing
//===----------------------------------------------------------------------===//
include "llvm/Target/Target.td"
//===----------------------------------------------------------------------===//
// WebAssembly Subtarget features.
//===----------------------------------------------------------------------===//
def FeatureSIMD128 : SubtargetFeature<"simd128", "HasSIMD128", "false",
"Enable 128-bit SIMD">;
//===----------------------------------------------------------------------===//
// Architectures.
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
// Register File Description
//===----------------------------------------------------------------------===//
include "WebAssemblyRegisterInfo.td"
//===----------------------------------------------------------------------===//
// Instruction Descriptions
//===----------------------------------------------------------------------===//
include "WebAssemblyInstrInfo.td"
def WebAssemblyInstrInfo : InstrInfo;
//===----------------------------------------------------------------------===//
// WebAssembly Processors supported.
//===----------------------------------------------------------------------===//
// Minimal Viable Product.
def : ProcessorModel<"mvp", NoSchedModel, []>;
// Generic processor: latest stable version.
def : ProcessorModel<"generic", NoSchedModel, []>;
// Latest and greatest experimental version of WebAssembly. Bugs included!
def : ProcessorModel<"bleeding-edge", NoSchedModel, [FeatureSIMD128]>;
//===----------------------------------------------------------------------===//
// Target Declaration
//===----------------------------------------------------------------------===//
def WebAssembly : Target {
let InstructionSet = WebAssemblyInstrInfo;
}
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