diff options
| author | David Srbecky <dsrbecky@google.com> | 2015-05-11 12:31:23 +0100 |
|---|---|---|
| committer | David Srbecky <dsrbecky@google.com> | 2015-05-13 01:06:58 +0100 |
| commit | cd66d540cead3f8200b0c73bad9c276d67896c3d (patch) | |
| tree | d25a4a409bd041f18b856e156cf1fa71f6169369 /Asm | |
| parent | b473eaa2840cccf2fef15d53f00bccf92c41b615 (diff) | |
| download | lzma-cd66d540cead3f8200b0c73bad9c276d67896c3d.tar.gz | |
Updated LZMA SDK to 9.38 beta.
The webpage says "If you use XZ code from LZMA SDK, it's recommended
to upgrade to new XZ code from 7-Zip 9.38 beta. That new code fixes
some bugs." and we do use the XZ code.
The code is identical to the stock LZMA SDK with the following changes:
deleted bin/
added C/Util/Lzma/Android.mk
added MODULE_LICENSE_PUBLIC_DOMAIN
added NOTICE
added xz-embedded/
Change-Id: Ibc5d353748420f7b3ae2877d625d7ddb788bdc6e
Diffstat (limited to 'Asm')
| -rw-r--r--[-rwxr-xr-x] | Asm/arm/7zCrcOpt.asm | 0 | ||||
| -rw-r--r--[-rwxr-xr-x] | Asm/x86/7zAsm.asm | 28 | ||||
| -rw-r--r--[-rwxr-xr-x] | Asm/x86/7zCrcOpt.asm | 0 | ||||
| -rw-r--r--[-rwxr-xr-x] | Asm/x86/AesOpt.asm | 0 | ||||
| -rw-r--r-- | Asm/x86/XzCrc64Opt.asm | 205 |
5 files changed, 225 insertions, 8 deletions
diff --git a/Asm/arm/7zCrcOpt.asm b/Asm/arm/7zCrcOpt.asm index f008d65..f008d65 100755..100644 --- a/Asm/arm/7zCrcOpt.asm +++ b/Asm/arm/7zCrcOpt.asm diff --git a/Asm/x86/7zAsm.asm b/Asm/x86/7zAsm.asm index 5a5f271..53a9e3f 100755..100644 --- a/Asm/x86/7zAsm.asm +++ b/Asm/x86/7zAsm.asm @@ -1,5 +1,5 @@ ; 7zAsm.asm -- ASM macros
-; 2009-12-12 : Igor Pavlov : Public domain
+; 2012-12-30 : Igor Pavlov : Public domain
MY_ASM_START macro
ifdef x64
@@ -13,30 +13,34 @@ endm MY_PROC macro name:req, numParams:req
align 16
- proc_numParams equ numParams
+ proc_numParams = numParams
ifdef x64
proc_name equ name
- name PROC
else
- proc_fastcall_name equ @CatStr(@,name,@, %numParams * 4)
- public proc_fastcall_name
- proc_fastcall_name:
+ proc_name equ @CatStr(@,name,@, %numParams * 4)
endif
+ proc_name PROC
endm
MY_ENDP macro
ifdef x64
ret
- proc_name ENDP
else
- ret (proc_numParams - 2) * 4
+ if proc_numParams LT 3
+ ret
+ else
+ ret (proc_numParams - 2) * 4
+ endif
endif
+ proc_name ENDP
endm
ifdef x64
REG_SIZE equ 8
+ REG_LOGAR_SIZE equ 3
else
REG_SIZE equ 4
+ REG_LOGAR_SIZE equ 2
endif
x0 equ EAX
@@ -67,6 +71,14 @@ ifdef x64 r5 equ RBP
r6 equ RSI
r7 equ RDI
+ x8 equ r8d
+ x9 equ r9d
+ x10 equ r10d
+ x11 equ r11d
+ x12 equ r12d
+ x13 equ r13d
+ x14 equ r14d
+ x15 equ r15d
else
r0 equ x0
r1 equ x1
diff --git a/Asm/x86/7zCrcOpt.asm b/Asm/x86/7zCrcOpt.asm index 2de5171..2de5171 100755..100644 --- a/Asm/x86/7zCrcOpt.asm +++ b/Asm/x86/7zCrcOpt.asm diff --git a/Asm/x86/AesOpt.asm b/Asm/x86/AesOpt.asm index c32e48f..c32e48f 100755..100644 --- a/Asm/x86/AesOpt.asm +++ b/Asm/x86/AesOpt.asm diff --git a/Asm/x86/XzCrc64Opt.asm b/Asm/x86/XzCrc64Opt.asm new file mode 100644 index 0000000..3e6d490 --- /dev/null +++ b/Asm/x86/XzCrc64Opt.asm @@ -0,0 +1,205 @@ +; XzCrc64Opt.asm -- CRC64 calculation : optimized version
+; 2011-06-28 : Igor Pavlov : Public domain
+
+include 7zAsm.asm
+
+MY_ASM_START
+
+ifdef x64
+
+ rD equ r9
+ rN equ r10
+
+ num_VAR equ r8
+ table_VAR equ r9
+
+ SRCDAT equ rN + rD
+
+CRC_XOR macro dest:req, src:req, t:req
+ xor dest, QWORD PTR [r5 + src * 8 + 0800h * t]
+endm
+
+CRC1b macro
+ movzx x6, BYTE PTR [rD]
+ inc rD
+ movzx x3, x0_L
+ xor x6, x3
+ shr r0, 8
+ CRC_XOR r0, r6, 0
+ dec rN
+endm
+
+MY_PROLOG macro crc_end:req
+ MY_PUSH_4_REGS
+
+ mov r0, r1
+ mov rN, num_VAR
+ mov r5, table_VAR
+ mov rD, r2
+ test rN, rN
+ jz crc_end
+ @@:
+ test rD, 3
+ jz @F
+ CRC1b
+ jnz @B
+ @@:
+ cmp rN, 8
+ jb crc_end
+ add rN, rD
+ mov num_VAR, rN
+ sub rN, 4
+ and rN, NOT 3
+ sub rD, rN
+ mov x1, [SRCDAT]
+ xor r0, r1
+ add rN, 4
+endm
+
+MY_EPILOG macro crc_end:req
+ sub rN, 4
+ mov x1, [SRCDAT]
+ xor r0, r1
+ mov rD, rN
+ mov rN, num_VAR
+ sub rN, rD
+ crc_end:
+ test rN, rN
+ jz @F
+ CRC1b
+ jmp crc_end
+ @@:
+ MY_POP_4_REGS
+endm
+
+MY_PROC XzCrc64UpdateT4, 4
+ MY_PROLOG crc_end_4
+ align 16
+ main_loop_4:
+ mov x1, [SRCDAT]
+ movzx x2, x0_L
+ movzx x3, x0_H
+ shr r0, 16
+ movzx x6, x0_L
+ movzx x7, x0_H
+ shr r0, 16
+ CRC_XOR r1, r2, 3
+ CRC_XOR r0, r3, 2
+ CRC_XOR r1, r6, 1
+ CRC_XOR r0, r7, 0
+ xor r0, r1
+
+ add rD, 4
+ jnz main_loop_4
+
+ MY_EPILOG crc_end_4
+MY_ENDP
+
+else
+
+ rD equ r1
+ rN equ r7
+
+ crc_val equ (REG_SIZE * 5)
+ crc_table equ (8 + crc_val)
+ table_VAR equ [r4 + crc_table]
+ num_VAR equ table_VAR
+
+
+ SRCDAT equ rN + rD
+
+CRC macro op0:req, op1:req, dest0:req, dest1:req, src:req, t:req
+ op0 dest0, DWORD PTR [r5 + src * 8 + 0800h * t]
+ op1 dest1, DWORD PTR [r5 + src * 8 + 0800h * t + 4]
+endm
+
+CRC_XOR macro dest0:req, dest1:req, src:req, t:req
+ CRC xor, xor, dest0, dest1, src, t
+endm
+
+
+CRC1b macro
+ movzx x6, BYTE PTR [rD]
+ inc rD
+ movzx x3, x0_L
+ xor x6, x3
+ shrd r0, r2, 8
+ shr r2, 8
+ CRC_XOR r0, r2, r6, 0
+ dec rN
+endm
+
+MY_PROLOG macro crc_end:req
+ MY_PUSH_4_REGS
+
+ mov rN, r2
+
+ mov x0, [r4 + crc_val]
+ mov x2, [r4 + crc_val + 4]
+ mov r5, table_VAR
+ test rN, rN
+ jz crc_end
+ @@:
+ test rD, 3
+ jz @F
+ CRC1b
+ jnz @B
+ @@:
+ cmp rN, 8
+ jb crc_end
+ add rN, rD
+
+ mov num_VAR, rN
+
+ sub rN, 4
+ and rN, NOT 3
+ sub rD, rN
+ xor r0, [SRCDAT]
+ add rN, 4
+endm
+
+MY_EPILOG macro crc_end:req
+ sub rN, 4
+ xor r0, [SRCDAT]
+
+ mov rD, rN
+ mov rN, num_VAR
+ sub rN, rD
+ crc_end:
+ test rN, rN
+ jz @F
+ CRC1b
+ jmp crc_end
+ @@:
+ MY_POP_4_REGS
+endm
+
+MY_PROC XzCrc64UpdateT4, 5
+ MY_PROLOG crc_end_4
+ movzx x6, x0_L
+ align 16
+ main_loop_4:
+ mov r3, [SRCDAT]
+ xor r3, r2
+
+ CRC xor, mov, r3, r2, r6, 3
+ movzx x6, x0_H
+ shr r0, 16
+ CRC_XOR r3, r2, r6, 2
+
+ movzx x6, x0_L
+ movzx x0, x0_H
+ CRC_XOR r3, r2, r6, 1
+ CRC_XOR r3, r2, r0, 0
+ movzx x6, x3_L
+ mov r0, r3
+
+ add rD, 4
+ jnz main_loop_4
+
+ MY_EPILOG crc_end_4
+MY_ENDP
+
+endif
+
+end
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