mediatek.c: Don't use 64-stride alignment for video on 8173 (hana)

Video buffers are forced to use 64 alignment because of some nebulous
argument around better cache performance (b/35560932, it was mostly
about kevin and somehow hana got bundled in).

On Mediatek, however, video decoder and image processor use 16-
alignment (like macroblocks), forcing the use of the image processor
to reconcile these two, negating any performance/cache improvements.

This CL changes that to only use 64-alignment to non-YUV (hence,
video) quads, and this only for Hana.

BUG=b:220175010
TEST=video.DecodeAccel.* on hana

Change-Id: I48ee1beac29f915734830eda64705a2b4827a901
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/minigbm/+/3475099
Tested-by: Miguel Casas-Sanchez <mcasas@chromium.org>
Tested-by: Miguel Casas <mcasas@google.com>
Reviewed-by: Fei Shao <fshao@chromium.org>
Reviewed-by: Miguel Casas <mcasas@google.com>
Commit-Queue: Miguel Casas <mcasas@google.com>

1 files changed, 29 insertions, 1 deletions

diff --git a/mediatek.c b/mediatek.c
index 8456edd..cd3e641 100644
--- a/mediatek.c
+++ b/mediatek.c
@@ -32,6 +32,8 @@
 // All platforms except MT8173 should USE_NV12_FOR_HW_VIDEO_DECODING.
 #if defined(MTK_MT8183) || defined(MTK_MT8186) || defined(MTK_MT8192) || defined(MTK_MT8195)
 #define USE_NV12_FOR_HW_VIDEO_DECODING
+#else
+#define DONT_USE_64_ALIGNMENT_FOR_VIDEO_BUFFERS
 #endif
 
 struct mediatek_private_map_data {
@@ -56,8 +58,27 @@ static const uint32_t texture_source_formats[] = {
 	DRM_FORMAT_YVU420,
 	DRM_FORMAT_YVU420_ANDROID
 };
+
+#ifdef DONT_USE_64_ALIGNMENT_FOR_VIDEO_BUFFERS
+static const uint32_t video_yuv_formats[] = {
+	DRM_FORMAT_NV21,
+	DRM_FORMAT_NV12,
+	DRM_FORMAT_YVU420,
+	DRM_FORMAT_YVU420_ANDROID
+};
 // clang-format on
 
+static bool is_video_yuv_format(uint32_t format)
+{
+	size_t i;
+	for (i = 0; i < ARRAY_SIZE(video_yuv_formats); ++i) {
+		if (format == video_yuv_formats[i])
+			return true;
+	}
+	return false;
+}
+#endif
+
 static int mediatek_init(struct driver *drv)
 {
 	struct format_metadata metadata;
@@ -130,10 +151,17 @@ static int mediatek_bo_create_with_modifiers(struct bo *bo, uint32_t width, uint
 
 	/*
 	 * Since the ARM L1 cache line size is 64 bytes, align to that as a
-	 * performance optimization.
+	 * performance optimization, except for video buffers on certain platforms,
+	 * these should only be accessed from the GPU and VCODEC subsystems (maybe
+	 * also MDP), so it's better to align to macroblocks.
 	 */
 	stride = drv_stride_from_format(format, width, 0);
+#ifdef DONT_USE_64_ALIGNMENT_FOR_VIDEO_BUFFERS
+	const uint32_t alignment = is_video_yuv_format(format) ? 16 : 64;
+	stride = ALIGN(stride, alignment);
+#else
 	stride = ALIGN(stride, 64);
+#endif
 
 	if (bo->meta.use_flags & BO_USE_HW_VIDEO_ENCODER) {
 		uint32_t aligned_height = ALIGN(height, 32);