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| author | H. Peter Anvin <hpa@zytor.com> | 2018-06-25 17:15:08 -0700 |
|---|---|---|
| committer | H. Peter Anvin <hpa@zytor.com> | 2018-06-25 17:15:08 -0700 |
| commit | cd26fccab48bc35465e68d44a7432d1b1cca4d7e (patch) | |
| tree | 2a8b7ed835cf9a4271e36dfa600952c7e3004851 /test/v4.asm | |
| parent | 2bf35e0b026d937bbd1c5208c0060e36caacb7cc (diff) | |
| download | nasm-cd26fccab48bc35465e68d44a7432d1b1cca4d7e.tar.gz | |
asm: support the +n syntax for register sets
Support the +n syntax for multiple contiguous registers, and emit it
in the output from ndisasm as well.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Diffstat (limited to 'test/v4.asm')
| -rw-r--r-- | test/v4.asm | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/test/v4.asm b/test/v4.asm new file mode 100644 index 00000000..a64d3c66 --- /dev/null +++ b/test/v4.asm @@ -0,0 +1,12 @@ + bits 64 + v4fmaddps zmm0,zmm1+3,[rax] + v4fnmaddps zmm2,zmm3,[rax] + v4fmaddss zmm4,zmm5+3,[rax] + v4fnmaddss zmm6,zmm7+3,[rax] + + v4dpwssds zmm8,zmm9,[rax] + v4dpwssd zmm10,zmm11+3,[rax] + v4dpwssd zmm10+0,zmm11+3,[rax] +; v4dpwssd zmm10+1,zmm11+3,[rax] +; v4dpwssd zmm10,zmm11+4,[rax] +; v4dpwssd zmm10,zmm11+7,[rax] |