pw_cpu_exception_armv7m/pw_cpu_exception_armv7m_protos/cpu_state.proto


1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49

// Copyright 2020 The Pigweed Authors
//
// Licensed under the Apache License, Version 2.0 (the "License"); you may not
// use this file except in compliance with the License. You may obtain a copy of
// the License at
//
//     https://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
// WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
// License for the specific language governing permissions and limitations under
// the License.
syntax = "proto2";

package pw.cpu_exception.armv7m;

message ArmV7mCpuState {
  optional uint32 pc = 1;
  optional uint32 lr = 2;
  optional uint32 psr = 3;
  optional uint32 msp = 4;
  optional uint32 psp = 5;
  optional uint32 exc_return = 6;
  optional uint32 cfsr = 7;
  optional uint32 mmfar = 8;
  optional uint32 bfar = 9;
  optional uint32 icsr = 10;
  optional uint32 hfsr = 25;
  optional uint32 shcsr = 26;
  optional uint32 control = 11;

  // General purpose registers.
  optional uint32 r0 = 12;
  optional uint32 r1 = 13;
  optional uint32 r2 = 14;
  optional uint32 r3 = 15;
  optional uint32 r4 = 16;
  optional uint32 r5 = 17;
  optional uint32 r6 = 18;
  optional uint32 r7 = 19;
  optional uint32 r8 = 20;
  optional uint32 r9 = 21;
  optional uint32 r10 = 22;
  optional uint32 r11 = 23;
  optional uint32 r12 = 24;

  // Next tag: 27
}