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| author | John Kessenich <johnkslang@users.noreply.github.com> | 2019-07-12 18:31:09 -0600 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-07-12 18:31:09 -0600 |
| commit | 45c2cc37276d69e5b257507d97fd90d2a5684ccc (patch) | |
| tree | 7eab0354563829846f4f0587ada00d235c061ab6 | |
| parent | 29c11140baaf9f7fdaa39a583672c556bf1795a1 (diff) | |
| parent | 7971055a8bade5ed10662d624195483c2816ef39 (diff) | |
| download | spirv-headers-45c2cc37276d69e5b257507d97fd90d2a5684ccc.tar.gz | |
Merge pull request #122 from mkinsner/array_init_loop_control_bit
Reserve additional loop control bit for upcoming update to SPV_INTEL_fpga_loop_controls
| -rw-r--r-- | include/spirv/spir-v.xml | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/include/spirv/spir-v.xml b/include/spirv/spir-v.xml index 4b4dd5e..523460d 100644 --- a/include/spirv/spir-v.xml +++ b/include/spirv/spir-v.xml @@ -138,8 +138,8 @@ <!-- Reserved loop control bits --> <ids type="LoopControl" start="0" end="15" vendor="Khronos" comment="Reserved LoopControl bits, not available to vendors - see the SPIR-V Specification"/> - <ids type="LoopControl" start="16" end="18" vendor="Intel" comment="Contact michael.kinsner@intel.com"/> - <ids type="LoopControl" start="19" end="30" comment="Unreserved bits reservable for use by vendors"/> + <ids type="LoopControl" start="16" end="19" vendor="Intel" comment="Contact michael.kinsner@intel.com"/> + <ids type="LoopControl" start="20" end="30" comment="Unreserved bits reservable for use by vendors"/> <ids type="LoopControl" start="31" end="31" vendor="Khronos" comment="Reserved LoopControl bit, not available to vendors"/> </registry> |