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authorTadeusz Struk <tadeusz.struk@intel.com>2017-10-23 15:06:08 -0700
committerTadeusz Struk <tadeusz.struk@intel.com>2017-10-24 09:13:36 -0700
commitc8ac707c38e7096c0714cc9e1c91e48eb5f6b49d (patch)
tree79274b522dc483d2fc7fffa97c676c72a07449e6 /include
parent3c47161a6c78bb115a9d5875a1d8d7ebc6c723c9 (diff)
downloadtpm2-tss-c8ac707c38e7096c0714cc9e1c91e48eb5f6b49d.tar.gz
sysapi: add support for Intel PTT capability
Add support for Intel PTT specific capability query. Ported from 1.x branch PR: #505 "Ptt capabilities" Signed-off-by: Tadeusz Struk <tadeusz.struk@intel.com>
Diffstat (limited to 'include')
-rw-r--r--include/sapi/tss2_mu.h14
-rw-r--r--include/sapi/tss2_tpm2_types.h8
2 files changed, 22 insertions, 0 deletions
diff --git a/include/sapi/tss2_mu.h b/include/sapi/tss2_mu.h
index faa80da5..a23076cb 100644
--- a/include/sapi/tss2_mu.h
+++ b/include/sapi/tss2_mu.h
@@ -1359,6 +1359,20 @@ Tss2_MU_TPML_TAGGED_TPM_PROPERTY_Unmarshal(
TPML_TAGGED_TPM_PROPERTY *dest);
TSS2_RC
+Tss2_MU_TPML_INTEL_PTT_PROPERTY_Marshal(
+ TPML_INTEL_PTT_PROPERTY const *src,
+ uint8_t buffer[],
+ size_t buffer_size,
+ size_t *offset);
+
+TSS2_RC
+Tss2_MU_TPML_INTEL_PTT_PROPERTY_Unmarshal(
+ uint8_t const buffer[],
+ size_t buffer_size,
+ size_t *offset,
+ TPML_INTEL_PTT_PROPERTY *dest);
+
+TSS2_RC
Tss2_MU_TPMU_HA_Marshal(
TPMU_HA const *src,
uint32_t selector_value,
diff --git a/include/sapi/tss2_tpm2_types.h b/include/sapi/tss2_tpm2_types.h
index 33c4d5fa..e025852e 100644
--- a/include/sapi/tss2_tpm2_types.h
+++ b/include/sapi/tss2_tpm2_types.h
@@ -44,6 +44,7 @@
#define MAX_TPM_PROPERTIES (MAX_CAP_DATA/sizeof(TPMS_TAGGED_PROPERTY))
#define MAX_PCR_PROPERTIES (MAX_CAP_DATA/sizeof(TPMS_TAGGED_PCR_SELECT))
#define MAX_ECC_CURVES (MAX_CAP_DATA/sizeof(TPM_ECC_CURVE))
+#define MAX_PTT_PROPERTIES (MAX_CAP_DATA/sizeof(UINT32))
/* Table 5 Definition of Types for Documentation Clarity */
typedef UINT32 TPM_ALGORITHM_ID; /* this is the 1.2 compatible form of the TPM_ALG_ID */
@@ -1159,6 +1160,12 @@ typedef struct {
TPM_ECC_CURVE eccCurves[MAX_ECC_CURVES]; /* array of ECC curve identifiers */
} TPML_ECC_CURVE;
+/* Implementation specific structure to hold Intel PTT specific property data. */
+typedef struct {
+ UINT32 count; /* number of properties zero is allowed. */
+ UINT32 property[MAX_PTT_PROPERTIES]; /* property value */
+} TPML_INTEL_PTT_PROPERTY;
+
/* Table 107 Definition of TPMU_CAPABILITIES Union <OUT> */
typedef union {
TPML_ALG_PROPERTY algorithms; /* */
@@ -1170,6 +1177,7 @@ typedef union {
TPML_TAGGED_TPM_PROPERTY tpmProperties; /* */
TPML_TAGGED_PCR_PROPERTY pcrProperties; /* */
TPML_ECC_CURVE eccCurves; /* TPM_ALG_ECC */
+ TPML_INTEL_PTT_PROPERTY intelPttProperty;
char na; /* Not used. Common TPMU member only for parsing */
} TPMU_CAPABILITIES;