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| author | Elliott Hughes <enh@google.com> | 2021-05-05 01:10:24 +0000 |
|---|---|---|
| committer | Automerger Merge Worker <android-build-automerger-merge-worker@system.gserviceaccount.com> | 2021-05-05 01:10:24 +0000 |
| commit | e67e5115a7284278a0ef8d006202e53ae00617a1 (patch) | |
| tree | 2c903a06c69043afcb807fd90dcee781ce7cf442 | |
| parent | e72bbf53e3295f7a5b4d3d3179f13f3c333cf40e (diff) | |
| parent | 11c8562287464b76d10a061483d170e2ca5b9a4a (diff) | |
| download | tremolo-e67e5115a7284278a0ef8d006202e53ae00617a1.tar.gz | |
Merge "Fix ARM assembler to work with clang's as." am: c2d40e53e5 am: 16873a6b40 am: 5943036c6e am: 11c8562287
Original change: https://android-review.googlesource.com/c/platform/external/tremolo/+/1692372
Change-Id: Ie983bb08a172cb83c0b8a95358188724b5be9fdb
| -rw-r--r-- | Android.bp | 7 | ||||
| -rw-r--r-- | Tremolo/dpen.s | 4 | ||||
| -rw-r--r-- | Tremolo/mdctARM.s | 8 |
3 files changed, 12 insertions, 7 deletions
@@ -51,17 +51,14 @@ cc_library { arch: { arm: { + cflags: ["-D_ARM_ASSEM_"], + instruction_set: "arm", srcs: [ "Tremolo/bitwiseARM.s", "Tremolo/dpen.s", "Tremolo/floor1ARM.s", "Tremolo/mdctARM.s", ], - cflags: ["-D_ARM_ASSEM_"], - // Assembly code in asm_arm.h does not compile with Clang. - clang_asflags: ["-no-integrated-as"], - - instruction_set: "arm", }, arm64: { cflags: ["-DONLY_C"], diff --git a/Tremolo/dpen.s b/Tremolo/dpen.s index 3ed3b36..cc492cf 100644 --- a/Tremolo/dpen.s +++ b/Tremolo/dpen.s @@ -143,7 +143,7 @@ m1_loop: BLT duff CMP r8, r7 @ if bit==0 (chase+bit==chase) (sets C) - LDRNEB r14,[r6, r7] @ r14= t[chase] + LDRBNE r14,[r6, r7] @ r14= t[chase] MOVEQ r14,#128 ADC r12,r8, r6 @ r12= chase+bit+1+t LDRB r14,[r12,r14,LSR #7] @ r14= t[chase+bit+1+(!bit || t[chase]0x0x80)] @@ -202,7 +202,7 @@ m3_loop: MOV r7, r7, LSL #1 CMP r8, r7 @ if bit==0 (chase+bit==chase) sets C - LDRNEH r14,[r6, r7] @ r14= t[chase] + LDRHNE r14,[r6, r7] @ r14= t[chase] MOVEQ r14,#0x8000 ADC r12,r8, r14,LSR #15 @ r12= 1+((chase+bit)<<1)+(!bit || t[chase]0x0x8000) ADC r12,r12,r14,LSR #15 @ r12= t + (1+chase+bit+(!bit || t[chase]0x0x8000))<<1 diff --git a/Tremolo/mdctARM.s b/Tremolo/mdctARM.s index c403f6c..c16c5e9 100644 --- a/Tremolo/mdctARM.s +++ b/Tremolo/mdctARM.s @@ -55,6 +55,14 @@ .hidden sincos_lookup0 .hidden sincos_lookup1 + @ clang doesn't support ADRL. + @ Workaround based on that at https://bugs.llvm.org/show_bug.cgi?id=24350. + .macro ADRL reg:req, label:req + add \reg, pc, #((\label - .L_adrl_\@) & 0xff00) + add \reg, \reg, #((\label - .L_adrl_\@) - ((\label - .L_adrl_\@) & 0xff00)) + .L_adrl_\@: + .endm + mdct_unroll_prelap: @ r0 = out @ r1 = post |