diff options
| author | florian <florian@a5019735-40e9-0310-863c-91ae7b9d1cf9> | 2012-03-14 01:15:59 +0000 |
|---|---|---|
| committer | florian <florian@a5019735-40e9-0310-863c-91ae7b9d1cf9> | 2012-03-14 01:15:59 +0000 |
| commit | 561b8324821735f82981026232ec649b362ec6e2 (patch) | |
| tree | e70e172128b5f571574389b7e69bc2590186430b /coregrind/m_gdbserver/arm-vfpv3-valgrind-s1.xml | |
| parent | e2b8aa48c33250c1d15191ede66c5d7e492cd6a0 (diff) | |
| download | valgrind-561b8324821735f82981026232ec649b362ec6e2.tar.gz | |
Change the type of the shadow regs for floating point registers
to be uint64. Previously the value in such a shadow reg would
be interpreted by gdb as a floating point value which would
produce non-sensible output for e.g p/x $f1s1.
This patch covers the power and arm architectures.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@12444 a5019735-40e9-0310-863c-91ae7b9d1cf9
Diffstat (limited to 'coregrind/m_gdbserver/arm-vfpv3-valgrind-s1.xml')
| -rw-r--r-- | coregrind/m_gdbserver/arm-vfpv3-valgrind-s1.xml | 64 |
1 files changed, 32 insertions, 32 deletions
diff --git a/coregrind/m_gdbserver/arm-vfpv3-valgrind-s1.xml b/coregrind/m_gdbserver/arm-vfpv3-valgrind-s1.xml index 619f73fc9..c91f9c182 100644 --- a/coregrind/m_gdbserver/arm-vfpv3-valgrind-s1.xml +++ b/coregrind/m_gdbserver/arm-vfpv3-valgrind-s1.xml @@ -7,38 +7,38 @@ <!DOCTYPE feature SYSTEM "gdb-target.dtd"> <feature name="org.gnu.gdb.arm.vfp.valgrind.s1"> - <reg name="d0s1" bitsize="64" type="ieee_double"/> - <reg name="d1s1" bitsize="64" type="ieee_double"/> - <reg name="d2s1" bitsize="64" type="ieee_double"/> - <reg name="d3s1" bitsize="64" type="ieee_double"/> - <reg name="d4s1" bitsize="64" type="ieee_double"/> - <reg name="d5s1" bitsize="64" type="ieee_double"/> - <reg name="d6s1" bitsize="64" type="ieee_double"/> - <reg name="d7s1" bitsize="64" type="ieee_double"/> - <reg name="d8s1" bitsize="64" type="ieee_double"/> - <reg name="d9s1" bitsize="64" type="ieee_double"/> - <reg name="d10s1" bitsize="64" type="ieee_double"/> - <reg name="d11s1" bitsize="64" type="ieee_double"/> - <reg name="d12s1" bitsize="64" type="ieee_double"/> - <reg name="d13s1" bitsize="64" type="ieee_double"/> - <reg name="d14s1" bitsize="64" type="ieee_double"/> - <reg name="d15s1" bitsize="64" type="ieee_double"/> - <reg name="d16s1" bitsize="64" type="ieee_double"/> - <reg name="d17s1" bitsize="64" type="ieee_double"/> - <reg name="d18s1" bitsize="64" type="ieee_double"/> - <reg name="d19s1" bitsize="64" type="ieee_double"/> - <reg name="d20s1" bitsize="64" type="ieee_double"/> - <reg name="d21s1" bitsize="64" type="ieee_double"/> - <reg name="d22s1" bitsize="64" type="ieee_double"/> - <reg name="d23s1" bitsize="64" type="ieee_double"/> - <reg name="d24s1" bitsize="64" type="ieee_double"/> - <reg name="d25s1" bitsize="64" type="ieee_double"/> - <reg name="d26s1" bitsize="64" type="ieee_double"/> - <reg name="d27s1" bitsize="64" type="ieee_double"/> - <reg name="d28s1" bitsize="64" type="ieee_double"/> - <reg name="d29s1" bitsize="64" type="ieee_double"/> - <reg name="d30s1" bitsize="64" type="ieee_double"/> - <reg name="d31s1" bitsize="64" type="ieee_double"/> + <reg name="d0s1" bitsize="64" type="uint64"/> + <reg name="d1s1" bitsize="64" type="uint64"/> + <reg name="d2s1" bitsize="64" type="uint64"/> + <reg name="d3s1" bitsize="64" type="uint64"/> + <reg name="d4s1" bitsize="64" type="uint64"/> + <reg name="d5s1" bitsize="64" type="uint64"/> + <reg name="d6s1" bitsize="64" type="uint64"/> + <reg name="d7s1" bitsize="64" type="uint64"/> + <reg name="d8s1" bitsize="64" type="uint64"/> + <reg name="d9s1" bitsize="64" type="uint64"/> + <reg name="d10s1" bitsize="64" type="uint64"/> + <reg name="d11s1" bitsize="64" type="uint64"/> + <reg name="d12s1" bitsize="64" type="uint64"/> + <reg name="d13s1" bitsize="64" type="uint64"/> + <reg name="d14s1" bitsize="64" type="uint64"/> + <reg name="d15s1" bitsize="64" type="uint64"/> + <reg name="d16s1" bitsize="64" type="uint64"/> + <reg name="d17s1" bitsize="64" type="uint64"/> + <reg name="d18s1" bitsize="64" type="uint64"/> + <reg name="d19s1" bitsize="64" type="uint64"/> + <reg name="d20s1" bitsize="64" type="uint64"/> + <reg name="d21s1" bitsize="64" type="uint64"/> + <reg name="d22s1" bitsize="64" type="uint64"/> + <reg name="d23s1" bitsize="64" type="uint64"/> + <reg name="d24s1" bitsize="64" type="uint64"/> + <reg name="d25s1" bitsize="64" type="uint64"/> + <reg name="d26s1" bitsize="64" type="uint64"/> + <reg name="d27s1" bitsize="64" type="uint64"/> + <reg name="d28s1" bitsize="64" type="uint64"/> + <reg name="d29s1" bitsize="64" type="uint64"/> + <reg name="d30s1" bitsize="64" type="uint64"/> + <reg name="d31s1" bitsize="64" type="uint64"/> <reg name="fpscrs1" bitsize="32" type="int" group="float"/> </feature> |