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authorMartyn Capewell <martyn.capewell@arm.com>2020-11-10 16:12:34 +0000
committerMartyn Capewell <martyn.capewell@arm.com>2020-11-10 16:13:48 +0000
commitacdea50affb94d2b855be986057555355f5067bc (patch)
treef13e4ebd590d42c93415468e8bc0bc6d91a9b0e6
parentd42989cf6d64f4d4f14dad7014bec0ca084f1af1 (diff)
downloadvixl-acdea50affb94d2b855be986057555355f5067bc.tar.gz
Remove "dummy" from test and tools
Change-Id: I5a237ee9225fd1c8f758498d72658ffbf1a90a61
-rw-r--r--test/aarch64/test-api-aarch64.cc2
-rw-r--r--test/aarch64/test-assembler-aarch64.cc4
-rw-r--r--test/aarch64/test-assembler-sve-aarch64.cc62
-rw-r--r--test/aarch64/test-disasm-aarch64.cc10
-rw-r--r--test/aarch64/test-simulator-traces-aarch64.h16
-rw-r--r--test/test-code-buffer.cc2
-rwxr-xr-xtools/generate_simulator_traces.py10
-rwxr-xr-xtools/generate_tests.py6
8 files changed, 56 insertions, 56 deletions
diff --git a/test/aarch64/test-api-aarch64.cc b/test/aarch64/test-api-aarch64.cc
index b2a7f663..b25fa7cb 100644
--- a/test/aarch64/test-api-aarch64.cc
+++ b/test/aarch64/test-api-aarch64.cc
@@ -344,7 +344,7 @@ static void CPURegisterByValueHelper(CPURegister reg) {
// generate a function using VIXL instead.
MacroAssembler masm;
- // CPURegister fn(int dummy, CPURegister reg);
+ // CPURegister fn(int placeholder, CPURegister reg);
// Move `reg` to its result register.
__ Mov(x0, x1);
// Clobber all other result registers.
diff --git a/test/aarch64/test-assembler-aarch64.cc b/test/aarch64/test-assembler-aarch64.cc
index 8f73127d..e23bd8ce 100644
--- a/test/aarch64/test-assembler-aarch64.cc
+++ b/test/aarch64/test-assembler-aarch64.cc
@@ -8692,7 +8692,7 @@ static void PushPopWXOverlapHelper(int reg_count, int claim) {
if (active_w_slots > requested_w_slots) {
__ Drop((active_w_slots - requested_w_slots) * kWRegSizeInBytes);
// Bump the number of active W-sized slots back to where it should be,
- // and fill the empty space with a dummy value.
+ // and fill the empty space with a placeholder value.
do {
stack[active_w_slots--] = 0xdeadbeef;
} while (active_w_slots > requested_w_slots);
@@ -13315,7 +13315,7 @@ TEST(runtime_calls) {
__ Ret();
__ Bind(&after_function);
- // Call our dummy function, taking care to preserve the link register.
+ // Call our placeholder function, taking care to preserve the link register.
__ Push(ip0, lr);
__ Bl(&function);
__ Pop(lr, ip0);
diff --git a/test/aarch64/test-assembler-sve-aarch64.cc b/test/aarch64/test-assembler-sve-aarch64.cc
index de7f58b7..7f0c178b 100644
--- a/test/aarch64/test-assembler-sve-aarch64.cc
+++ b/test/aarch64/test-assembler-sve-aarch64.cc
@@ -1636,45 +1636,45 @@ TEST_SVE(sve_sqinc_sqdec_p_scalar) {
int p0_s_count = 3;
int p0_d_count = 2;
- uint64_t dummy_high = 0x1234567800000000;
+ uint64_t placeholder_high = 0x1234567800000000;
// 64-bit operations preserve their high bits.
- __ Mov(x0, dummy_high + 42);
+ __ Mov(x0, placeholder_high + 42);
__ Sqdecp(x0, p0.VnB());
- __ Mov(x1, dummy_high + 42);
+ __ Mov(x1, placeholder_high + 42);
__ Sqincp(x1, p0.VnH());
// 32-bit operations sign-extend into their high bits.
- __ Mov(x2, dummy_high + 42);
+ __ Mov(x2, placeholder_high + 42);
__ Sqdecp(x2, p0.VnS(), w2);
- __ Mov(x3, dummy_high + 42);
+ __ Mov(x3, placeholder_high + 42);
__ Sqincp(x3, p0.VnD(), w3);
- __ Mov(x4, dummy_high + 1);
+ __ Mov(x4, placeholder_high + 1);
__ Sqdecp(x4, p0.VnS(), w4);
- __ Mov(x5, dummy_high - 1);
+ __ Mov(x5, placeholder_high - 1);
__ Sqincp(x5, p0.VnD(), w5);
// Check that saturation behaves correctly.
__ Mov(x10, 0x8000000000000001); // INT64_MIN + 1
__ Sqdecp(x10, p0.VnB());
- __ Mov(x11, dummy_high + 0x80000001); // INT32_MIN + 1
+ __ Mov(x11, placeholder_high + 0x80000001); // INT32_MIN + 1
__ Sqdecp(x11, p0.VnH(), w11);
__ Mov(x12, 1);
__ Sqdecp(x12, p0.VnS());
- __ Mov(x13, dummy_high + 1);
+ __ Mov(x13, placeholder_high + 1);
__ Sqdecp(x13, p0.VnD(), w13);
__ Mov(x14, 0x7ffffffffffffffe); // INT64_MAX - 1
__ Sqincp(x14, p0.VnB());
- __ Mov(x15, dummy_high + 0x7ffffffe); // INT32_MAX - 1
+ __ Mov(x15, placeholder_high + 0x7ffffffe); // INT32_MAX - 1
__ Sqincp(x15, p0.VnH(), w15);
// Don't use x16 and x17 since they are scratch registers by default.
@@ -1682,10 +1682,10 @@ TEST_SVE(sve_sqinc_sqdec_p_scalar) {
__ Mov(x18, 0xffffffffffffffff);
__ Sqincp(x18, p0.VnS());
- __ Mov(x19, dummy_high + 0xffffffff);
+ __ Mov(x19, placeholder_high + 0xffffffff);
__ Sqincp(x19, p0.VnD(), w19);
- __ Mov(x20, dummy_high + 0xffffffff);
+ __ Mov(x20, placeholder_high + 0xffffffff);
__ Sqdecp(x20, p0.VnB(), w20);
// With an all-true predicate, these instructions increment or decrement by
@@ -1698,10 +1698,10 @@ TEST_SVE(sve_sqinc_sqdec_p_scalar) {
__ Mov(x22, 0);
__ Sqincp(x22, p15.VnH());
- __ Mov(x23, dummy_high);
+ __ Mov(x23, placeholder_high);
__ Sqdecp(x23, p15.VnS(), w23);
- __ Mov(x24, dummy_high);
+ __ Mov(x24, placeholder_high);
__ Sqincp(x24, p15.VnD(), w24);
END();
@@ -1709,8 +1709,8 @@ TEST_SVE(sve_sqinc_sqdec_p_scalar) {
RUN();
// 64-bit operations preserve their high bits.
- ASSERT_EQUAL_64(dummy_high + 42 - p0_b_count, x0);
- ASSERT_EQUAL_64(dummy_high + 42 + p0_h_count, x1);
+ ASSERT_EQUAL_64(placeholder_high + 42 - p0_b_count, x0);
+ ASSERT_EQUAL_64(placeholder_high + 42 + p0_h_count, x1);
// 32-bit operations sign-extend into their high bits.
ASSERT_EQUAL_64(42 - p0_s_count, x2);
@@ -1749,45 +1749,45 @@ TEST_SVE(sve_uqinc_uqdec_p_scalar) {
int p0_s_count = 3;
int p0_d_count = 2;
- uint64_t dummy_high = 0x1234567800000000;
+ uint64_t placeholder_high = 0x1234567800000000;
// 64-bit operations preserve their high bits.
- __ Mov(x0, dummy_high + 42);
+ __ Mov(x0, placeholder_high + 42);
__ Uqdecp(x0, p0.VnB());
- __ Mov(x1, dummy_high + 42);
+ __ Mov(x1, placeholder_high + 42);
__ Uqincp(x1, p0.VnH());
// 32-bit operations zero-extend into their high bits.
- __ Mov(x2, dummy_high + 42);
+ __ Mov(x2, placeholder_high + 42);
__ Uqdecp(x2, p0.VnS(), w2);
- __ Mov(x3, dummy_high + 42);
+ __ Mov(x3, placeholder_high + 42);
__ Uqincp(x3, p0.VnD(), w3);
- __ Mov(x4, dummy_high + 0x80000001);
+ __ Mov(x4, placeholder_high + 0x80000001);
__ Uqdecp(x4, p0.VnS(), w4);
- __ Mov(x5, dummy_high + 0x7fffffff);
+ __ Mov(x5, placeholder_high + 0x7fffffff);
__ Uqincp(x5, p0.VnD(), w5);
// Check that saturation behaves correctly.
__ Mov(x10, 1);
__ Uqdecp(x10, p0.VnB(), x10);
- __ Mov(x11, dummy_high + 1);
+ __ Mov(x11, placeholder_high + 1);
__ Uqdecp(x11, p0.VnH(), w11);
__ Mov(x12, 0x8000000000000000); // INT64_MAX + 1
__ Uqdecp(x12, p0.VnS(), x12);
- __ Mov(x13, dummy_high + 0x80000000); // INT32_MAX + 1
+ __ Mov(x13, placeholder_high + 0x80000000); // INT32_MAX + 1
__ Uqdecp(x13, p0.VnD(), w13);
__ Mov(x14, 0xfffffffffffffffe); // UINT64_MAX - 1
__ Uqincp(x14, p0.VnB(), x14);
- __ Mov(x15, dummy_high + 0xfffffffe); // UINT32_MAX - 1
+ __ Mov(x15, placeholder_high + 0xfffffffe); // UINT32_MAX - 1
__ Uqincp(x15, p0.VnH(), w15);
// Don't use x16 and x17 since they are scratch registers by default.
@@ -1795,7 +1795,7 @@ TEST_SVE(sve_uqinc_uqdec_p_scalar) {
__ Mov(x18, 0x7ffffffffffffffe); // INT64_MAX - 1
__ Uqincp(x18, p0.VnS(), x18);
- __ Mov(x19, dummy_high + 0x7ffffffe); // INT32_MAX - 1
+ __ Mov(x19, placeholder_high + 0x7ffffffe); // INT32_MAX - 1
__ Uqincp(x19, p0.VnD(), w19);
// With an all-true predicate, these instructions increment or decrement by
@@ -1808,10 +1808,10 @@ TEST_SVE(sve_uqinc_uqdec_p_scalar) {
__ Mov(x21, 0x4000000000000000);
__ Uqincp(x21, p15.VnH(), x21);
- __ Mov(x22, dummy_high + 0x40000000);
+ __ Mov(x22, placeholder_high + 0x40000000);
__ Uqdecp(x22, p15.VnS(), w22);
- __ Mov(x23, dummy_high + 0x40000000);
+ __ Mov(x23, placeholder_high + 0x40000000);
__ Uqincp(x23, p15.VnD(), w23);
END();
@@ -1819,8 +1819,8 @@ TEST_SVE(sve_uqinc_uqdec_p_scalar) {
RUN();
// 64-bit operations preserve their high bits.
- ASSERT_EQUAL_64(dummy_high + 42 - p0_b_count, x0);
- ASSERT_EQUAL_64(dummy_high + 42 + p0_h_count, x1);
+ ASSERT_EQUAL_64(placeholder_high + 42 - p0_b_count, x0);
+ ASSERT_EQUAL_64(placeholder_high + 42 + p0_h_count, x1);
// 32-bit operations zero-extend into their high bits.
ASSERT_EQUAL_64(42 - p0_s_count, x2);
diff --git a/test/aarch64/test-disasm-aarch64.cc b/test/aarch64/test-disasm-aarch64.cc
index 0051d0c7..4c5f5951 100644
--- a/test/aarch64/test-disasm-aarch64.cc
+++ b/test/aarch64/test-disasm-aarch64.cc
@@ -3048,11 +3048,11 @@ TEST(bti) {
COMPARE(hint(BTI_j), "bti j");
COMPARE(hint(BTI_jc), "bti jc");
- Label dummy1, dummy2, dummy3, dummy4;
- COMPARE_MACRO(Bind(&dummy1, EmitBTI), "bti");
- COMPARE_MACRO(Bind(&dummy2, EmitBTI_c), "bti c");
- COMPARE_MACRO(Bind(&dummy3, EmitBTI_j), "bti j");
- COMPARE_MACRO(Bind(&dummy4, EmitBTI_jc), "bti jc");
+ Label placeholder1, placeholder2, placeholder3, placeholder4;
+ COMPARE_MACRO(Bind(&placeholder1, EmitBTI), "bti");
+ COMPARE_MACRO(Bind(&placeholder2, EmitBTI_c), "bti c");
+ COMPARE_MACRO(Bind(&placeholder3, EmitBTI_j), "bti j");
+ COMPARE_MACRO(Bind(&placeholder4, EmitBTI_jc), "bti jc");
CLEANUP();
}
diff --git a/test/aarch64/test-simulator-traces-aarch64.h b/test/aarch64/test-simulator-traces-aarch64.h
index 03b58190..db57bb46 100644
--- a/test/aarch64/test-simulator-traces-aarch64.h
+++ b/test/aarch64/test-simulator-traces-aarch64.h
@@ -41,19 +41,19 @@ extern "C" {
#include <stdint.h>
}
-// To add a new simulator test to test-simulator-aarch64.cc, add dummy array(s)
-// below to build test-simulator-aarch64 for reference platform. Then, run
-// tools/generate_simulator_traces.py on a reference platform to regenerate this
-// file and traces files.
+// To add a new simulator test to test-simulator-aarch64.cc, add placeholder
+// array(s) below to build test-simulator-aarch64 for reference platform. Then,
+// run tools/generate_simulator_traces.py on a reference platform to regenerate
+// this file and traces files.
// ---------------------------------------------------------------------
// ADD DUMMY ARRAYS FOR NEW SIMULATOR TEST HERE.
// ---------------------------------------------------------------------
-const uint64_t kExpected_dummy_64[] = {0};
-const size_t kExpectedCount_dummy_64 = 0;
+const uint64_t kExpected_placeholder_64[] = {0};
+const size_t kExpectedCount_placeholder_64 = 0;
-const uint32_t kExpected_dummy_32[] = {0};
-const size_t kExpectedCount_dummy_32 = 0;
+const uint32_t kExpected_placeholder_32[] = {0};
+const size_t kExpectedCount_placeholder_32 = 0;
// ---------------------------------------------------------------------
// Simulator test trace output files.
diff --git a/test/test-code-buffer.cc b/test/test-code-buffer.cc
index b2c16a35..26da7f71 100644
--- a/test/test-code-buffer.cc
+++ b/test/test-code-buffer.cc
@@ -72,7 +72,7 @@ TEST(defaults) {
TEST(reset) {
CodeBuffer buffer;
// Update the buffer by writing to it.
- buffer.Emit("dummy data");
+ buffer.Emit("placeholder data");
VIXL_CHECK(buffer.IsDirty());
VIXL_CHECK(buffer.GetSizeInBytes() > 0);
// Calling Reset() should reset it back to its default state. (It does not
diff --git a/tools/generate_simulator_traces.py b/tools/generate_simulator_traces.py
index f0c43b39..3e25b0d3 100755
--- a/tools/generate_simulator_traces.py
+++ b/tools/generate_simulator_traces.py
@@ -77,7 +77,7 @@ extern "C" {
#include <stdint.h>
}
-// To add a new simulator test to test-simulator-aarch64.cc, add dummy array(s)
+// To add a new simulator test to test-simulator-aarch64.cc, add placeholder array(s)
// below to build test-simulator-aarch64 for reference platform. Then, run
// tools/generate_simulator_traces.py on a reference platform to regenerate this
// file and traces files.
@@ -85,11 +85,11 @@ extern "C" {
// ---------------------------------------------------------------------
// ADD DUMMY ARRAYS FOR NEW SIMULATOR TEST HERE.
// ---------------------------------------------------------------------
-const uint64_t kExpected_dummy_64[] = {0};
-const size_t kExpectedCount_dummy_64 = 0;
+const uint64_t kExpected_placeholder_64[] = {0};
+const size_t kExpectedCount_placeholder_64 = 0;
-const uint32_t kExpected_dummy_32[] = {0};
-const size_t kExpectedCount_dummy_32 = 0;
+const uint32_t kExpected_placeholder_32[] = {0};
+const size_t kExpectedCount_placeholder_32 = 0;
// ---------------------------------------------------------------------
// Simulator test trace output files.
diff --git a/tools/generate_tests.py b/tools/generate_tests.py
index edc9f2db..c64bf4f6 100755
--- a/tools/generate_tests.py
+++ b/tools/generate_tests.py
@@ -48,7 +48,7 @@ present in the `default_config_files` list. For example:
- test/aarch32/test-assembler-cond-rd-rn-rm-ge-a32.cc
Because these test cases need traces in order to build, the script will have
-generated dummy trace files in `test/aarch32/traces/`. If you look at them
+generated placeholder trace files in `test/aarch32/traces/`. If you look at them
you'll see they are basically empty:
$ cat test/aarch32/traces/sim-cond-rd-rn-immediate-adc-a32.h
@@ -692,7 +692,7 @@ def BuildOptions():
default=multiprocessing.cpu_count(),
help='Allow N jobs at once')
result.add_argument('--skip-traces', action='store_true',
- help='Skip generation of dummy traces.')
+ help='Skip generation of placeholder traces.')
return result.parse_args()
@@ -773,7 +773,7 @@ def GenerateTest(generator, clang_format, skip_traces):
out, _ = proc.communicate(generated_file.encode())
f.write(out.decode())
if not skip_traces:
- # Write dummy trace files into 'test/aarch32/traces/'.
+ # Write placeholder trace files into 'test/aarch32/traces/'.
generator.WriteEmptyTraces("test/aarch32/traces/")
print("Generated {} {} test for \"{}\".".format(generator.test_isa.upper(),
generator.test_type,