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authorMartyn Capewell <martyn.capewell@arm.com>2020-09-23 11:30:53 +0100
committerMartyn Capewell <martyn.capewell@arm.com>2020-10-30 10:13:26 +0000
commita26a26cbabf8b4ce67a96c9fc757bbe85818b173 (patch)
treec996c60ade142d59ecca3ac9ce0fee16c4d4f9ea /src
parent6f755e6aa9aee82a1754a2f04cbcbc38a87e37d2 (diff)
downloadvixl-a26a26cbabf8b4ce67a96c9fc757bbe85818b173.tar.gz
Don't simulate invalid logical immediate instructions
Logical immediate instructions using an immediate encoding that should be reserved were being simulated. Prevent this by asserting the immediate is valid. Change-Id: Ic0388f3f941914d9fae92e0961c2ebf10c3a5d0b
Diffstat (limited to 'src')
-rw-r--r--src/aarch64/simulator-aarch64.cc6
1 files changed, 5 insertions, 1 deletions
diff --git a/src/aarch64/simulator-aarch64.cc b/src/aarch64/simulator-aarch64.cc
index 6d6d1677..692a0596 100644
--- a/src/aarch64/simulator-aarch64.cc
+++ b/src/aarch64/simulator-aarch64.cc
@@ -1894,7 +1894,11 @@ void Simulator::VisitLogicalShifted(const Instruction* instr) {
void Simulator::VisitLogicalImmediate(const Instruction* instr) {
- LogicalHelper(instr, instr->GetImmLogical());
+ if (instr->GetImmLogical() == 0) {
+ VIXL_UNIMPLEMENTED();
+ } else {
+ LogicalHelper(instr, instr->GetImmLogical());
+ }
}