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authorJacob Bramley <jacob.bramley@arm.com>2018-08-24 17:51:52 +0100
committerJacob Bramley <jacob.bramley@arm.com>2018-08-28 15:33:22 +0100
commit364c82b15129b5f168e450356ee0abd0e62ffa15 (patch)
treee89f3c234f7fd410d0c161da877cbade81167823 /test/aarch64
parentf658ca1813c32f483f20f75a4be0947ef66b442f (diff)
downloadvixl-364c82b15129b5f168e450356ee0abd0e62ffa15.tar.gz
Make disassembly of FC* more precise.
FCADD and FCMLA both span multiple opcodes, so it is not easy to represent them with the Fixed/FMask/Mask structure that we usually use. In particular, the Disassembler and Simulator would handle some unallocated encodings as FCADD instructions. This patch makes disassembly precise. Change-Id: Ia0bda19489b2a1744b52a717ee7d6dc1b309184d
Diffstat (limited to 'test/aarch64')
-rw-r--r--test/aarch64/test-disasm-aarch64.cc6
1 files changed, 6 insertions, 0 deletions
diff --git a/test/aarch64/test-disasm-aarch64.cc b/test/aarch64/test-disasm-aarch64.cc
index 64be553d..426319ff 100644
--- a/test/aarch64/test-disasm-aarch64.cc
+++ b/test/aarch64/test-disasm-aarch64.cc
@@ -4735,6 +4735,12 @@ TEST(neon_3same_extra_fcadd) {
COMPARE_MACRO(Fcmla(v21.V2D(), v22.V2D(), v23.V2D(), 0),
"fcmla v21.2d, v22.2d, v23.2d, #0");
+ // The FC* instructions span multiple opcodes, so they have special cases in
+ // the disassembler. Verify that similar encodings don't get disassembled as
+ // FC* instructions.
+ COMPARE(dci(0x2e00ec00), "unallocated (Unallocated)"); // opcode = 0x1101
+ COMPARE(dci(0x2e00fc00), "unallocated (Unallocated)"); // opcode = 0x1111
+
CLEANUP();
}