Add support for dot product instructions.

Add support for v8.2 signed and unsigned dot product instructions: Sdot
and Udot.

Change-Id: I19d0ad1ad962e6c2a72efe8f62a4512e430b5e33

2 files changed, 83 insertions, 0 deletions

diff --git a/test/aarch64/test-assembler-aarch64.cc b/test/aarch64/test-assembler-aarch64.cc
index a93319a8..2f58d216 100644
--- a/test/aarch64/test-assembler-aarch64.cc
+++ b/test/aarch64/test-assembler-aarch64.cc
@@ -17800,6 +17800,71 @@ TEST(neon_byelement_sqrdmlsh) {
   TEARDOWN();
 }
 
+TEST(neon_3same_sdot_udot) {
+  SETUP();
+
+  START();
+
+  __ Movi(v0.V2D(), 0x7122712271227122, 0x7122712271227122);
+  __ Movi(v1.V2D(), 0xe245e245f245f245, 0xe245e245f245f245);
+  __ Movi(v2.V2D(), 0x3939393900000000, 0x3939393900000000);
+
+  __ Movi(v16.V2D(), 0x0000400000004000, 0x0000400000004000);
+  __ Movi(v17.V2D(), 0x0000400000004000, 0x0000400000004000);
+  __ Movi(v18.V2D(), 0x0000400000004000, 0x0000400000004000);
+  __ Movi(v19.V2D(), 0x0000400000004000, 0x0000400000004000);
+
+  __ Sdot(v16.V4S(), v0.V16B(), v1.V16B());
+  __ Sdot(v17.V2S(), v1.V8B(), v2.V8B());
+
+  __ Udot(v18.V4S(), v0.V16B(), v1.V16B());
+  __ Udot(v19.V2S(), v1.V8B(), v2.V8B());
+
+  END();
+
+// TODO: test on real hardware when available
+#ifdef VIXL_INCLUDE_SIMULATOR_AARCH64
+  RUN();
+  ASSERT_EQUAL_128(0x000037d8000045f8, 0x000037d8000045f8, q16);
+  ASSERT_EQUAL_128(0, 0x0000515e00004000, q17);
+  ASSERT_EQUAL_128(0x000119d8000127f8, 0x000119d8000127f8, q18);
+  ASSERT_EQUAL_128(0, 0x0000c35e00004000, q19);
+#endif
+  TEARDOWN();
+}
+
+TEST(neon_byelement_sdot_udot) {
+  SETUP();
+
+  START();
+
+  __ Movi(v0.V2D(), 0x7122712271227122, 0x7122712271227122);
+  __ Movi(v1.V2D(), 0xe245e245f245f245, 0xe245e245f245f245);
+  __ Movi(v2.V2D(), 0x3939393900000000, 0x3939393900000000);
+
+  __ Movi(v16.V2D(), 0x0000400000004000, 0x0000400000004000);
+  __ Movi(v17.V2D(), 0x0000400000004000, 0x0000400000004000);
+  __ Movi(v18.V2D(), 0x0000400000004000, 0x0000400000004000);
+  __ Movi(v19.V2D(), 0x0000400000004000, 0x0000400000004000);
+
+  __ Sdot(v16.V4S(), v0.V16B(), v1.S4B(), 1);
+  __ Sdot(v17.V2S(), v1.V8B(), v2.S4B(), 1);
+
+  __ Udot(v18.V4S(), v0.V16B(), v1.S4B(), 1);
+  __ Udot(v19.V2S(), v1.V8B(), v2.S4B(), 1);
+
+  END();
+
+#ifdef VIXL_INCLUDE_SIMULATOR_AARCH64
+  RUN();
+  ASSERT_EQUAL_128(0x000037d8000037d8, 0x000037d8000037d8, q16);
+  ASSERT_EQUAL_128(0, 0x0000515e0000587e, q17);
+  ASSERT_EQUAL_128(0x000119d8000119d8, 0x000119d8000119d8, q18);
+  ASSERT_EQUAL_128(0, 0x0000c35e0000ca7e, q19);
+#endif
+  TEARDOWN();
+}
+
 
 TEST(neon_2regmisc_saddlp) {
   SETUP();
diff --git a/test/aarch64/test-disasm-aarch64.cc b/test/aarch64/test-disasm-aarch64.cc
index fefaffe9..3c900d6a 100644
--- a/test/aarch64/test-disasm-aarch64.cc
+++ b/test/aarch64/test-disasm-aarch64.cc
@@ -4580,6 +4580,14 @@ TEST(neon_3same) {
   NEON_FORMAT_LIST_HS(DISASM_INST)
 #undef DISASM_INST
 
+  COMPARE_MACRO(Sdot(v1.V2S(), v2.V8B(), v3.V8B()), "sdot v1.2s, v2.8b, v3.8b");
+  COMPARE_MACRO(Sdot(v1.V4S(), v2.V16B(), v3.V16B()),
+                "sdot v1.4s, v2.16b, v3.16b");
+
+  COMPARE_MACRO(Udot(v1.V2S(), v2.V8B(), v3.V8B()), "udot v1.2s, v2.8b, v3.8b");
+  COMPARE_MACRO(Udot(v1.V4S(), v2.V16B(), v3.V16B()),
+                "udot v1.4s, v2.16b, v3.16b");
+
   COMPARE_MACRO(And(v6.V8B(), v7.V8B(), v8.V8B()), "and v6.8b, v7.8b, v8.8b");
   COMPARE_MACRO(And(v6.V16B(), v7.V16B(), v8.V16B()),
                 "and v6.16b, v7.16b, v8.16b");
@@ -4965,6 +4973,11 @@ TEST(neon_byelement) {
   COMPARE_MACRO(Sqrdmulh(h0, h1, v2.H(), 0), "sqrdmulh h0, h1, v2.h[0]");
   COMPARE_MACRO(Sqrdmulh(s0, s1, v2.S(), 0), "sqrdmulh s0, s1, v2.s[0]");
 
+  COMPARE_MACRO(Sdot(v0.V2S(), v1.V8B(), v2.S4B(), 0),
+                "sdot v0.2s, v1.8b, v2.4b[0]");
+  COMPARE_MACRO(Sdot(v2.V4S(), v3.V16B(), v15.S4B(), 3),
+                "sdot v2.4s, v3.16b, v15.4b[3]");
+
   COMPARE_MACRO(Sqrdmlah(v0.V4H(), v1.V4H(), v2.H(), 0),
                 "sqrdmlah v0.4h, v1.4h, v2.h[0]");
   COMPARE_MACRO(Sqrdmlah(v2.V8H(), v3.V8H(), v15.H(), 7),
@@ -4976,6 +4989,11 @@ TEST(neon_byelement) {
   COMPARE_MACRO(Sqrdmlah(h0, h1, v2.H(), 0), "sqrdmlah h0, h1, v2.h[0]");
   COMPARE_MACRO(Sqrdmlah(s0, s1, v2.S(), 0), "sqrdmlah s0, s1, v2.s[0]");
 
+  COMPARE_MACRO(Udot(v0.V2S(), v1.V8B(), v2.S4B(), 0),
+                "udot v0.2s, v1.8b, v2.4b[0]");
+  COMPARE_MACRO(Udot(v2.V4S(), v3.V16B(), v15.S4B(), 3),
+                "udot v2.4s, v3.16b, v15.4b[3]");
+
   COMPARE_MACRO(Sqrdmlsh(v0.V4H(), v1.V4H(), v2.H(), 0),
                 "sqrdmlsh v0.4h, v1.4h, v2.h[0]");
   COMPARE_MACRO(Sqrdmlsh(v2.V8H(), v3.V8H(), v15.H(), 7),