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| author | Martyn Capewell <martyn.capewell@arm.com> | 2017-07-11 11:23:31 +0100 |
|---|---|---|
| committer | Martyn Capewell <martyn.capewell@arm.com> | 2017-07-11 11:23:31 +0100 |
| commit | b106626553485e688388d1acd08347a8252704aa (patch) | |
| tree | 3a898c61d27c0978f4a1d014d37e432b676785c0 /test/aarch64 | |
| parent | ea6eb28675beac69ad71475524e7d49a8a2f2ce8 (diff) | |
| download | vixl-b106626553485e688388d1acd08347a8252704aa.tar.gz | |
Disassemble system registers in mrs/msr.
When a system register's name is not known to VIXL, disassemble it in
S<op0>_<op1>_<Cn>_<Cm>_<op2> format.
Change-Id: Ieee267ce758e39670d8440f7fd1b37fdbbbba735
Diffstat (limited to 'test/aarch64')
| -rw-r--r-- | test/aarch64/test-disasm-aarch64.cc | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/test/aarch64/test-disasm-aarch64.cc b/test/aarch64/test-disasm-aarch64.cc index a4789d79..b4dc79e5 100644 --- a/test/aarch64/test-disasm-aarch64.cc +++ b/test/aarch64/test-disasm-aarch64.cc @@ -2790,6 +2790,10 @@ TEST(system_mrs) { COMPARE(mrs(x30, NZCV), "mrs x30, nzcv"); COMPARE(mrs(x15, FPCR), "mrs x15, fpcr"); + // Test mrs that use system registers we haven't named. + COMPARE(dci(MRS | (0x5555 << 5)), "mrs x0, S3_2_10_10_5"); + COMPARE(dci(0xd53e1000), "mrs x0, S3_6_1_0_0"); + CLEANUP(); } @@ -2801,6 +2805,10 @@ TEST(system_msr) { COMPARE(msr(NZCV, x30), "msr nzcv, x30"); COMPARE(msr(FPCR, x15), "msr fpcr, x15"); + // Test msr that use system registers we haven't named. + COMPARE(dci(MSR | (0x1234 << 5)), "msr S2_2_4_6_4, x0"); + COMPARE(dci(0xd51e1000), "msr S3_6_1_0_0, x0"); + CLEANUP(); } |