Remove the old FPRegister type alias.

Change-Id: Ia43cd9e23736fa4130ab0416889289b559ee2467

6 files changed, 150 insertions, 91 deletions

diff --git a/test/aarch64/test-api-aarch64.cc b/test/aarch64/test-api-aarch64.cc
index 1cb66cd7..bfb8304f 100644
--- a/test/aarch64/test-api-aarch64.cc
+++ b/test/aarch64/test-api-aarch64.cc
@@ -172,8 +172,8 @@ TEST(register_bit) {
 
 
 TEST(noreg) {
-  VIXL_CHECK(NoReg.Is(NoFPReg));
-  VIXL_CHECK(NoFPReg.Is(NoReg));
+  VIXL_CHECK(NoReg.Is(NoVReg));
+  VIXL_CHECK(NoVReg.Is(NoReg));
 
   VIXL_CHECK(NoVReg.Is(NoReg));
   VIXL_CHECK(NoReg.Is(NoVReg));
@@ -181,14 +181,13 @@ TEST(noreg) {
   VIXL_CHECK(NoReg.Is(NoCPUReg));
   VIXL_CHECK(NoCPUReg.Is(NoReg));
 
-  VIXL_CHECK(NoFPReg.Is(NoCPUReg));
-  VIXL_CHECK(NoCPUReg.Is(NoFPReg));
+  VIXL_CHECK(NoVReg.Is(NoCPUReg));
+  VIXL_CHECK(NoCPUReg.Is(NoVReg));
 
   VIXL_CHECK(NoVReg.Is(NoCPUReg));
   VIXL_CHECK(NoCPUReg.Is(NoVReg));
 
   VIXL_CHECK(NoReg.IsNone());
-  VIXL_CHECK(NoFPReg.IsNone());
   VIXL_CHECK(NoVReg.IsNone());
   VIXL_CHECK(NoCPUReg.IsNone());
 }
@@ -196,7 +195,6 @@ TEST(noreg) {
 
 TEST(isvalid) {
   VIXL_CHECK(!NoReg.IsValid());
-  VIXL_CHECK(!NoFPReg.IsValid());
   VIXL_CHECK(!NoVReg.IsValid());
   VIXL_CHECK(!NoCPUReg.IsValid());
 
@@ -221,6 +219,12 @@ TEST(isvalid) {
   VIXL_CHECK(wzr.IsValidRegister());
   VIXL_CHECK(sp.IsValidRegister());
   VIXL_CHECK(wsp.IsValidRegister());
+  VIXL_CHECK(!x0.IsValidVRegister());
+  VIXL_CHECK(!w0.IsValidVRegister());
+  VIXL_CHECK(!xzr.IsValidVRegister());
+  VIXL_CHECK(!wzr.IsValidVRegister());
+  VIXL_CHECK(!sp.IsValidVRegister());
+  VIXL_CHECK(!wsp.IsValidVRegister());
   VIXL_CHECK(!x0.IsValidFPRegister());
   VIXL_CHECK(!w0.IsValidFPRegister());
   VIXL_CHECK(!xzr.IsValidFPRegister());
@@ -228,13 +232,46 @@ TEST(isvalid) {
   VIXL_CHECK(!sp.IsValidFPRegister());
   VIXL_CHECK(!wsp.IsValidFPRegister());
 
+  VIXL_CHECK(q0.IsValidVRegister());
+  VIXL_CHECK(!q0.IsValidFPRegister());
+  VIXL_CHECK(!q0.IsValidRegister());
+
+  VIXL_CHECK(d0.IsValidVRegister());
   VIXL_CHECK(d0.IsValidFPRegister());
-  VIXL_CHECK(s0.IsValidFPRegister());
   VIXL_CHECK(!d0.IsValidRegister());
+
+  VIXL_CHECK(s0.IsValidVRegister());
+  VIXL_CHECK(s0.IsValidFPRegister());
   VIXL_CHECK(!s0.IsValidRegister());
 
-  // Test the same as before, but using CPURegister types. This shouldn't make
-  // any difference.
+  // TODO: h0.IsValidFPRegister() should be true.
+  VIXL_CHECK(h0.IsValidVRegister());
+  VIXL_CHECK(!h0.IsValidFPRegister());
+  VIXL_CHECK(!h0.IsValidRegister());
+
+  VIXL_CHECK(b0.IsValidVRegister());
+  VIXL_CHECK(!b0.IsValidFPRegister());
+  VIXL_CHECK(!b0.IsValidRegister());
+
+  // IsValidFPRegister() is only true for scalar types.
+  VIXL_CHECK(q0.V2D().IsValidVRegister());
+  VIXL_CHECK(!q0.V2D().IsValidFPRegister());
+  // TODO: d0.V2S().IsValidFPRegister() should be false.
+  VIXL_CHECK(d0.V2S().IsValidVRegister());
+  VIXL_CHECK(d0.V2S().IsValidFPRegister());
+  // TODO: s0.V2H().IsValidFPRegister() should be false.
+  VIXL_CHECK(s0.V2H().IsValidVRegister());
+  VIXL_CHECK(s0.V2H().IsValidFPRegister());
+}
+
+
+TEST(isvalid_cpu) {
+  // As 'isvalid', but using CPURegister types where possible. This shouldn't
+  // make any difference.
+  VIXL_CHECK(!static_cast<CPURegister>(NoReg).IsValid());
+  VIXL_CHECK(!static_cast<CPURegister>(NoVReg).IsValid());
+  VIXL_CHECK(!static_cast<CPURegister>(NoCPUReg).IsValid());
+
   VIXL_CHECK(static_cast<CPURegister>(x0).IsValid());
   VIXL_CHECK(static_cast<CPURegister>(w0).IsValid());
   VIXL_CHECK(static_cast<CPURegister>(x30).IsValid());
@@ -256,6 +293,12 @@ TEST(isvalid) {
   VIXL_CHECK(static_cast<CPURegister>(wzr).IsValidRegister());
   VIXL_CHECK(static_cast<CPURegister>(sp).IsValidRegister());
   VIXL_CHECK(static_cast<CPURegister>(wsp).IsValidRegister());
+  VIXL_CHECK(!static_cast<CPURegister>(x0).IsValidVRegister());
+  VIXL_CHECK(!static_cast<CPURegister>(w0).IsValidVRegister());
+  VIXL_CHECK(!static_cast<CPURegister>(xzr).IsValidVRegister());
+  VIXL_CHECK(!static_cast<CPURegister>(wzr).IsValidVRegister());
+  VIXL_CHECK(!static_cast<CPURegister>(sp).IsValidVRegister());
+  VIXL_CHECK(!static_cast<CPURegister>(wsp).IsValidVRegister());
   VIXL_CHECK(!static_cast<CPURegister>(x0).IsValidFPRegister());
   VIXL_CHECK(!static_cast<CPURegister>(w0).IsValidFPRegister());
   VIXL_CHECK(!static_cast<CPURegister>(xzr).IsValidFPRegister());
@@ -263,10 +306,26 @@ TEST(isvalid) {
   VIXL_CHECK(!static_cast<CPURegister>(sp).IsValidFPRegister());
   VIXL_CHECK(!static_cast<CPURegister>(wsp).IsValidFPRegister());
 
+  VIXL_CHECK(static_cast<CPURegister>(q0).IsValidVRegister());
+  VIXL_CHECK(!static_cast<CPURegister>(q0).IsValidFPRegister());
+  VIXL_CHECK(!static_cast<CPURegister>(q0).IsValidRegister());
+
+  VIXL_CHECK(static_cast<CPURegister>(d0).IsValidVRegister());
   VIXL_CHECK(static_cast<CPURegister>(d0).IsValidFPRegister());
-  VIXL_CHECK(static_cast<CPURegister>(s0).IsValidFPRegister());
   VIXL_CHECK(!static_cast<CPURegister>(d0).IsValidRegister());
+
+  VIXL_CHECK(static_cast<CPURegister>(s0).IsValidVRegister());
+  VIXL_CHECK(static_cast<CPURegister>(s0).IsValidFPRegister());
   VIXL_CHECK(!static_cast<CPURegister>(s0).IsValidRegister());
+
+  // TODO: h0.IsValidFPRegister() should be true.
+  VIXL_CHECK(static_cast<CPURegister>(h0).IsValidVRegister());
+  VIXL_CHECK(!static_cast<CPURegister>(h0).IsValidFPRegister());
+  VIXL_CHECK(!static_cast<CPURegister>(h0).IsValidRegister());
+
+  VIXL_CHECK(static_cast<CPURegister>(b0).IsValidVRegister());
+  VIXL_CHECK(!static_cast<CPURegister>(b0).IsValidFPRegister());
+  VIXL_CHECK(!static_cast<CPURegister>(b0).IsValidRegister());
 }
 
 
diff --git a/test/aarch64/test-assembler-aarch64.cc b/test/aarch64/test-assembler-aarch64.cc
index e833334a..6ee5f212 100644
--- a/test/aarch64/test-assembler-aarch64.cc
+++ b/test/aarch64/test-assembler-aarch64.cc
@@ -8278,13 +8278,13 @@ static void PushPopFPSimpleHelper(int reg_count,
   // debug code, for example.
   static RegList const allowed = ~0;
   if (reg_count == kPushPopFPUseMaxRegCount) {
-    reg_count = CountSetBits(allowed, kNumberOfFPRegisters);
+    reg_count = CountSetBits(allowed, kNumberOfVRegisters);
   }
   // Work out which registers to use, based on reg_size.
-  FPRegister v[kNumberOfRegisters];
-  FPRegister d[kNumberOfRegisters];
+  VRegister v[kNumberOfRegisters];
+  VRegister d[kNumberOfRegisters];
   RegList list =
-      PopulateFPRegisterArray(NULL, d, v, reg_size, reg_count, allowed);
+      PopulateVRegisterArray(NULL, d, v, reg_size, reg_count, allowed);
 
   // Arbitrarily pick a register to use as a stack pointer.
   const Register& stack_pointer = x10;
diff --git a/test/aarch64/test-assembler-fp-aarch64.cc b/test/aarch64/test-assembler-fp-aarch64.cc
index c308a7e3..3885debb 100644
--- a/test/aarch64/test-assembler-fp-aarch64.cc
+++ b/test/aarch64/test-assembler-fp-aarch64.cc
@@ -291,7 +291,7 @@ void LoadFPValueHelper(T values[], int card) {
   SETUP_WITH_FEATURES(CPUFeatures::kFP);
 
   const bool is_32bits = (sizeof(T) == 4);
-  const FPRegister& fp_tgt = is_32bits ? s2 : d2;
+  const VRegister& fp_tgt = is_32bits ? s2 : d2;
   const Register& tgt1 = is_32bits ? Register(w1) : Register(x1);
   const Register& tgt2 = is_32bits ? Register(w2) : Register(x2);
 
diff --git a/test/aarch64/test-simulator-aarch64.cc b/test/aarch64/test-simulator-aarch64.cc
index c577bbbe..b145bb9a 100644
--- a/test/aarch64/test-simulator-aarch64.cc
+++ b/test/aarch64/test-simulator-aarch64.cc
@@ -181,25 +181,25 @@ static double rawbits_to_fp(uint16_t bits) {
 
 
 // MacroAssembler member function pointers to pass to the test dispatchers.
-typedef void (MacroAssembler::*Test1OpFPHelper_t)(const FPRegister& fd,
-                                                  const FPRegister& fn);
-typedef void (MacroAssembler::*Test2OpFPHelper_t)(const FPRegister& fd,
-                                                  const FPRegister& fn,
-                                                  const FPRegister& fm);
-typedef void (MacroAssembler::*Test3OpFPHelper_t)(const FPRegister& fd,
-                                                  const FPRegister& fn,
-                                                  const FPRegister& fm,
-                                                  const FPRegister& fa);
-typedef void (MacroAssembler::*TestFPCmpHelper_t)(const FPRegister& fn,
-                                                  const FPRegister& fm);
-typedef void (MacroAssembler::*TestFPCmpZeroHelper_t)(const FPRegister& fn,
+typedef void (MacroAssembler::*Test1OpFPHelper_t)(const VRegister& fd,
+                                                  const VRegister& fn);
+typedef void (MacroAssembler::*Test2OpFPHelper_t)(const VRegister& fd,
+                                                  const VRegister& fn,
+                                                  const VRegister& fm);
+typedef void (MacroAssembler::*Test3OpFPHelper_t)(const VRegister& fd,
+                                                  const VRegister& fn,
+                                                  const VRegister& fm,
+                                                  const VRegister& fa);
+typedef void (MacroAssembler::*TestFPCmpHelper_t)(const VRegister& fn,
+                                                  const VRegister& fm);
+typedef void (MacroAssembler::*TestFPCmpZeroHelper_t)(const VRegister& fn,
                                                       double value);
 typedef void (MacroAssembler::*TestFPToIntHelper_t)(const Register& rd,
-                                                    const FPRegister& fn);
+                                                    const VRegister& fn);
 typedef void (MacroAssembler::*TestFPToFixedHelper_t)(const Register& rd,
-                                                      const FPRegister& fn,
+                                                      const VRegister& fn,
                                                       int fbits);
-typedef void (MacroAssembler::*TestFixedToFPHelper_t)(const FPRegister& fd,
+typedef void (MacroAssembler::*TestFixedToFPHelper_t)(const VRegister& fd,
                                                       const Register& rn,
                                                       int fbits);
 // TODO: 'Test2OpNEONHelper_t' and 'Test2OpFPHelper_t' can be
@@ -267,8 +267,8 @@ static void Test1Op_Helper(Test1OpFPHelper_t helper,
   Register index_n = w3;
 
   int n_index_shift;
-  FPRegister fd;
-  FPRegister fn;
+  VRegister fd;
+  VRegister fn;
   if (n_size == kDRegSize) {
     n_index_shift = kDRegSizeInBytesLog2;
     fn = d1;
@@ -418,9 +418,9 @@ static void Test2Op_Helper(Test2OpFPHelper_t helper,
     index_shift = kHRegSizeInBytesLog2;
   }
 
-  FPRegister fd;
-  FPRegister fn;
-  FPRegister fm;
+  VRegister fd;
+  VRegister fn;
+  VRegister fm;
 
   if (double_op) {
     fd = d0;
@@ -569,10 +569,10 @@ static void Test3Op_Helper(Test3OpFPHelper_t helper,
   bool double_op = reg_size == kDRegSize;
   bool single_op = reg_size == kSRegSize;
   int index_shift;
-  FPRegister fd(0, reg_size);
-  FPRegister fn(1, reg_size);
-  FPRegister fm(2, reg_size);
-  FPRegister fa(3, reg_size);
+  VRegister fd(0, reg_size);
+  VRegister fn(1, reg_size);
+  VRegister fm(2, reg_size);
+  VRegister fa(3, reg_size);
   if (double_op) {
     index_shift = kDRegSizeInBytesLog2;
   } else if (single_op) {
@@ -728,8 +728,8 @@ static void TestCmp_Helper(TestFPCmpHelper_t helper,
   const int index_shift =
       double_op ? kDRegSizeInBytesLog2 : kSRegSizeInBytesLog2;
 
-  FPRegister fn = double_op ? d1 : s1;
-  FPRegister fm = double_op ? d2 : s2;
+  VRegister fn = double_op ? d1 : s1;
+  VRegister fm = double_op ? d2 : s2;
 
   __ Mov(out, results);
   __ Mov(inputs_base, inputs);
@@ -869,7 +869,7 @@ static void TestCmpZero_Helper(TestFPCmpZeroHelper_t helper,
   const int index_shift =
       double_op ? kDRegSizeInBytesLog2 : kSRegSizeInBytesLog2;
 
-  FPRegister fn = double_op ? d1 : s1;
+  VRegister fn = double_op ? d1 : s1;
 
   __ Mov(out, results);
   __ Mov(inputs_base, inputs);
@@ -1006,7 +1006,7 @@ static void TestFPToFixed_Helper(TestFPToFixedHelper_t helper,
   }
 
   Register rd = (d_size == kXRegSize) ? Register(x10) : Register(w10);
-  FPRegister fn;
+  VRegister fn;
   if (n_size == kDRegSize) {
     fn = d1;
   } else if (n_size == kSRegSize) {
@@ -1075,7 +1075,7 @@ static void TestFPToInt_Helper(TestFPToIntHelper_t helper,
   }
 
   Register rd = (d_size == kXRegSize) ? Register(x10) : Register(w10);
-  FPRegister fn;
+  VRegister fn;
   if (n_size == kDRegSize) {
     fn = d1;
   } else if (n_size == kSRegSize) {
@@ -5060,17 +5060,17 @@ Instruction* GenerateSum(MacroAssembler* masm) {
   masm->Reset();
 
   ABI abi;
-  FPRegister input_1 =
-      FPRegister(abi.GetNextParameterGenericOperand<float>().GetCPURegister());
+  VRegister input_1 =
+      VRegister(abi.GetNextParameterGenericOperand<float>().GetCPURegister());
   Register input_2 =
       Register(abi.GetNextParameterGenericOperand<int64_t>().GetCPURegister());
-  FPRegister input_3 =
-      FPRegister(abi.GetNextParameterGenericOperand<double>().GetCPURegister());
-  FPRegister result =
-      FPRegister(abi.GetReturnGenericOperand<double>().GetCPURegister());
+  VRegister input_3 =
+      VRegister(abi.GetNextParameterGenericOperand<double>().GetCPURegister());
+  VRegister result =
+      VRegister(abi.GetReturnGenericOperand<double>().GetCPURegister());
 
   UseScratchRegisterScope temps(masm);
-  FPRegister temp = temps.AcquireD();
+  VRegister temp = temps.AcquireD();
 
   __ Fcvt(input_1.D(), input_1);
   __ Scvtf(temp, input_2);
diff --git a/test/aarch64/test-utils-aarch64.cc b/test/aarch64/test-utils-aarch64.cc
index d2d2ae71..62f8cbd5 100644
--- a/test/aarch64/test-utils-aarch64.cc
+++ b/test/aarch64/test-utils-aarch64.cc
@@ -217,7 +217,7 @@ bool Equal128(uint64_t expected_h,
 
 bool EqualFP16(Float16 expected,
                const RegisterDump* core,
-               const FPRegister& fpreg) {
+               const VRegister& fpreg) {
   VIXL_ASSERT(fpreg.Is16Bits());
   // Retrieve the corresponding D register so we can check that the upper part
   // was properly cleared.
@@ -235,7 +235,7 @@ bool EqualFP16(Float16 expected,
 
 bool EqualFP32(float expected,
                const RegisterDump* core,
-               const FPRegister& fpreg) {
+               const VRegister& fpreg) {
   VIXL_ASSERT(fpreg.Is32Bits());
   // Retrieve the corresponding D register so we can check that the upper part
   // was properly cleared.
@@ -254,7 +254,7 @@ bool EqualFP32(float expected,
 
 bool EqualFP64(double expected,
                const RegisterDump* core,
-               const FPRegister& fpreg) {
+               const VRegister& fpreg) {
   VIXL_ASSERT(fpreg.Is64Bits());
   return EqualFP64(expected, core, core->dreg(fpreg.GetCode()));
 }
@@ -333,7 +333,7 @@ bool EqualRegisters(const RegisterDump* a, const RegisterDump* b) {
     }
   }
 
-  for (unsigned i = 0; i < kNumberOfFPRegisters; i++) {
+  for (unsigned i = 0; i < kNumberOfVRegisters; i++) {
     uint64_t a_bits = a->dreg_bits(i);
     uint64_t b_bits = b->dreg_bits(i);
     if (a_bits != b_bits) {
@@ -380,32 +380,32 @@ RegList PopulateRegisterArray(Register* w,
 }
 
 
-RegList PopulateFPRegisterArray(FPRegister* s,
-                                FPRegister* d,
-                                FPRegister* v,
-                                int reg_size,
-                                int reg_count,
-                                RegList allowed) {
+RegList PopulateVRegisterArray(VRegister* s,
+                               VRegister* d,
+                               VRegister* v,
+                               int reg_size,
+                               int reg_count,
+                               RegList allowed) {
   RegList list = 0;
   int i = 0;
-  for (unsigned n = 0; (n < kNumberOfFPRegisters) && (i < reg_count); n++) {
+  for (unsigned n = 0; (n < kNumberOfVRegisters) && (i < reg_count); n++) {
     if (((UINT64_C(1) << n) & allowed) != 0) {
       // Only assigned allowed registers.
       if (v) {
-        v[i] = FPRegister(n, reg_size);
+        v[i] = VRegister(n, reg_size);
       }
       if (d) {
-        d[i] = FPRegister(n, kDRegSize);
+        d[i] = VRegister(n, kDRegSize);
       }
       if (s) {
-        s[i] = FPRegister(n, kSRegSize);
+        s[i] = VRegister(n, kSRegSize);
       }
       list |= (UINT64_C(1) << n);
       i++;
     }
   }
   // Check that we got enough registers.
-  VIXL_ASSERT(CountSetBits(list, kNumberOfFPRegisters) == reg_count);
+  VIXL_ASSERT(CountSetBits(list, kNumberOfVRegisters) == reg_count);
 
   return list;
 }
@@ -435,10 +435,10 @@ void Clobber(MacroAssembler* masm, RegList reg_list, uint64_t const value) {
 
 
 void ClobberFP(MacroAssembler* masm, RegList reg_list, double const value) {
-  FPRegister first = NoFPReg;
-  for (unsigned i = 0; i < kNumberOfFPRegisters; i++) {
+  VRegister first = NoVReg;
+  for (unsigned i = 0; i < kNumberOfVRegisters; i++) {
     if (reg_list & (UINT64_C(1) << i)) {
-      FPRegister dn(i, kDRegSize);
+      VRegister dn(i, kDRegSize);
       if (!first.IsValid()) {
         // This is the first register we've hit, so construct the literal.
         __ Fmov(dn, value);
@@ -524,25 +524,25 @@ void RegisterDump::Dump(MacroAssembler* masm) {
 
   // Dump D registers.
   __ Add(dump, dump_base, d_offset);
-  for (unsigned i = 0; i < kNumberOfFPRegisters; i += 2) {
-    __ Stp(FPRegister::GetDRegFromCode(i),
-           FPRegister::GetDRegFromCode(i + 1),
+  for (unsigned i = 0; i < kNumberOfVRegisters; i += 2) {
+    __ Stp(VRegister::GetDRegFromCode(i),
+           VRegister::GetDRegFromCode(i + 1),
            MemOperand(dump, i * kDRegSizeInBytes));
   }
 
   // Dump S registers.
   __ Add(dump, dump_base, s_offset);
-  for (unsigned i = 0; i < kNumberOfFPRegisters; i += 2) {
-    __ Stp(FPRegister::GetSRegFromCode(i),
-           FPRegister::GetSRegFromCode(i + 1),
+  for (unsigned i = 0; i < kNumberOfVRegisters; i += 2) {
+    __ Stp(VRegister::GetSRegFromCode(i),
+           VRegister::GetSRegFromCode(i + 1),
            MemOperand(dump, i * kSRegSizeInBytes));
   }
 
 #ifdef VIXL_INCLUDE_SIMULATOR_AARCH64
   // Dump H registers. Note: Stp does not support 16 bits.
   __ Add(dump, dump_base, h_offset);
-  for (unsigned i = 0; i < kNumberOfFPRegisters; i++) {
-    __ Str(FPRegister::GetHRegFromCode(i),
+  for (unsigned i = 0; i < kNumberOfVRegisters; i++) {
+    __ Str(VRegister::GetHRegFromCode(i),
            MemOperand(dump, i * kHRegSizeInBytes));
   }
 #else
diff --git a/test/aarch64/test-utils-aarch64.h b/test/aarch64/test-utils-aarch64.h
index d43685ae..ee09d6b8 100644
--- a/test/aarch64/test-utils-aarch64.h
+++ b/test/aarch64/test-utils-aarch64.h
@@ -99,7 +99,7 @@ class RegisterDump {
     return dump_.x_[code];
   }
 
-  // FPRegister accessors.
+  // VRegister accessors.
   inline uint16_t hreg_bits(unsigned code) const {
     VIXL_ASSERT(FPRegAliasesMatch(code));
     return dump_.h_[code];
@@ -171,7 +171,7 @@ class RegisterDump {
   // As RegAliasesMatch, but for floating-point registers.
   bool FPRegAliasesMatch(unsigned code) const {
     VIXL_ASSERT(IsComplete());
-    VIXL_ASSERT(code < kNumberOfFPRegisters);
+    VIXL_ASSERT(code < kNumberOfVRegisters);
     return (((dump_.d_[code] & kSRegMask) == dump_.s_[code]) ||
             ((dump_.s_[code] & kHRegMask) == dump_.h_[code]));
   }
@@ -184,9 +184,9 @@ class RegisterDump {
     uint32_t w_[kNumberOfRegisters];
 
     // Floating-point registers, as raw bits.
-    uint64_t d_[kNumberOfFPRegisters];
-    uint32_t s_[kNumberOfFPRegisters];
-    uint16_t h_[kNumberOfFPRegisters];
+    uint64_t d_[kNumberOfVRegisters];
+    uint32_t s_[kNumberOfVRegisters];
+    uint16_t h_[kNumberOfVRegisters];
 
     // Vector registers.
     vec128_t q_[kNumberOfVRegisters];
@@ -235,13 +235,13 @@ bool Equal64(uint64_t expected,
 
 bool EqualFP16(Float16 expected,
                const RegisterDump* core,
-               const FPRegister& fpreg);
+               const VRegister& fpreg);
 bool EqualFP32(float expected,
                const RegisterDump* core,
-               const FPRegister& fpreg);
+               const VRegister& fpreg);
 bool EqualFP64(double expected,
                const RegisterDump* core,
-               const FPRegister& fpreg);
+               const VRegister& fpreg);
 
 bool Equal64(const Register& reg0,
              const RegisterDump* core,
@@ -279,12 +279,12 @@ RegList PopulateRegisterArray(Register* w,
                               RegList allowed);
 
 // As PopulateRegisterArray, but for floating-point registers.
-RegList PopulateFPRegisterArray(FPRegister* s,
-                                FPRegister* d,
-                                FPRegister* v,
-                                int reg_size,
-                                int reg_count,
-                                RegList allowed);
+RegList PopulateVRegisterArray(VRegister* s,
+                               VRegister* d,
+                               VRegister* v,
+                               int reg_size,
+                               int reg_count,
+                               RegList allowed);
 
 // Ovewrite the contents of the specified registers. This enables tests to
 // check that register contents are written in cases where it's likely that the