Fix FPRoundInt's handling of INT64_MAX.

This fixes a bug caused by an implicit conversion from `int64_t` to
`double`, as well as several related warnings (from recent versions of
Clang) in the "frint" tests.

Change-Id: Ie5dccbf7a86c5e3a608570bd0ffc566bf3813380

12 files changed, 101 insertions, 123 deletions

diff --git a/test/aarch64/test-assembler-fp-aarch64.cc b/test/aarch64/test-assembler-fp-aarch64.cc
index 51f7aba5..b9a581e7 100644
--- a/test/aarch64/test-assembler-fp-aarch64.cc
+++ b/test/aarch64/test-assembler-fp-aarch64.cc
@@ -2029,9 +2029,9 @@ TEST(frint32x_s) {
   __ Fmov(s24, -0.2);
   __ Fmov(s25, kFP32DefaultNaN);
   __ Fmov(s26, INT32_MIN);
-  __ Fmov(s27, INT32_MIN + 1);
-  __ Fmov(s28, INT32_MAX);
-  __ Fmov(s29, INT32_MAX - 1);
+  __ Fmov(s27, INT32_MIN + 0x80);  // The next representable FP32.
+  __ Fmov(s28, 0x80000000);
+  __ Fmov(s29, 0x7fffff80);  // The largest int32_t representable as FP32.
   __ Fmov(s30, FLT_MIN);
   __ Fmov(s31, FLT_MAX);
 
@@ -2072,11 +2072,11 @@ TEST(frint32x_s) {
     ASSERT_EQUAL_FP32(0.0, s9);
     ASSERT_EQUAL_FP32(-0.0, s10);
     ASSERT_EQUAL_FP32(-0.0, s11);
-    ASSERT_EQUAL_FP32(INT32_MIN, s12);
+    ASSERT_EQUAL_FP32(INT32_MIN, s12);  // NaN.
     ASSERT_EQUAL_FP32(INT32_MIN, s13);
-    ASSERT_EQUAL_FP32(INT32_MIN + 1, s14);
-    ASSERT_EQUAL_FP32(INT32_MIN, s15);
-    ASSERT_EQUAL_FP32(INT32_MIN, s16);
+    ASSERT_EQUAL_FP32(INT32_MIN + 0x80, s14);
+    ASSERT_EQUAL_FP32(INT32_MIN, s15);  // Out of range.
+    ASSERT_EQUAL_FP32(0x7fffff80, s16);
     ASSERT_EQUAL_FP32(0, s17);
     ASSERT_EQUAL_FP32(INT32_MIN, s18);
   }
@@ -2173,9 +2173,9 @@ TEST(frint32z_s) {
   __ Fmov(s24, -0.2);
   __ Fmov(s25, kFP32DefaultNaN);
   __ Fmov(s26, INT32_MIN);
-  __ Fmov(s27, INT32_MIN + 1);
-  __ Fmov(s28, INT32_MAX);
-  __ Fmov(s29, INT32_MAX - 1);
+  __ Fmov(s27, INT32_MIN + 0x80);  // The next representable FP32.
+  __ Fmov(s28, 0x80000000);
+  __ Fmov(s29, 0x7fffff80);  // The largest int32_t representable as FP32.
   __ Fmov(s30, FLT_MIN);
   __ Fmov(s31, FLT_MAX);
 
@@ -2216,11 +2216,11 @@ TEST(frint32z_s) {
     ASSERT_EQUAL_FP32(0.0, s9);
     ASSERT_EQUAL_FP32(-0.0, s10);
     ASSERT_EQUAL_FP32(-0.0, s11);
-    ASSERT_EQUAL_FP32(INT32_MIN, s12);
+    ASSERT_EQUAL_FP32(INT32_MIN, s12);  // NaN.
     ASSERT_EQUAL_FP32(INT32_MIN, s13);
-    ASSERT_EQUAL_FP32(INT32_MIN + 1, s14);
-    ASSERT_EQUAL_FP32(INT32_MIN, s15);
-    ASSERT_EQUAL_FP32(INT32_MIN, s16);
+    ASSERT_EQUAL_FP32(INT32_MIN + 0x80, s14);
+    ASSERT_EQUAL_FP32(INT32_MIN, s15);  // Out of range.
+    ASSERT_EQUAL_FP32(0x7fffff80, s16);
     ASSERT_EQUAL_FP32(0, s17);
     ASSERT_EQUAL_FP32(INT32_MIN, s18);
   }
@@ -2317,9 +2317,10 @@ TEST(frint64x_s) {
   __ Fmov(s24, -0.2);
   __ Fmov(s25, kFP64DefaultNaN);
   __ Fmov(s26, INT64_MIN);
-  __ Fmov(s27, INT64_MIN + 1);
-  __ Fmov(s28, INT64_MAX);
-  __ Fmov(s29, INT64_MAX - 1);
+  __ Fmov(s27, INT64_MIN + 0x80'00000000);  // The next representable FP32.
+  __ Fmov(s28, 0x80000000'00000000);
+  // The largest int64_t representable as FP32.
+  __ Fmov(s29, 0x7fffff80'00000000);
   __ Fmov(s30, FLT_MIN);
   __ Fmov(s31, FLT_MAX);
 
@@ -2360,11 +2361,11 @@ TEST(frint64x_s) {
     ASSERT_EQUAL_FP32(0.0, s9);
     ASSERT_EQUAL_FP32(-0.0, s10);
     ASSERT_EQUAL_FP32(-0.0, s11);
-    ASSERT_EQUAL_FP32(INT64_MIN, s12);
+    ASSERT_EQUAL_FP32(INT64_MIN, s12);  // Nan.
     ASSERT_EQUAL_FP32(INT64_MIN, s13);
-    ASSERT_EQUAL_FP32(INT64_MIN + 1, s14);
-    ASSERT_EQUAL_FP32(INT64_MAX, s15);
-    ASSERT_EQUAL_FP32(INT64_MAX - 1, s16);
+    ASSERT_EQUAL_FP32(INT64_MIN + 0x80'00000000, s14);
+    ASSERT_EQUAL_FP32(INT64_MIN, s15);  // Out of range.
+    ASSERT_EQUAL_FP32(0x7fffff80'00000000, s16);
     ASSERT_EQUAL_FP32(0, s17);
     ASSERT_EQUAL_FP32(INT64_MIN, s18);
   }
@@ -2389,9 +2390,10 @@ TEST(frint64x_d) {
   __ Fmov(d24, -0.2);
   __ Fmov(d25, kFP64DefaultNaN);
   __ Fmov(d26, INT64_MIN);
-  __ Fmov(d27, INT64_MIN + 1);
-  __ Fmov(d28, INT64_MAX);
-  __ Fmov(d29, INT64_MAX - 1);
+  __ Fmov(d27, INT64_MIN + 0x400);  // The next representable FP64.
+  __ Fmov(d28, 0x80000000'00000000);
+  // The largest int64_t representable as FP64.
+  __ Fmov(d29, 0x7fffffff'fffffc00);
   __ Fmov(d30, FLT_MIN);
   __ Fmov(d31, FLT_MAX);
 
@@ -2432,11 +2434,11 @@ TEST(frint64x_d) {
     ASSERT_EQUAL_FP64(0.0, d9);
     ASSERT_EQUAL_FP64(-0.0, d10);
     ASSERT_EQUAL_FP64(-0.0, d11);
-    ASSERT_EQUAL_FP64(INT64_MIN, d12);
+    ASSERT_EQUAL_FP64(INT64_MIN, d12);  // NaN.
     ASSERT_EQUAL_FP64(INT64_MIN, d13);
-    ASSERT_EQUAL_FP64(INT64_MIN, d14);
-    ASSERT_EQUAL_FP64(INT64_MAX, d15);
-    ASSERT_EQUAL_FP64(INT64_MAX, d16);
+    ASSERT_EQUAL_FP64(INT64_MIN + 0x400, d14);
+    ASSERT_EQUAL_FP64(INT64_MIN, d15);  // Out of range.
+    ASSERT_EQUAL_FP64(0x7fffffff'fffffc00, d16);
     ASSERT_EQUAL_FP64(0, d17);
     ASSERT_EQUAL_FP64(INT64_MIN, d18);
   }
@@ -2461,9 +2463,10 @@ TEST(frint64z_s) {
   __ Fmov(s24, -0.2);
   __ Fmov(s25, kFP64DefaultNaN);
   __ Fmov(s26, INT64_MIN);
-  __ Fmov(s27, INT64_MIN + 1);
-  __ Fmov(s28, INT64_MAX);
-  __ Fmov(s29, INT64_MAX - 1);
+  __ Fmov(s27, INT64_MIN + 0x80'00000000);  // The next representable FP32.
+  __ Fmov(s28, 0x80000000'00000000);
+  // The largest int64_t representable as FP32.
+  __ Fmov(s29, 0x7fffff80'00000000);
   __ Fmov(s30, FLT_MIN);
   __ Fmov(s31, FLT_MAX);
 
@@ -2504,11 +2507,11 @@ TEST(frint64z_s) {
     ASSERT_EQUAL_FP32(0.0, s9);
     ASSERT_EQUAL_FP32(-0.0, s10);
     ASSERT_EQUAL_FP32(-0.0, s11);
-    ASSERT_EQUAL_FP32(INT64_MIN, s12);
+    ASSERT_EQUAL_FP32(INT64_MIN, s12);  // Nan.
     ASSERT_EQUAL_FP32(INT64_MIN, s13);
-    ASSERT_EQUAL_FP32(INT64_MIN + 1, s14);
-    ASSERT_EQUAL_FP32(INT64_MAX, s15);
-    ASSERT_EQUAL_FP32(INT64_MAX - 1, s16);
+    ASSERT_EQUAL_FP32(INT64_MIN + 0x80'00000000, s14);
+    ASSERT_EQUAL_FP32(INT64_MIN, s15);  // Out of range.
+    ASSERT_EQUAL_FP32(0x7fffff80'00000000, s16);
     ASSERT_EQUAL_FP32(0, s17);
     ASSERT_EQUAL_FP32(INT64_MIN, s18);
   }
@@ -2533,9 +2536,10 @@ TEST(frint64z_d) {
   __ Fmov(d24, -0.2);
   __ Fmov(d25, kFP64DefaultNaN);
   __ Fmov(d26, INT64_MIN);
-  __ Fmov(d27, INT64_MIN + 1);
-  __ Fmov(d28, INT64_MAX);
-  __ Fmov(d29, INT64_MAX - 1);
+  __ Fmov(d27, INT64_MIN + 0x400);  // The next representable FP64.
+  __ Fmov(d28, 0x80000000'00000000);
+  // The largest int64_t representable as FP64.
+  __ Fmov(d29, 0x7fffffff'fffffc00);
   __ Fmov(d30, FLT_MIN);
   __ Fmov(d31, FLT_MAX);
 
@@ -2576,11 +2580,11 @@ TEST(frint64z_d) {
     ASSERT_EQUAL_FP64(0.0, d9);
     ASSERT_EQUAL_FP64(-0.0, d10);
     ASSERT_EQUAL_FP64(-0.0, d11);
-    ASSERT_EQUAL_FP64(INT64_MIN, d12);
+    ASSERT_EQUAL_FP64(INT64_MIN, d12);  // NaN.
     ASSERT_EQUAL_FP64(INT64_MIN, d13);
-    ASSERT_EQUAL_FP64(INT64_MIN, d14);
-    ASSERT_EQUAL_FP64(INT64_MAX, d15);
-    ASSERT_EQUAL_FP64(INT64_MAX, d16);
+    ASSERT_EQUAL_FP64(INT64_MIN + 0x400, d14);
+    ASSERT_EQUAL_FP64(INT64_MIN, d15);  // Out of range.
+    ASSERT_EQUAL_FP64(0x7fffffff'fffffc00, d16);
     ASSERT_EQUAL_FP64(0, d17);
     ASSERT_EQUAL_FP64(INT64_MIN, d18);
   }
diff --git a/test/aarch64/test-assembler-sve-aarch64.cc b/test/aarch64/test-assembler-sve-aarch64.cc
index 6fc2b5e7..de7f58b7 100644
--- a/test/aarch64/test-assembler-sve-aarch64.cc
+++ b/test/aarch64/test-assembler-sve-aarch64.cc
@@ -15493,12 +15493,11 @@ static void TestFcvtzHelper(Test* config,
 }
 
 TEST_SVE(fcvtzs_fcvtzu_float16) {
-  const double h_max_float16 = kHMaxInt;        // Largest float16 == INT16_MAX.
+  const double h_max_float16 = 0x7ff0;          // Largest float16 == INT16_MAX.
   const double h_min_float16 = -h_max_float16;  // Smallest float16 > INT16_MIN.
   const double largest_float16 = 0xffe0;        // 65504
   const double smallest_float16 = -largest_float16;
-  const double h_max_int_sub_one = kHMaxInt - 1;
-  const double h_min_int_add_one = kHMinInt + 1;
+  const double h_max_int_add_one = 0x8000;
 
   double zn_inputs[] = {1.0,
                         1.1,
@@ -15510,26 +15509,15 @@ TEST_SVE(fcvtzs_fcvtzu_float16) {
                         smallest_float16,
                         kFP64PositiveInfinity,
                         kFP64NegativeInfinity,
-                        h_max_int_sub_one,
-                        h_min_int_add_one};
+                        h_max_int_add_one};
 
-  int pg_inputs[] = {0, 1, 0, 1, 1, 0, 1, 0, 1, 0, 1, 0};
+  int pg_inputs[] = {0, 1, 0, 1, 1, 0, 1, 0, 1, 0, 1};
 
-  uint64_t expected_fcvtzs_fp162h[] = {1,
-                                       1,
-                                       1,
-                                       0xffff,
-                                       0x7fff,
-                                       0x8000,
-                                       0x7fff,
-                                       0x8000,
-                                       0x7fff,
-                                       0x8000,
-                                       0x7fff,
-                                       0x8000};
+  uint64_t expected_fcvtzs_fp162h[] =
+      {1, 1, 1, 0xffff, 0x7ff0, 0x8010, 0x7fff, 0x8000, 0x7fff, 0x8000, 0x7fff};
 
   uint64_t expected_fcvtzu_fp162h[] =
-      {1, 1, 1, 0, 0x8000, 0, 0xffe0, 0, 0xffff, 0, 0x8000, 0};
+      {1, 1, 1, 0, 0x7ff0, 0, 0xffe0, 0, 0xffff, 0, 0x8000};
 
   // Float16 to 16-bit integers.
   TestFcvtzHelper(config,
@@ -15552,17 +15540,16 @@ TEST_SVE(fcvtzs_fcvtzu_float16) {
                                        1,
                                        1,
                                        0xffffffff,
-                                       0x8000,
-                                       0xffff8000,
+                                       0x7ff0,
+                                       0xffff8010,
                                        0xffe0,
                                        0xffff0020,
                                        0x7fffffff,
                                        0x80000000,
-                                       0x8000,
-                                       0xffff8000};
+                                       0x8000};
 
   uint64_t expected_fcvtzu_fp162w[] =
-      {1, 1, 1, 0, 0x8000, 0, 0xffe0, 0, 0xffffffff, 0, 0x8000, 0};
+      {1, 1, 1, 0, 0x7ff0, 0, 0xffe0, 0, 0xffffffff, 0, 0x8000};
 
   // Float16 to 32-bit integers.
   TestFcvtzHelper(config,
@@ -15585,17 +15572,16 @@ TEST_SVE(fcvtzs_fcvtzu_float16) {
                                        1,
                                        1,
                                        0xffffffffffffffff,
-                                       0x8000,
-                                       0xffffffffffff8000,
+                                       0x7ff0,
+                                       0xffffffffffff8010,
                                        0xffe0,
                                        0xffffffffffff0020,
                                        0x7fffffffffffffff,
                                        0x8000000000000000,
-                                       0x8000,
-                                       0xffffffffffff8000};
+                                       0x8000};
 
   uint64_t expected_fcvtzu_fp162x[] =
-      {1, 1, 1, 0, 0x8000, 0, 0xffe0, 0, 0xffffffffffffffff, 0, 0x8000, 0};
+      {1, 1, 1, 0, 0x7ff0, 0, 0xffe0, 0, 0xffffffffffffffff, 0, 0x8000};
 
   // Float16 to 64-bit integers.
   TestFcvtzHelper(config,
@@ -15620,10 +15606,8 @@ TEST_SVE(fcvtzs_fcvtzu_float) {
   const double w_min_float = -w_max_float;        // Smallest float > INT32_MIN.
   const double x_max_float = 0x7fffff8000000000;  // Largest float < INT64_MAX.
   const double x_min_float = -x_max_float;        // Smallest float > INT64_MIN.
-  const double w_max_int_sub_one = kWMaxInt - 1;
-  const double w_min_int_add_one = kWMinInt + 1;
-  const double x_max_int_sub_one = kXMaxInt - 1;
-  const double x_min_int_add_one = kXMinInt + 1;
+  const double w_min_int_add_one = 0x80000000;
+  const double x_max_int_add_one = 0x80000000'00000000;
 
   double zn_inputs[] = {1.0,
                         1.1,
@@ -15635,12 +15619,10 @@ TEST_SVE(fcvtzs_fcvtzu_float) {
                         x_min_float,
                         kFP64PositiveInfinity,
                         kFP64NegativeInfinity,
-                        w_max_int_sub_one,
                         w_min_int_add_one,
-                        x_max_int_sub_one,
-                        x_min_int_add_one};
+                        x_max_int_add_one};
 
-  int pg_inputs[] = {0, 1, 0, 1, 0, 1, 0, 1, 1, 0, 1, 1, 0, 0};
+  int pg_inputs[] = {0, 1, 0, 1, 0, 1, 0, 1, 1, 0, 1, 1};
 
   uint64_t expected_fcvtzs_s2w[] = {1,
                                     1,
@@ -15653,9 +15635,7 @@ TEST_SVE(fcvtzs_fcvtzu_float) {
                                     0x7fffffff,
                                     0x80000000,
                                     0x7fffffff,
-                                    0x80000000,
-                                    0x7fffffff,
-                                    0x80000000};
+                                    0x7fffffff};
 
   uint64_t expected_fcvtzu_s2w[] = {1,
                                     1,
@@ -15668,9 +15648,7 @@ TEST_SVE(fcvtzs_fcvtzu_float) {
                                     0xffffffff,
                                     0,
                                     0x80000000,
-                                    0,
-                                    0xffffffff,
-                                    0};
+                                    0xffffffff};
 
   // Float to 32-bit integers.
   TestFcvtzHelper(config,
@@ -15700,9 +15678,7 @@ TEST_SVE(fcvtzs_fcvtzu_float) {
                                     0x7fffffffffffffff,
                                     0x8000000000000000,
                                     0x80000000,
-                                    0xffffffff80000000,
-                                    0x7fffffffffffffff,
-                                    0x8000000000000000};
+                                    0x7fffffffffffffff};
 
   uint64_t expected_fcvtzu_s2x[] = {1,
                                     1,
@@ -15714,10 +15690,8 @@ TEST_SVE(fcvtzs_fcvtzu_float) {
                                     0,
                                     0xffffffffffffffff,
                                     0,
-                                    0x0000000080000000,
-                                    0,
-                                    0x8000000000000000,
-                                    0};
+                                    0x80000000,
+                                    0x8000000000000000};
 
   // Float to 64-bit integers.
   TestFcvtzHelper(config,
@@ -15749,8 +15723,8 @@ TEST_SVE(fcvtzs_fcvtzu_double) {
   const double x_min_double = -x_max_double;  // Smallest double > INT64_MIN.
   const double w_max_int_sub_one = kWMaxInt - 1;
   const double w_min_int_add_one = kWMinInt + 1;
-  const double x_max_int_sub_one = kXMaxInt - 1;
-  const double x_min_int_add_one = kXMinInt + 1;
+  const double w_max_int_add_one = 0x80000000;
+  const double x_max_int_add_one = 0x80000000'00000000;
 
   double zn_inputs[] = {1.0,
                         1.1,
@@ -15768,8 +15742,8 @@ TEST_SVE(fcvtzs_fcvtzu_double) {
                         kFP64NegativeInfinity,
                         w_max_int_sub_one,
                         w_min_int_add_one,
-                        x_max_int_sub_one,
-                        x_min_int_add_one};
+                        w_max_int_add_one,
+                        x_max_int_add_one};
 
   int pg_inputs[] = {1, 1, 1, 0, 1, 1, 0, 1, 1, 0, 1, 1, 0, 0, 1, 1, 0, 0};
 
@@ -15790,7 +15764,7 @@ TEST_SVE(fcvtzs_fcvtzu_double) {
                                     0x7ffffffe,
                                     0xffffffff80000001,
                                     0x7fffffff,
-                                    0xffffffff80000000};
+                                    0x7fffffff};
 
   uint64_t expected_fcvtzu_d2w[] = {1,
                                     1,
@@ -15808,8 +15782,8 @@ TEST_SVE(fcvtzs_fcvtzu_double) {
                                     0,
                                     0x7ffffffe,
                                     0,
-                                    0xffffffff,
-                                    0};
+                                    0x80000000,
+                                    0xffffffff};
 
   // Double to 32-bit integers.
   TestFcvtzHelper(config,
@@ -15844,8 +15818,8 @@ TEST_SVE(fcvtzs_fcvtzu_double) {
                                     0x8000000000000000,
                                     0x7ffffffe,
                                     0xffffffff80000001,
-                                    0x7fffffffffffffff,
-                                    0x8000000000000000};
+                                    0x80000000,
+                                    0x7fffffffffffffff};
 
   uint64_t expected_fcvtzu_d2x[] = {1,
                                     1,
@@ -15863,8 +15837,8 @@ TEST_SVE(fcvtzs_fcvtzu_double) {
                                     0,
                                     0x000000007ffffffe,
                                     0,
-                                    0x8000000000000000,
-                                    0};
+                                    0x80000000,
+                                    0x8000000000000000};
 
   // Double to 64-bit integers.
   TestFcvtzHelper(config,
diff --git a/test/aarch64/traces/sim-frint64x-2d-trace-aarch64.h b/test/aarch64/traces/sim-frint64x-2d-trace-aarch64.h
index e6f0a1a3..07fdee52 100644
--- a/test/aarch64/traces/sim-frint64x-2d-trace-aarch64.h
+++ b/test/aarch64/traces/sim-frint64x-2d-trace-aarch64.h
@@ -203,8 +203,8 @@ const uint64_t kExpected_NEON_frint64x_2D[] = {
   0xc3e0000000000000, 0xc3e0000000000000,
   0xc3e0000000000000, 0xc3dfffffffffffff,
   0xc3dfffffffffffff, 0x43dfffffffffffff,
-  0x43dfffffffffffff, 0x43e0000000000000,
-  0x43e0000000000000, 0xc3e0000000000000,
+  0x43dfffffffffffff, 0xc3e0000000000000,
+  0xc3e0000000000000, 0xc3e0000000000000,
   0xc3e0000000000000, 0xc3e0000000000000,
   0xc3e0000000000000, 0xc1e0000000200000,
   0xc1e0000000200000, 0xc1e0000000200000,
diff --git a/test/aarch64/traces/sim-frint64x-2s-trace-aarch64.h b/test/aarch64/traces/sim-frint64x-2s-trace-aarch64.h
index f87aa711..3e127e0a 100644
--- a/test/aarch64/traces/sim-frint64x-2s-trace-aarch64.h
+++ b/test/aarch64/traces/sim-frint64x-2s-trace-aarch64.h
@@ -133,8 +133,8 @@ const uint32_t kExpected_NEON_frint64x_2S[] = {
   0xdf000000, 0xdf000000,
   0xdf000000, 0xdeffffff,
   0xdeffffff, 0x5effffff,
-  0x5effffff, 0x5f000000,
-  0x5f000000, 0xdf000000,
+  0x5effffff, 0xdf000000,
+  0xdf000000, 0xdf000000,
   0xdf000000, 0xdf000000,
   0xdf000000, 0xcf000001,
   0xcf000001, 0xcf000000,
diff --git a/test/aarch64/traces/sim-frint64x-4s-trace-aarch64.h b/test/aarch64/traces/sim-frint64x-4s-trace-aarch64.h
index 7d44398f..84ae1643 100644
--- a/test/aarch64/traces/sim-frint64x-4s-trace-aarch64.h
+++ b/test/aarch64/traces/sim-frint64x-4s-trace-aarch64.h
@@ -131,10 +131,10 @@ const uint32_t kExpected_NEON_frint64x_4S[] = {
   0xca800000, 0xca800000, 0xdf000000, 0xdf000000,
   0xca800000, 0xdf000000, 0xdf000000, 0xdeffffff,
   0xdf000000, 0xdf000000, 0xdeffffff, 0x5effffff,
-  0xdf000000, 0xdeffffff, 0x5effffff, 0x5f000000,
-  0xdeffffff, 0x5effffff, 0x5f000000, 0xdf000000,
-  0x5effffff, 0x5f000000, 0xdf000000, 0xdf000000,
-  0x5f000000, 0xdf000000, 0xdf000000, 0xcf000001,
+  0xdf000000, 0xdeffffff, 0x5effffff, 0xdf000000,
+  0xdeffffff, 0x5effffff, 0xdf000000, 0xdf000000,
+  0x5effffff, 0xdf000000, 0xdf000000, 0xdf000000,
+  0xdf000000, 0xdf000000, 0xdf000000, 0xcf000001,
   0xdf000000, 0xdf000000, 0xcf000001, 0xcf000000,
   0xdf000000, 0xcf000001, 0xcf000000, 0xceffffff,
   0xcf000001, 0xcf000000, 0xceffffff, 0x4effffff,
diff --git a/test/aarch64/traces/sim-frint64x-d-trace-aarch64.h b/test/aarch64/traces/sim-frint64x-d-trace-aarch64.h
index 725b012e..8f0c269b 100644
--- a/test/aarch64/traces/sim-frint64x-d-trace-aarch64.h
+++ b/test/aarch64/traces/sim-frint64x-d-trace-aarch64.h
@@ -203,7 +203,7 @@ const uint64_t kExpected_frint64x_d[] = {
   0xc3e0000000000000,
   0xc3dfffffffffffff,
   0x43dfffffffffffff,
-  0x43e0000000000000,
+  0xc3e0000000000000,
   0xc3e0000000000000,
   0xc3e0000000000000,
   0xc1e0000000200000,
diff --git a/test/aarch64/traces/sim-frint64x-s-trace-aarch64.h b/test/aarch64/traces/sim-frint64x-s-trace-aarch64.h
index d09b2f78..3cffa565 100644
--- a/test/aarch64/traces/sim-frint64x-s-trace-aarch64.h
+++ b/test/aarch64/traces/sim-frint64x-s-trace-aarch64.h
@@ -131,7 +131,7 @@ const uint32_t kExpected_frint64x_s[] = {
   0xdf000000,
   0xdeffffff,
   0x5effffff,
-  0x5f000000,
+  0xdf000000,
   0xdf000000,
   0xdf000000,
   0xcf000001,
diff --git a/test/aarch64/traces/sim-frint64z-2d-trace-aarch64.h b/test/aarch64/traces/sim-frint64z-2d-trace-aarch64.h
index a9777b50..c4814334 100644
--- a/test/aarch64/traces/sim-frint64z-2d-trace-aarch64.h
+++ b/test/aarch64/traces/sim-frint64z-2d-trace-aarch64.h
@@ -203,8 +203,8 @@ const uint64_t kExpected_NEON_frint64z_2D[] = {
   0xc3e0000000000000, 0xc3e0000000000000,
   0xc3e0000000000000, 0xc3dfffffffffffff,
   0xc3dfffffffffffff, 0x43dfffffffffffff,
-  0x43dfffffffffffff, 0x43e0000000000000,
-  0x43e0000000000000, 0xc3e0000000000000,
+  0x43dfffffffffffff, 0xc3e0000000000000,
+  0xc3e0000000000000, 0xc3e0000000000000,
   0xc3e0000000000000, 0xc3e0000000000000,
   0xc3e0000000000000, 0xc1e0000000200000,
   0xc1e0000000200000, 0xc1e0000000200000,
diff --git a/test/aarch64/traces/sim-frint64z-2s-trace-aarch64.h b/test/aarch64/traces/sim-frint64z-2s-trace-aarch64.h
index 97544e5a..2195c1f1 100644
--- a/test/aarch64/traces/sim-frint64z-2s-trace-aarch64.h
+++ b/test/aarch64/traces/sim-frint64z-2s-trace-aarch64.h
@@ -133,8 +133,8 @@ const uint32_t kExpected_NEON_frint64z_2S[] = {
   0xdf000000, 0xdf000000,
   0xdf000000, 0xdeffffff,
   0xdeffffff, 0x5effffff,
-  0x5effffff, 0x5f000000,
-  0x5f000000, 0xdf000000,
+  0x5effffff, 0xdf000000,
+  0xdf000000, 0xdf000000,
   0xdf000000, 0xdf000000,
   0xdf000000, 0xcf000001,
   0xcf000001, 0xcf000000,
diff --git a/test/aarch64/traces/sim-frint64z-4s-trace-aarch64.h b/test/aarch64/traces/sim-frint64z-4s-trace-aarch64.h
index 34640dba..d42e93a3 100644
--- a/test/aarch64/traces/sim-frint64z-4s-trace-aarch64.h
+++ b/test/aarch64/traces/sim-frint64z-4s-trace-aarch64.h
@@ -131,10 +131,10 @@ const uint32_t kExpected_NEON_frint64z_4S[] = {
   0xca7ffffc, 0xca7ffffc, 0xdf000000, 0xdf000000,
   0xca7ffffc, 0xdf000000, 0xdf000000, 0xdeffffff,
   0xdf000000, 0xdf000000, 0xdeffffff, 0x5effffff,
-  0xdf000000, 0xdeffffff, 0x5effffff, 0x5f000000,
-  0xdeffffff, 0x5effffff, 0x5f000000, 0xdf000000,
-  0x5effffff, 0x5f000000, 0xdf000000, 0xdf000000,
-  0x5f000000, 0xdf000000, 0xdf000000, 0xcf000001,
+  0xdf000000, 0xdeffffff, 0x5effffff, 0xdf000000,
+  0xdeffffff, 0x5effffff, 0xdf000000, 0xdf000000,
+  0x5effffff, 0xdf000000, 0xdf000000, 0xdf000000,
+  0xdf000000, 0xdf000000, 0xdf000000, 0xcf000001,
   0xdf000000, 0xdf000000, 0xcf000001, 0xcf000000,
   0xdf000000, 0xcf000001, 0xcf000000, 0xceffffff,
   0xcf000001, 0xcf000000, 0xceffffff, 0x4effffff,
diff --git a/test/aarch64/traces/sim-frint64z-d-trace-aarch64.h b/test/aarch64/traces/sim-frint64z-d-trace-aarch64.h
index 5f96c65a..b65f68a3 100644
--- a/test/aarch64/traces/sim-frint64z-d-trace-aarch64.h
+++ b/test/aarch64/traces/sim-frint64z-d-trace-aarch64.h
@@ -203,7 +203,7 @@ const uint64_t kExpected_frint64z_d[] = {
   0xc3e0000000000000,
   0xc3dfffffffffffff,
   0x43dfffffffffffff,
-  0x43e0000000000000,
+  0xc3e0000000000000,
   0xc3e0000000000000,
   0xc3e0000000000000,
   0xc1e0000000200000,
diff --git a/test/aarch64/traces/sim-frint64z-s-trace-aarch64.h b/test/aarch64/traces/sim-frint64z-s-trace-aarch64.h
index 1df9f782..35e06868 100644
--- a/test/aarch64/traces/sim-frint64z-s-trace-aarch64.h
+++ b/test/aarch64/traces/sim-frint64z-s-trace-aarch64.h
@@ -131,7 +131,7 @@ const uint32_t kExpected_frint64z_s[] = {
   0xdf000000,
   0xdeffffff,
   0x5effffff,
-  0x5f000000,
+  0xdf000000,
   0xdf000000,
   0xdf000000,
   0xcf000001,