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This reverts commit 0a75ba66aa15ea1cdb3f57d0efd4ce7e7c14d45f.
Test: mma test-art-host-vixl
Test: test.py --host --optimizing --jit --gtest
Test: test.py --target --optimizing --jit
Test: run-gtests.sh
Change-Id: I052ab4d3243b0b9bee4c52d00ba4ef1d93a8d32c
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Revert "ART: Fix breaking changes from recent VIXL update."
Revert submission 1331125-VIXL_UPDATE_SVE
Reason for revert: broken build git_master-art-host/art-gtest-heap-poisoning @ 6936943
Reverted Changes:
Ic10af84a0:Merge remote-tracking branch 'aosp/upstream-master...
I752a0b0ba:ART: Fix breaking changes from recent VIXL update....
Bug: 171879890
Change-Id: I6f0f5d1e176e2069301685eeb95a3c76364226ff
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This introduces consistent rules for register tracing, and introduces
clear rules for displaying and parsing structured accesses. This fixes
several problems in the existing system, and provides the framework for
adapting the SVE tracing to match.
In particular, it is now possible to parse individual lines of trace to
build a model of machine state, without having to examine surrounding
lines.
Documentation is provided for the new format. It is not a formal
specification, but should be sufficient for authors of parsing tools.
The SVE tracing will be updated in a follow-up patch.
Change-Id: Id48dbdb28e9371a7d1359bbe17c8f24e2c5fb442
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The script that generates supported-instructions-aarch64.md didn't allow
multiple comment lines, so fix that, and format the architecture version
suffix nicely.
Change-Id: Id135935f99edab9be23033aa8c5cfcb43a3cc7ad
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Change-Id: Iad57700d9e9d2ae5e3d20fbbc92ae84c2995d385
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Adds support for the A64 CN instructions: FCMLA and FCADD
Change-Id: I7b8f978cbed69fa987d318295100f3befaf6ae28
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Change-Id: I53900ff075f9134d56cefcd0d838e29be8667a50
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Updates the top README to reflect changes done with the support for
AArch32. Take the opportunity to re-organize our documentation files
structure and seperate `aarch32` and `aarch64` at the top-level.
Additionally, the title now mentions this is the
development version of VIXL.
doc/
├── aarch32
│ ├── design
│ │ ├── code-generation-aarch32.md
│ │ └── literal-pool-aarch32.md
│ └── getting-started-aarch32.md
├── aarch64
│ ├── getting-started-aarch64.md
│ ├── supported-instructions-aarch64.md
│ └── topics
│ ├── extending-the-disassembler.md
│ ├── index.md
│ └── ycm.md
└── changelog.md
Change-Id: Ida9547a1de30886a112360e4b2beafa7cb0ac7b9
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Change-Id: I5b942e033681c69f5e6cac3a669b3b3ebacbf1f8
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The implementation of the scopes relies only on the `AssemblerBase` interface.
The AArch32 scopes will be updated in a separate commit.
Change-Id: Ibe0eab35f60da39fe0bcbd60a16bdc65b12e0dd5
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Change-Id: Ic4c2db3d47df6600e1c79c421b2fc1e99756fe0d
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Change-Id: Ie29561f0f422b5e86f7a60729bd3d1445c9a1854
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This patch refactors VIXL to use `extern` block when including C header
that do not have a C++ counterpart.
Change-Id: I203d7d107755dbac3e5f4cf8d2f196f70dea1e07
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The previous implementation was not emitting the pools when it needed to upon
construction, and was not correctly blocking emission of the pools.
Change-Id: I06db5b5891234946b139ba64898929c0e3ced3c4
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Change-Id: Ibc1ed87b7105c9b2c6e710f15347e7023e8f8a98
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Change-Id: I40a929b1095ee3e1b2ca5ef879c7006d8b59acc9
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Change-Id: I5c3a89df8563e3fb15639d357ae4346db1c69585
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Add support for the A32 and T32 instruction set architectures in
seperate a32 directories.
Note that this commit introduces aarch32 and aarch64 namespaces so
existing client code will need to be adjusted.
Refer to doc/getting-started-a32.md for an introduction.
Change-Id: Iaf3e5f496ec4e19d77d304128e6920daa4549e78
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Refer to the README.md and LICENCE files for details.
Change-Id: I922914f4e7da7cb939a8054cded11feb9ea51a86
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Refer to the README.md and LICENCE files for details.
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Refer to the README.md and LICENCE files for details.
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Refer to the README.md and LICENCE files for details.
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Refer to the README.md and LICENCE files for details.
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Refer to the README.md and LICENCE files for details.
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Refer to the README.md and LICENCE files for details.
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Refer to the README.md and LICENCE files for details.
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Refer to the README.md and LICENCE files for details.
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Refer to the README.md and LICENCE files for details.
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Refer to the README.md and LICENCE files for details.
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Refer to the README.md and LICENCE files for details.
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Refer to the README.md and LICENCE files for details.
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Refer to the README.md and LICENCE files for details.
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