diff options
author | Treehugger Robot <treehugger-gerrit@google.com> | 2020-02-10 21:52:51 +0000 |
---|---|---|
committer | Gerrit Code Review <noreply-gerritcodereview@google.com> | 2020-02-10 21:52:51 +0000 |
commit | 1713721de5a7fabe346fc8886ebe00cc11bd4377 (patch) | |
tree | d424eedeabc2db004eb4aa9c5916e15f0fa9f717 | |
parent | 3b3f8457d009811b98f368b07a7e220077c5b5f4 (diff) | |
parent | 0bbd71604d1c9d8892c762b4525b2a3260c45534 (diff) | |
download | zlib-1713721de5a7fabe346fc8886ebe00cc11bd4377.tar.gz |
Merge "Upgrade zlib to b9b9a5af7cca2e683e5f2aead8418e5bf9d5a7d5"
-rw-r--r-- | Android.bp | 3 | ||||
-rw-r--r-- | BUILD.gn | 64 | ||||
-rw-r--r-- | METADATA | 6 | ||||
-rw-r--r-- | OWNERS | 4 | ||||
-rw-r--r-- | adler32.c | 8 | ||||
-rw-r--r-- | contrib/optimizations/insert_string.h | 2 | ||||
-rw-r--r-- | contrib/tests/fuzzers/BUILD.gn | 32 | ||||
-rw-r--r-- | cpu_features.c (renamed from arm_features.c) | 83 | ||||
-rw-r--r-- | cpu_features.h (renamed from arm_features.h) | 8 | ||||
-rw-r--r-- | crc32.c | 17 | ||||
-rw-r--r-- | deflate.c | 15 | ||||
-rw-r--r-- | google/BUILD.gn | 4 | ||||
-rw-r--r-- | patches/0003-uninitializedjump.patch | 15 | ||||
-rw-r--r-- | simd_stub.c | 35 | ||||
-rw-r--r-- | x86.c | 101 | ||||
-rw-r--r-- | x86.h | 16 |
16 files changed, 162 insertions, 251 deletions
@@ -15,6 +15,7 @@ cc_defaults { srcs: [ "adler32.c", "compress.c", + "cpu_features.c", "crc32.c", "deflate.c", "gzclose.c", @@ -28,8 +29,6 @@ cc_defaults { "trees.c", "uncompr.c", "zutil.c", - - "simd_stub.c", ], arch: { @@ -29,9 +29,12 @@ use_x86_x64_optimizations = config("zlib_adler32_simd_config") { if (use_x86_x64_optimizations) { defines = [ "ADLER32_SIMD_SSSE3" ] - } - - if (use_arm_neon_optimizations) { + if (is_win) { + defines += [ "X86_WINDOWS" ] + } else { + defines += [ "X86_NOT_WINDOWS" ] + } + } else if (use_arm_neon_optimizations) { defines = [ "ADLER32_SIMD_NEON" ] } } @@ -94,24 +97,13 @@ if (use_arm_neon_optimizations) { if (!is_ios) { include_dirs = [ "." ] - if (is_android) { - import("//build/config/android/config.gni") - if (defined(android_ndk_root) && android_ndk_root != "") { - deps = [ - "//third_party/android_ndk:cpu_features", - ] - } else { - assert(false, "CPU detection requires the Android NDK") - } - } else if (!is_win && !is_clang) { + if (!is_win && !is_clang) { assert(!use_thin_lto, "ThinLTO fails mixing different module-level targets") cflags_c = [ "-march=armv8-a+crc" ] } sources = [ - "arm_features.c", - "arm_features.h", "crc32_simd.c", "crc32_simd.h", ] @@ -218,10 +210,6 @@ source_set("zlib_x86_simd") { "-mpclmul", ] } - } else { - sources = [ - "simd_stub.c", - ] } configs -= [ "//build/config/compiler:chromium_code" ] @@ -248,6 +236,8 @@ component("zlib") { "chromeconf.h", "compress.c", "contrib/optimizations/insert_string.h", + "cpu_features.c", + "cpu_features.h", "crc32.c", "crc32.h", "deflate.c", @@ -267,7 +257,6 @@ component("zlib") { "trees.c", "trees.h", "uncompr.c", - "x86.h", "zconf.h", "zlib.h", "zutil.c", @@ -276,6 +265,19 @@ component("zlib") { defines = [] deps = [] + if (!use_x86_x64_optimizations && !use_arm_neon_optimizations) { + # Apparently android_cronet bot builds with NEON disabled and + # we also should disable optimizations for iOS@x86 (a.k.a. simulator). + defines += [ "CPU_NO_SIMD" ] + } + + if (is_ios) { + # iOS@ARM is a special case where we always have NEON but don't check + # for crypto extensions. + # TODO(cavalcantii): verify what is the current state of CPU features shipped + # on latest iOS devices. + defines += [ "ARM_OS_IOS" ] + } if (use_x86_x64_optimizations || use_arm_neon_optimizations) { deps += [ @@ -284,7 +286,6 @@ component("zlib") { ] if (use_x86_x64_optimizations) { - sources += [ "x86.c" ] deps += [ ":zlib_crc32_simd" ] } else if (use_arm_neon_optimizations) { sources += [ "contrib/optimizations/slide_hash_neon.h" ] @@ -294,6 +295,15 @@ component("zlib") { sources += [ "inflate.c" ] } + if (is_android) { + import("//build/config/android/config.gni") + if (defined(android_ndk_root) && android_ndk_root != "") { + deps += [ "//third_party/android_ndk:cpu_features" ] + } else { + assert(false, "CPU detection requires the Android NDK") + } + } + configs -= [ "//build/config/compiler:chromium_code" ] configs += [ ":zlib_internal_config", @@ -343,9 +353,7 @@ static_library("minizip") { defines = [ "USE_FILE32API" ] } - deps = [ - ":zlib", - ] + deps = [ ":zlib" ] configs -= [ "//build/config/compiler:chromium_code" ] configs += [ @@ -361,9 +369,7 @@ static_library("minizip") { executable("zlib_bench") { include_dirs = [ "." ] - sources = [ - "contrib/bench/zlib_bench.cc", - ] + sources = [ "contrib/bench/zlib_bench.cc" ] if (!is_debug) { configs -= [ "//build/config/compiler:default_optimization" ] @@ -373,7 +379,5 @@ executable("zlib_bench") { configs -= [ "//build/config/compiler:chromium_code" ] configs += [ "//build/config/compiler:no_chromium_code" ] - deps = [ - ":zlib", - ] + deps = [ ":zlib" ] } @@ -5,11 +5,11 @@ third_party { type: GIT value: "https://chromium.googlesource.com/chromium/src/third_party/zlib/" } - version: "814da1f383b625955149c3845db62af3f29a4ffe" + version: "b9b9a5af7cca2e683e5f2aead8418e5bf9d5a7d5" license_type: NOTICE last_upgrade_date { year: 2020 - month: 1 - day: 8 + month: 2 + day: 7 } } @@ -1,7 +1,7 @@ agl@chromium.org cavalcantii@chromium.org cblume@chromium.org -mtklein@chromium.org -scroggo@chromium.org +mtklein@google.com +scroggo@google.com # COMPONENT: Internals @@ -59,10 +59,8 @@ local uLong adler32_combine_ OF((uLong adler1, uLong adler2, z_off64_t len2)); # define MOD63(a) a %= BASE #endif -#if defined(ADLER32_SIMD_SSSE3) -#include "adler32_simd.h" -#include "x86.h" -#elif defined(ADLER32_SIMD_NEON) +#include "cpu_features.h" +#if defined(ADLER32_SIMD_SSSE3) || defined(ADLER32_SIMD_NEON) #include "adler32_simd.h" #endif @@ -108,7 +106,7 @@ uLong ZEXPORT adler32_z(adler, buf, len) */ if (buf == Z_NULL) { if (!len) /* Assume user is calling adler32(0, NULL, 0); */ - x86_check_features(); + cpu_check_features(); return 1L; } #else diff --git a/contrib/optimizations/insert_string.h b/contrib/optimizations/insert_string.h index 69eee3d..1826601 100644 --- a/contrib/optimizations/insert_string.h +++ b/contrib/optimizations/insert_string.h @@ -10,6 +10,7 @@ #define INLINE inline #endif +#include "cpu_features.h" /* Optimized insert_string block */ #if defined(CRC32_SIMD_SSE42_PCLMUL) || defined(CRC32_ARMV8_CRC32) #define TARGET_CPU_WITH_CRC @@ -25,7 +26,6 @@ #define _cpu_crc32_u32 _mm_crc32_u32 #elif defined(CRC32_ARMV8_CRC32) - #include "arm_features.h" #if defined(__clang__) #undef TARGET_CPU_WITH_CRC #define __crc32cw __builtin_arm_crc32cw diff --git a/contrib/tests/fuzzers/BUILD.gn b/contrib/tests/fuzzers/BUILD.gn index c46b664..34c3b43 100644 --- a/contrib/tests/fuzzers/BUILD.gn +++ b/contrib/tests/fuzzers/BUILD.gn @@ -9,37 +9,21 @@ group("fuzzers") { } fuzzer_test("zlib_uncompress_fuzzer") { - sources = [ - "uncompress_fuzzer.cc", - ] - deps = [ - "../../../:zlib", - ] + sources = [ "uncompress_fuzzer.cc" ] + deps = [ "../../../:zlib" ] } fuzzer_test("zlib_inflate_fuzzer") { - sources = [ - "inflate_fuzzer.cc", - ] - deps = [ - "../../../:zlib", - ] + sources = [ "inflate_fuzzer.cc" ] + deps = [ "../../../:zlib" ] } fuzzer_test("zlib_deflate_set_dictionary_fuzzer") { - sources = [ - "deflate_set_dictionary_fuzzer.cc", - ] - deps = [ - "../../../:zlib", - ] + sources = [ "deflate_set_dictionary_fuzzer.cc" ] + deps = [ "../../../:zlib" ] } fuzzer_test("zlib_deflate_fuzzer") { - sources = [ - "deflate_fuzzer.cc", - ] - deps = [ - "../../../:zlib", - ] + sources = [ "deflate_fuzzer.cc" ] + deps = [ "../../../:zlib" ] } diff --git a/arm_features.c b/cpu_features.c index f5641c3..8a25dd2 100644 --- a/arm_features.c +++ b/cpu_features.c @@ -1,16 +1,26 @@ -/* arm_features.c -- ARM processor features detection. +/* cpu_features.c -- Processor features detection. * * Copyright 2018 The Chromium Authors. All rights reserved. * Use of this source code is governed by a BSD-style license that can be * found in the Chromium source repository LICENSE file. */ -#include "arm_features.h" +#include "cpu_features.h" #include "zutil.h" + #include <stdint.h> +#if defined(_MSC_VER) +#include <intrin.h> +#elif defined(ADLER32_SIMD_SSSE3) +#include <cpuid.h> +#endif +/* TODO(cavalcantii): remove checks for x86_flags on deflate. + */ int ZLIB_INTERNAL arm_cpu_enable_crc32 = 0; int ZLIB_INTERNAL arm_cpu_enable_pmull = 0; +int ZLIB_INTERNAL x86_cpu_enable_ssse3 = 0; +int ZLIB_INTERNAL x86_cpu_enable_simd = 0; #if defined(ARMV8_OS_ANDROID) || defined(ARMV8_OS_LINUX) || defined(ARMV8_OS_FUCHSIA) #include <pthread.h> @@ -25,39 +35,49 @@ int ZLIB_INTERNAL arm_cpu_enable_pmull = 0; #include <zircon/features.h> #include <zircon/syscalls.h> #include <zircon/types.h> -#elif defined(ARMV8_OS_WINDOWS) +#elif defined(ARMV8_OS_WINDOWS) || defined(X86_WINDOWS) #include <windows.h> +#elif !defined(_MSC_VER) +#include <pthread.h> #else -#error arm_features.c ARM feature detection in not defined for your platform +#error cpu_features.c CPU feature detection in not defined for your platform #endif -static void _arm_check_features(void); +#if !defined(CPU_NO_SIMD) && !defined(ARM_OS_IOS) +static void _cpu_check_features(void); +#endif -#if defined(ARMV8_OS_ANDROID) || defined(ARMV8_OS_LINUX) || defined(ARMV8_OS_FUCHSIA) +#if defined(ARMV8_OS_ANDROID) || defined(ARMV8_OS_LINUX) || defined(ARMV8_OS_FUCHSIA) || defined(X86_NOT_WINDOWS) static pthread_once_t cpu_check_inited_once = PTHREAD_ONCE_INIT; -void ZLIB_INTERNAL arm_check_features(void) +void ZLIB_INTERNAL cpu_check_features(void) { - pthread_once(&cpu_check_inited_once, _arm_check_features); + pthread_once(&cpu_check_inited_once, _cpu_check_features); } -#elif defined(ARMV8_OS_WINDOWS) +#elif defined(ARMV8_OS_WINDOWS) || defined(X86_WINDOWS) static INIT_ONCE cpu_check_inited_once = INIT_ONCE_STATIC_INIT; -static BOOL CALLBACK _arm_check_features_forwarder(PINIT_ONCE once, PVOID param, PVOID* context) +static BOOL CALLBACK _cpu_check_features_forwarder(PINIT_ONCE once, PVOID param, PVOID* context) { - _arm_check_features(); + _cpu_check_features(); return TRUE; } -void ZLIB_INTERNAL arm_check_features(void) +void ZLIB_INTERNAL cpu_check_features(void) { - InitOnceExecuteOnce(&cpu_check_inited_once, _arm_check_features_forwarder, + InitOnceExecuteOnce(&cpu_check_inited_once, _cpu_check_features_forwarder, NULL, NULL); } #endif +#if (defined(__ARM_NEON__) || defined(__ARM_NEON)) +/* + * iOS@ARM is a special case where we always have NEON but don't check + * for crypto extensions. + */ +#ifndef ARM_OS_IOS /* * See http://bit.ly/2CcoEsr for run-time detection of ARM features and also * crbug.com/931275 for android_getCpuFeatures() use in the Android sandbox. */ -static void _arm_check_features(void) +static void _cpu_check_features(void) { #if defined(ARMV8_OS_ANDROID) && defined(__aarch64__) uint64_t features = android_getCpuFeatures(); @@ -88,3 +108,38 @@ static void _arm_check_features(void) arm_cpu_enable_pmull = IsProcessorFeaturePresent(PF_ARM_V8_CRYPTO_INSTRUCTIONS_AVAILABLE); #endif } +#endif +#elif defined(X86_NOT_WINDOWS) || defined(X86_WINDOWS) +/* + * iOS@x86 (i.e. emulator) is another special case where we disable + * SIMD optimizations. + */ +#ifndef CPU_NO_SIMD +/* On x86 we simply use a instruction to check the CPU features. + * (i.e. CPUID). + */ +static void _cpu_check_features(void) +{ + int x86_cpu_has_sse2; + int x86_cpu_has_ssse3; + int x86_cpu_has_sse42; + int x86_cpu_has_pclmulqdq; + int abcd[4]; +#ifdef _MSC_VER + __cpuid(abcd, 1); +#else + __cpuid(1, abcd[0], abcd[1], abcd[2], abcd[3]); +#endif + x86_cpu_has_sse2 = abcd[3] & 0x4000000; + x86_cpu_has_ssse3 = abcd[2] & 0x000200; + x86_cpu_has_sse42 = abcd[2] & 0x100000; + x86_cpu_has_pclmulqdq = abcd[2] & 0x2; + + x86_cpu_enable_ssse3 = x86_cpu_has_ssse3; + + x86_cpu_enable_simd = x86_cpu_has_sse2 && + x86_cpu_has_sse42 && + x86_cpu_has_pclmulqdq; +} +#endif +#endif diff --git a/arm_features.h b/cpu_features.h index 09fec25..2a4a797 100644 --- a/arm_features.h +++ b/cpu_features.h @@ -1,4 +1,4 @@ -/* arm_features.h -- ARM processor features detection. +/* cpu_features.h -- Processor features detection. * * Copyright 2018 The Chromium Authors. All rights reserved. * Use of this source code is governed by a BSD-style license that can be @@ -7,7 +7,11 @@ #include "zlib.h" +/* TODO(cavalcantii): remove checks for x86_flags on deflate. + */ extern int arm_cpu_enable_crc32; extern int arm_cpu_enable_pmull; +extern int x86_cpu_enable_ssse3; +extern int x86_cpu_enable_simd; -void arm_check_features(void); +void cpu_check_features(void); @@ -29,13 +29,10 @@ #endif /* MAKECRCH */ #include "deflate.h" -#include "x86.h" +#include "cpu_features.h" #include "zutil.h" /* for STDC and FAR definitions */ -#if defined(CRC32_SIMD_SSE42_PCLMUL) -#include "crc32_simd.h" -#elif defined(CRC32_ARMV8_CRC32) -#include "arm_features.h" +#if defined(CRC32_SIMD_SSE42_PCLMUL) || defined(CRC32_ARMV8_CRC32) #include "crc32_simd.h" #endif @@ -226,7 +223,7 @@ unsigned long ZEXPORT crc32_z(crc, buf, len) */ if (buf == Z_NULL) { if (!len) /* Assume user is calling crc32(0, NULL, 0); */ - x86_check_features(); + cpu_check_features(); return 0UL; } @@ -289,7 +286,7 @@ unsigned long ZEXPORT crc32(crc, buf, len) */ if (buf == Z_NULL) { if (!len) /* Assume user is calling crc32(0, NULL, 0); */ - arm_check_features(); + cpu_check_features(); return 0UL; } @@ -500,25 +497,31 @@ uLong ZEXPORT crc32_combine64(crc1, crc2, len2) ZLIB_INTERNAL void crc_reset(deflate_state *const s) { +#ifdef ADLER32_SIMD_SSSE3 if (x86_cpu_enable_simd) { crc_fold_init(s); return; } +#endif s->strm->adler = crc32(0L, Z_NULL, 0); } ZLIB_INTERNAL void crc_finalize(deflate_state *const s) { +#ifdef ADLER32_SIMD_SSSE3 if (x86_cpu_enable_simd) s->strm->adler = crc_fold_512to32(s); +#endif } ZLIB_INTERNAL void copy_with_crc(z_streamp strm, Bytef *dst, long size) { +#ifdef ADLER32_SIMD_SSSE3 if (x86_cpu_enable_simd) { crc_fold_copy(strm->state, dst, strm->next_in, size); return; } +#endif zmemcpy(dst, strm->next_in, size); strm->adler = crc32(strm->adler, dst, size); } @@ -50,7 +50,7 @@ /* @(#) $Id$ */ #include <assert.h> #include "deflate.h" -#include "x86.h" +#include "cpu_features.h" #include "contrib/optimizations/insert_string.h" #if (defined(__ARM_NEON__) || defined(__ARM_NEON)) @@ -244,10 +244,8 @@ int ZEXPORT deflateInit2_(strm, level, method, windowBits, memLevel, strategy, // for all wrapper formats (e.g. RAW, ZLIB, GZIP). // Feature detection is not triggered while using RAW mode (i.e. we never // call crc32() with a NULL buffer). -#if defined(CRC32_ARMV8_CRC32) - arm_check_features(); -#elif defined(CRC32_SIMD_SSE42_PCLMUL) - x86_check_features(); +#if defined(CRC32_ARMV8_CRC32) || defined(CRC32_SIMD_SSE42_PCLMUL) + cpu_check_features(); #endif if (version == Z_NULL || version[0] != my_version[0] || @@ -320,6 +318,10 @@ int ZEXPORT deflateInit2_(strm, level, method, windowBits, memLevel, strategy, s->w_size + window_padding, 2*sizeof(Byte)); s->prev = (Posf *) ZALLOC(strm, s->w_size, sizeof(Pos)); + /* Avoid use of uninitialized value, see: + * https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=11360 + */ + zmemzero(s->prev, s->w_size * sizeof(Pos)); s->head = (Posf *) ZALLOC(strm, s->hash_size, sizeof(Pos)); s->high_water = 0; /* nothing written to s->window yet */ @@ -1519,11 +1521,12 @@ local void fill_window_c(deflate_state *s); local void fill_window(deflate_state *s) { +#ifdef ADLER32_SIMD_SSSE3 if (x86_cpu_enable_simd) { fill_window_sse(s); return; } - +#endif fill_window_c(s); } diff --git a/google/BUILD.gn b/google/BUILD.gn index 4024836..a628d2f 100644 --- a/google/BUILD.gn +++ b/google/BUILD.gn @@ -42,7 +42,5 @@ static_library("compression_utils_portable") { "compression_utils_portable.cc", "compression_utils_portable.h", ] - deps = [ - "//third_party/zlib", - ] + deps = [ "//third_party/zlib" ] } diff --git a/patches/0003-uninitializedjump.patch b/patches/0003-uninitializedjump.patch new file mode 100644 index 0000000..7aae323 --- /dev/null +++ b/patches/0003-uninitializedjump.patch @@ -0,0 +1,15 @@ +diff --git a/third_party/zlib/deflate.c b/third_party/zlib/deflate.c +index a39e62787862..c6053fd1c7ea 100644 +--- a/third_party/zlib/deflate.c ++++ b/third_party/zlib/deflate.c +@@ -318,6 +318,10 @@ int ZEXPORT deflateInit2_(strm, level, method, windowBits, memLevel, strategy, + s->w_size + window_padding, + 2*sizeof(Byte)); + s->prev = (Posf *) ZALLOC(strm, s->w_size, sizeof(Pos)); ++ /* Avoid use of uninitialized value, see: ++ * https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=11360 ++ */ ++ zmemzero(s->prev, s->w_size * sizeof(Pos)); + s->head = (Posf *) ZALLOC(strm, s->hash_size, sizeof(Pos)); + + s->high_water = 0; /* nothing written to s->window yet */ diff --git a/simd_stub.c b/simd_stub.c deleted file mode 100644 index c6d4605..0000000 --- a/simd_stub.c +++ /dev/null @@ -1,35 +0,0 @@ -/* simd_stub.c -- stub implementations -* Copyright (C) 2014 Intel Corporation -* For conditions of distribution and use, see copyright notice in zlib.h -*/ -#include <assert.h> - -#include "deflate.h" -#include "x86.h" - -int ZLIB_INTERNAL x86_cpu_enable_simd = 0; - -void ZLIB_INTERNAL crc_fold_init(deflate_state *const s) { - assert(0); -} - -void ZLIB_INTERNAL crc_fold_copy(deflate_state *const s, - unsigned char *dst, - const unsigned char *src, - long len) { - assert(0); -} - -unsigned ZLIB_INTERNAL crc_fold_512to32(deflate_state *const s) { - assert(0); - return 0; -} - -void ZLIB_INTERNAL fill_window_sse(deflate_state *s) -{ - assert(0); -} - -void x86_check_features(void) -{ -} @@ -1,101 +0,0 @@ -/* - * x86 feature check - * - * Copyright (C) 2013 Intel Corporation. All rights reserved. - * Author: - * Jim Kukunas - * - * For conditions of distribution and use, see copyright notice in zlib.h - */ - -#include "x86.h" -#include "zutil.h" - -int ZLIB_INTERNAL x86_cpu_enable_ssse3 = 0; -int ZLIB_INTERNAL x86_cpu_enable_simd = 0; - -#ifndef _MSC_VER -#include <pthread.h> - -pthread_once_t cpu_check_inited_once = PTHREAD_ONCE_INIT; -static void _x86_check_features(void); - -void x86_check_features(void) -{ - pthread_once(&cpu_check_inited_once, _x86_check_features); -} - -static void _x86_check_features(void) -{ - int x86_cpu_has_sse2; - int x86_cpu_has_ssse3; - int x86_cpu_has_sse42; - int x86_cpu_has_pclmulqdq; - unsigned eax, ebx, ecx, edx; - - eax = 1; -#ifdef __i386__ - __asm__ __volatile__ ( - "xchg %%ebx, %1\n\t" - "cpuid\n\t" - "xchg %1, %%ebx\n\t" - : "+a" (eax), "=S" (ebx), "=c" (ecx), "=d" (edx) - ); -#else - __asm__ __volatile__ ( - "cpuid\n\t" - : "+a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx) - ); -#endif /* (__i386__) */ - - x86_cpu_has_sse2 = edx & 0x4000000; - x86_cpu_has_ssse3 = ecx & 0x000200; - x86_cpu_has_sse42 = ecx & 0x100000; - x86_cpu_has_pclmulqdq = ecx & 0x2; - - x86_cpu_enable_ssse3 = x86_cpu_has_ssse3; - - x86_cpu_enable_simd = x86_cpu_has_sse2 && - x86_cpu_has_sse42 && - x86_cpu_has_pclmulqdq; -} -#else -#include <intrin.h> -#include <windows.h> - -static BOOL CALLBACK _x86_check_features(PINIT_ONCE once, - PVOID param, - PVOID *context); -static INIT_ONCE cpu_check_inited_once = INIT_ONCE_STATIC_INIT; - -void x86_check_features(void) -{ - InitOnceExecuteOnce(&cpu_check_inited_once, _x86_check_features, - NULL, NULL); -} - -static BOOL CALLBACK _x86_check_features(PINIT_ONCE once, - PVOID param, - PVOID *context) -{ - int x86_cpu_has_sse2; - int x86_cpu_has_ssse3; - int x86_cpu_has_sse42; - int x86_cpu_has_pclmulqdq; - int regs[4]; - - __cpuid(regs, 1); - - x86_cpu_has_sse2 = regs[3] & 0x4000000; - x86_cpu_has_ssse3 = regs[2] & 0x000200; - x86_cpu_has_sse42 = regs[2] & 0x100000; - x86_cpu_has_pclmulqdq = regs[2] & 0x2; - - x86_cpu_enable_ssse3 = x86_cpu_has_ssse3; - - x86_cpu_enable_simd = x86_cpu_has_sse2 && - x86_cpu_has_sse42 && - x86_cpu_has_pclmulqdq; - return TRUE; -} -#endif /* _MSC_VER */ @@ -1,16 +0,0 @@ -/* x86.h -- check for x86 CPU features -* Copyright (C) 2013 Intel Corporation Jim Kukunas -* For conditions of distribution and use, see copyright notice in zlib.h -*/ - -#ifndef X86_H -#define X86_H - -#include "zlib.h" - -extern int x86_cpu_enable_ssse3; -extern int x86_cpu_enable_simd; - -void x86_check_features(void); - -#endif /* X86_H */ |