[zlib] Set hash_bits to at least 15 when using CRC hashing on ARM

Otherwise a bad match can be chosen by longest_match, since it assumes
that match[2] and scan[2] are equal when the hashes and the other bytes
match. That assumption doesn't hold when using CRC hashing and a low
number of hash bits (which can be set by via the 'memLevel' parameter).

For example, the two hex byte sequences 2a 14 14 14 and 2a 14 db 14
have the same lower 9 bits CRC, and only differ in the third byte. This
could cause longest_match to consider them as matching.

This was already handled for x86; do the same for ARM and add a test.

Bug: 1113596
Change-Id: I251150594264f401e4d8bc6e91b44b39998ab029
Reviewed-on: https://chromium-review.googlesource.com/c/chromium/src/+/2392457
Reviewed-by: Chris Blume <cblume@chromium.org>
Reviewed-by: Adenilson Cavalcanti <cavalcantii@chromium.org>
Commit-Queue: Chris Blume <cblume@chromium.org>
Auto-Submit: Hans Wennborg <hans@chromium.org>
Cr-Commit-Position: refs/heads/master@{#805076}
GitOrigin-RevId: 3fc5c74f812cda92f34897ed811694eaeb4f7654

1 files changed, 2 insertions, 3 deletions

diff --git a/deflate.c b/deflate.c
index 1597196..e5a69dd 100644
--- a/deflate.c
+++ b/deflate.c
@@ -304,10 +304,9 @@ int ZEXPORT deflateInit2_(strm, level, method, windowBits, memLevel, strategy,
     s->w_size = 1 << s->w_bits;
     s->w_mask = s->w_size - 1;
 
-    if (x86_cpu_enable_simd) {
+    s->hash_bits = memLevel + 7;
+    if ((x86_cpu_enable_simd || arm_cpu_enable_crc32) && s->hash_bits < 15) {
         s->hash_bits = 15;
-    } else {
-        s->hash_bits = memLevel + 7;
     }
 
     s->hash_size = 1 << s->hash_bits;